[AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr
authorJay Foad <jay.foad@amd.com>
Tue, 17 Dec 2019 16:09:02 +0000 (16:09 +0000)
committerJay Foad <jay.foad@amd.com>
Tue, 17 Dec 2019 18:54:27 +0000 (18:54 +0000)
commit0412f518dcb05216d2321c28366eb760b65baebc
tree938f5ccd33b0f78ea05867d2f6287e5f89070d2f
parent6a77e369755e59b92ac5b689a010bd0796810e35
[AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr

Summary:
The typo has been present since memOpsHaveSameBasePtr was introduced in
r313208.

It caused SIInstrInfo::shouldClusterMemOps to cluster more mem ops than
it was supposed to.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71616
23 files changed:
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/test/CodeGen/AMDGPU/add.i16.ll
llvm/test/CodeGen/AMDGPU/ctpop.ll
llvm/test/CodeGen/AMDGPU/ctpop16.ll
llvm/test/CodeGen/AMDGPU/fadd.f16.ll
llvm/test/CodeGen/AMDGPU/global_smrd.ll
llvm/test/CodeGen/AMDGPU/idot2.ll
llvm/test/CodeGen/AMDGPU/idot4s.ll
llvm/test/CodeGen/AMDGPU/idot4u.ll
llvm/test/CodeGen/AMDGPU/idot8s.ll
llvm/test/CodeGen/AMDGPU/idot8u.ll
llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
llvm/test/CodeGen/AMDGPU/madak.ll
llvm/test/CodeGen/AMDGPU/max.i16.ll
llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
llvm/test/CodeGen/AMDGPU/sub.i16.ll
llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
llvm/test/CodeGen/AMDGPU/trunc-combine.ll
llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
llvm/test/CodeGen/AMDGPU/wait.ll