v4l/atomisp: let pmu driver handle power island states

v4l/atomisp: let pmu driver handle power island states

BZ: 25359

When atomisp is treated as real PCI device as it should be, ISP
often refuses to transition from D3hot to D0 state. This is likely
caused by an ordering problem where in resume PCI PM core restores
config space prior to calling pci_set_power_state and the driver's
rpm resume function. PMCSR in PCI PM cap is set to D0 from D3 but
refuses to transition possibly due to the fact that power islands
are still down for atomisp.

This patch moves power island control from driver rpm callbacks to
pmu driver such that the action is better coordinated.

Change-Id: I83ac338aa391793a2da12371dd9b6787370cb21d
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-on: http://android.intel.com:8080/36782
Reviewed-by: Shevchenko, Andriy <andriy.shevchenko@intel.com>
Reviewed-by: Mansoor, Illyas <illyas.mansoor@intel.com>
Reviewed-by: Hogander, Jouni <jouni.hogander@intel.com>
Reviewed-by: Cohen, David A <david.a.cohen@intel.com>
Reviewed-by: Koski, Anttu <anttu.koski@intel.com>
Tested-by: Koski, Anttu <anttu.koski@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>