powerpc/85xx: describe the PAMU topology in the device tree
authorTimur Tabi <timur@freescale.com>
Thu, 17 Jan 2013 22:34:33 +0000 (16:34 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 13 Feb 2013 13:49:02 +0000 (07:49 -0600)
commit0408753faeb53b37628c71c92ee6a7a422042607
tree57ad14c5f6e9e08f5aa3ed2fce774dc447450efd
parent2d1efdb232bbb4b5253147ead0c8ad8dc7f6c6c3
powerpc/85xx: describe the PAMU topology in the device tree

The PAMU caches use the LIODNs to determine which cache lines hold the
entries for the corresponding LIODs.  The LIODNs must therefore be
carefully assigned to avoid cache thrashing -- two active LIODs with
LIODNs that put them in the same cache line.

Currently, LIODNs are statically assigned by U-Boot, but this has
limitations.  LIODNs are assigned even for devices that may be disabled
or unused by the kernel.  Static assignments also do not allow for device
drivers which may know which LIODs can be used simultaneously.  In
other words, we really should assign LIODNs dynamically in Linux.

To do that, we need to describe the PAMU device and cache topologies in
the device trees.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Stuart Yoder <stuart.yoder@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Documentation/devicetree/bindings/powerpc/fsl/guts.txt
Documentation/devicetree/bindings/powerpc/fsl/pamu.txt [new file with mode: 0644]
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
arch/powerpc/boot/dts/fsl/p5040si-post.dtsi