drm/i915: Make {vlv,chv}_{disable,update}_pll() more similar
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 15 Mar 2016 14:39:55 +0000 (16:39 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 1 Apr 2016 19:13:04 +0000 (22:13 +0300)
commit03ed5cbfacfb35a5d3aeeb39ebec63437917e7f1
treecc2c60c28adac332146380f8435ca86bedc52339
parent27878ede4fec7b929c3010710ba4d55c617c621d
drm/i915: Make {vlv,chv}_{disable,update}_pll() more similar

The VLV and CHV DPLL disable and update are almost identical in
how the DPLL/DPLL_MD registers need to be set up. But the code
looks more different than it really is. Try to bring them into
line.

Note that we now leave the refclock always enabled for both
DPLLs in the dual channel PHY. But that's perfectly fine since
it's the same clock, and we anyway already do that when turning
the disp2d power well on.

v2: s/chv_update_pll/chv_compute_dpll/
v3: Add a note that we leave refclocks enabled for both DPLLs (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458052809-23426-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_display.c