cxl: Enable NORST bit in PSL_DEBUG register for PSL9
authorVaibhav Jain <vaibhav@linux.vnet.ibm.com>
Fri, 9 Feb 2018 04:09:16 +0000 (09:39 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 13 Mar 2018 04:50:23 +0000 (15:50 +1100)
commit03ebb419b896e0fb2da3f34b57d45e62cafe4009
tree9b74b70a6914f77b5f93b69bbdd9ff42dcc73d0d
parent1ff3b404019adf9d605224e1dce0677a0375d274
cxl: Enable NORST bit in PSL_DEBUG register for PSL9

We enable the NORST bit by default for debug afu images to prevent
reset of AFU trace-data on a PCI link drop. For production AFU images
this bit is always ignored and PSL gets reconfigured anyways thereby
resetting the trace data. So setting this bit for non-debug images
doesn't have any impact.

Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
drivers/misc/cxl/pci.c