drm/i915/ICL: Add pre_pll_enable hook for ICL and set DFLEXDPMLE in this hook
authorManasi Navare <manasi.d.navare@intel.com>
Tue, 23 Oct 2018 19:12:48 +0000 (12:12 -0700)
committerManasi Navare <manasi.d.navare@intel.com>
Wed, 31 Oct 2018 23:22:08 +0000 (16:22 -0700)
commit03ad7d8821ec44513d514a5e6b17b60e732e1182
tree4523039092ec8ba001a41b20b2c8af8cb968d71f
parentb4335ec0a3ee6229a570755f8fb95dc8a7c694f2
drm/i915/ICL: Add pre_pll_enable hook for ICL and set DFLEXDPMLE in this hook

In case of Legacy DP connector on TypeC port, the
flex IO DPMLE register is set to number of lanes configured
by the display driver which will be programmed into DDI_BUF_CTL
PORT_WIDTH_SELECTION.
This needs to be programmed before enabling the shared PLLs hence
add a pre_pll_enable hook for ICL and add this programming in that hook.

v2:
* Remove the check for combophy port (Jose)
* Simplify the port reversal check logic (Jose)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181023191248.26418-2-manasi.d.navare@intel.com
drivers/gpu/drm/i915/intel_ddi.c