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(parent: 315a842) | patch
clk: ingenic: Remove pll_info.no_bypass_bit
authorPaul Cercueil <paul@crapouillou.net>
Sun, 30 May 2021 16:49:21 +0000 (17:49 +0100)
committerStephen Boyd <sboyd@kernel.org>
Mon, 28 Jun 2021 02:49:17 +0000 (19:49 -0700)
commit037f1ffd0f0a6bad89e17aa4698c97ef430c6ad1
treea9bfcfae8cfa961c5caba6119ec444bd857be429tree | snapshot
parent315a8423b20362bb675c5263cb237ecb51d9589ecommit | diff
clk: ingenic: Remove pll_info.no_bypass_bit

We can express that a PLL has no bypass bit by simply setting the
.bypass_bit field to a negative value.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20210530164923.18134-5-paul@crapouillou.net
Tested-by: 周琰杰 (Zhou Yanjie)<zhouyanjie@wanyeetech.com> # on CU1830-neo/X1830
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/ingenic/cgu.c diff | blob | history
drivers/clk/ingenic/cgu.h diff | blob | history
drivers/clk/ingenic/jz4770-cgu.c diff | blob | history
Domain: System / Kernel;