intel/compiler/fs: Add support for 16-bit sampler msg payload
authorTopi Pohjolainen <topi.pohjolainen@intel.com>
Wed, 8 Jul 2020 05:26:08 +0000 (22:26 -0700)
committerSagar Ghuge <sagar.ghuge@intel.com>
Tue, 23 Nov 2021 05:27:30 +0000 (21:27 -0800)
commit0374b56faa175bbd4bbf2617767773b680f4e25f
tree5a73807cac0f5a97df20c4db7c28c039dd45d65c
parent936412af27049724242b47234e2911e8527255bd
intel/compiler/fs: Add support for 16-bit sampler msg payload

For SIMD8 half float payload, each component takes a full register, so
we can use existing LOAD_PAYLOAD infrastruture for required padding by
alternating plain 8-wide half float vector and null vector.

Also this patch removes an unwanted assertion from
opt_copy_propagation_local for LOAD_PAYLOAD.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11766>
src/intel/compiler/brw_fs.cpp
src/intel/compiler/brw_fs_copy_propagation.cpp