drm/msm: hdmi phy 8960 phy pll
authorRob Clark <robdclark@gmail.com>
Wed, 25 Jun 2014 13:54:36 +0000 (09:54 -0400)
committerRob Clark <robdclark@gmail.com>
Mon, 4 Aug 2014 15:55:28 +0000 (11:55 -0400)
commit034fbcc3d8a5dff5d3df5a4ad6bf9cc0b01bd970
tree9c27803c6c44f446ed71680fb058927bbc08dd98
parent89301471e6bf942c026d6ebfcbc9a6a937cc6865
drm/msm: hdmi phy 8960 phy pll

On downstream kernel the clk driver directly bangs hdmi phy registers.
For upstream kernel, we need to model this as a clock and register with
the clock framework.

Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c