irqchip: arm-gic: Define additional MMIO offsets and masks
authorChristoffer Dall <christoffer.dall@linaro.org>
Mon, 23 Sep 2013 21:55:56 +0000 (14:55 -0700)
committerChristoffer Dall <christoffer.dall@linaro.org>
Sat, 21 Dec 2013 18:01:27 +0000 (10:01 -0800)
commit0307e1770fdeff2732cf7a35d0f7f49db67c6621
tree199483e6e2745bbaf9966f17975f439bba8e7617
parentce01e4e8874d410738f4b4733b26642d6611a331
irqchip: arm-gic: Define additional MMIO offsets and masks

Define CPU interface offsets for the GICC_ABPR, GICC_APR, and GICC_IIDR
registers.  Define distributor registers for the GICD_SPENDSGIR and the
GICD_CPENDSGIR.  KVM/ARM needs to know about these definitions to fully
support save/restore of the VGIC.

Also define some masks and shifts for the various GICH_VMCR fields.

Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
include/linux/irqchip/arm-gic.h