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(parent: c4da685) | patch
aarch64: Implement splatw3q instruction
authorMarek Vasut <marex@denx.de>
Sat, 27 Jun 2020 20:55:17 +0000 (22:55 +0200)
committerMarek Vasut <marex@denx.de>
Sat, 19 Sep 2020 01:08:46 +0000 (03:08 +0200)
commit02effd2ab2f892b433736c4bad269b34d84c2889
tree2302fe09e596da6506d96da460255cb7c88473aftree | snapshot
parentc4da685dea671979ddde1d493091b10dd724bca2commit | diff
aarch64: Implement splatw3q instruction

This uses TRN2 instruction twice on the same data, first to expand
top half-word of SRC register into TMP register and then to expand
top world of TMP register to DST register. The following scheme is
implemented: src[ABCDEFGH] -> tmp[ABABEFEF] -> dst[ABABABAB] .

Signed-off-by: Marek Vasut <marex@denx.de>
orc/orcrules-neon.c diff | blob | history
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