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(parent: b54cb23) | patch
parisc: disable preemption while flushing D- or I-caches through TMPALIAS region
authorJohn David Anglin <dave.anglin@bell.net>
Sat, 2 Feb 2013 23:41:24 +0000 (23:41 +0000)
committerHelge Deller <deller@gmx.de>
Wed, 20 Feb 2013 21:50:38 +0000 (22:50 +0100)
commit027f27c4eca00b4411fb1fe61c33060569ff73f6
treee77e9bfb6a9a6ce40feb22937390c40987eea0bdtree | snapshot
parentb54cb2332e387f29c65f19f3620e5c812c89a328commit | diff
parisc: disable preemption while flushing D- or I-caches through TMPALIAS region

It is necessary to disable preemption during cache flushes done through the
TMPALIAS region to ensure that the TLB setup is not clobbered by another flush.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
arch/parisc/include/asm/cacheflush.h diff | blob | history
arch/parisc/kernel/cache.c diff | blob | history
Domain: System / Kernel;