spi: zynqmp_gqspi: Fix dma alignment issue
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Fri, 20 Aug 2021 13:43:17 +0000 (07:43 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 3 Sep 2021 07:15:01 +0000 (09:15 +0200)
commit020b353be9e6c12ebf49333a81e02d582578f560
tree1d2b08a13e95f72693eba96849b22b54ea86401f
parent72022a5b2e142d4696964ffd354a01b67eb4fa72
spi: zynqmp_gqspi: Fix dma alignment issue

DMA is aligned to ARCH_DMA_MINALIGN(64 bytes), but as per spec, alignment
required is 4bytes only. Change DMA alignment from ARCH_DMA_MINALIGN to
GQSPI_DMA_ALIGN. Remove alignment of data length in non-exponential case.

Some minor improvements in the initialization to initialize gen_fifo
threshold and disable qspi controller while setting config register.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/spi/zynqmp_gqspi.c