[MachineCombiner] Support for floating-point FMA on ARM64 (re-commit r267098)
authorGerolf Hoflehner <ghoflehner@apple.com>
Sun, 24 Apr 2016 05:14:01 +0000 (05:14 +0000)
committerGerolf Hoflehner <ghoflehner@apple.com>
Sun, 24 Apr 2016 05:14:01 +0000 (05:14 +0000)
commit01b3a6184aae0b5ef1e2cccd4bb8da8d6a0df68a
tree935cd91c560d5ade3b118bd4ede0ec519bc26601
parent9cf3bf659c7f2e447517115443bc1efb1693b541
[MachineCombiner] Support for floating-point FMA on ARM64 (re-commit r267098)

The original patch caused crashes because it could derefence a null pointer
for SelectionDAGTargetInfo for targets that do not define it.

Evaluates fmul+fadd -> fmadd combines and similar code sequences in the
machine combiner. It adds support for float and double similar to the existing
integer implementation. The key features are:

- DAGCombiner checks whether it should combine greedily or let the machine
combiner do the evaluation. This is only supported on ARM64.
- It gives preference to throughput over latency: the heuristic used is
to combine always in loops. The targets decides whether the machine
combiner should optimize for throughput or latency.
- Supports for fmadd, f(n)msub, fmla, fmls patterns
- On by default at O3 ffast-math

llvm-svn: 267328
12 files changed:
llvm/include/llvm/CodeGen/MachineCombinerPattern.h
llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
llvm/include/llvm/Target/TargetInstrInfo.h
llvm/lib/CodeGen/MachineCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/TargetInstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.h
llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
llvm/test/CodeGen/AArch64/arm64-fma-combines.ll [new file with mode: 0644]
llvm/test/CodeGen/AArch64/arm64-fml-combines.ll [new file with mode: 0644]