projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 9b3c2a7) | patch
[AMDGPU] Base getSubRegFromChannel on TableGen data
authorCarl Ritson <carl.ritson@amd.com>
Wed, 14 Oct 2020 10:56:38 +0000 (19:56 +0900)
committerCarl Ritson <carl.ritson@amd.com>
Wed, 14 Oct 2020 11:25:09 +0000 (20:25 +0900)
commit01549dd976faa93dcf18d7363ccf8b2509833f7c
tree5076f0c6eb9156ca05279e967c691e2953249139tree | snapshot
parent9b3c2a72e4cb3b0ae27f87064c11f728452b2af9commit | diff
[AMDGPU] Base getSubRegFromChannel on TableGen data

Generate (at runtime) the table used to drive getSubRegFromChannel,
base on AMDGPUSubRegIdxRanges from TableGen data.
The is a step closer to it being staticly generated by TableGen and
allows getSubRegFromChannel handle all bitwidths in the mean time.

Reviewed By: rampitec, arsenm, foad

Differential Revision: https://reviews.llvm.org/D89217
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIRegisterInfo.h diff | blob | history
Domain: System / Toolchain;