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(parent: e54b6a3) | patch
IB/mlx5: Fix MR cache initialization
authorArtemy Kovalyov <artemyko@mellanox.com>
Mon, 15 Oct 2018 11:13:35 +0000 (14:13 +0300)
committerJason Gunthorpe <jgg@mellanox.com>
Tue, 16 Oct 2018 14:30:37 +0000 (08:30 -0600)
commit013c2403bf32e48119aeb13126929f81352cc7ac
tree64d36005c88f0892cee470f7356d93bcd9e0ddc6tree | snapshot
parente54b6a3bcd1ec972b25a164bdf495d9e7120b107commit | diff
IB/mlx5: Fix MR cache initialization

Schedule MR cache work only after bucket was initialized.

Cc: <stable@vger.kernel.org> # 4.10
Fixes: 49780d42dfc9 ("IB/mlx5: Expose MR cache for mlx5_ib")
Signed-off-by: Artemy Kovalyov <artemyko@mellanox.com>
Reviewed-by: Majd Dibbiny <majd@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/mlx5/mr.c diff | blob | history
Domain: System / Kernel;