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(parent: 9b2fece) | patch
[RISCV] Move -riscv-v-vector-bits-max/min options to RISCVTargetMachine.
authorCraig Topper <craig.topper@sifive.com>
Tue, 20 Dec 2022 19:52:52 +0000 (11:52 -0800)
committerCraig Topper <craig.topper@sifive.com>
Tue, 20 Dec 2022 19:55:33 +0000 (11:55 -0800)
commit011cbb3912c7c772c10837b393114ecf0d6ad416
tree2d7994e481a58d05417404fbf63748dfeca63633tree | snapshot
parent9b2fecec406d6a6bcda9fbb9251db2ae202c7400commit | diff
[RISCV] Move -riscv-v-vector-bits-max/min options to RISCVTargetMachine.

Split from D139873.

Reviewed By: reames, kito-cheng

Differential Revision: https://reviews.llvm.org/D140283
llvm/lib/Target/RISCV/RISCVSubtarget.cpp diff | blob | history
llvm/lib/Target/RISCV/RISCVSubtarget.h diff | blob | history
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp diff | blob | history
Domain: System / Toolchain;