ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4
authorIllia Smyrnov <illia.smyrnov@globallogic.com>
Wed, 5 Feb 2014 15:06:09 +0000 (17:06 +0200)
committerPaul Walmsley <paul@pwsan.com>
Wed, 19 Feb 2014 19:07:00 +0000 (12:07 -0700)
commit01142519ffc0734436f26b01aeed37a915dece05
treec253f4a5c54949e7302f26947a09fcb2443b724b
parentc317d0f241fa0bbb098aa35f3d4b3067be2b5f3d
ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4

Commit 313a76e (ARM: OMAP2+: hwmod: Fix SOFTRESET logic) introduced
softreset bit cleaning right after set one. It is caused L3 error for
OMAP4 ISS because ISS register write occurs when ISS reset process is in
progress. Avoid this situation by cleaning softreset bit later, when reset
process is successfully finished.

Signed-off-by: Illia Smyrnov <illia.smyrnov@globallogic.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/omap_hwmod.c