[RISCV] Check register class for AMO memory operands
authorJames Clarke <jrtc27@jrtc27.com>
Mon, 13 Jan 2020 00:50:37 +0000 (00:50 +0000)
committerJames Clarke <jrtc27@jrtc27.com>
Mon, 13 Jan 2020 00:50:37 +0000 (00:50 +0000)
commit0113cf193f0610bb1a5dfa0bcd29c41a8965938a
tree0495e335b6a396cbe256dbfa7c46fc161fd77200
parent54b2914accb4f5c9b58305fd6da405d20a47c452
[RISCV] Check register class for AMO memory operands

Summary:
AMO memory operands use a custom parser in order to accept both (reg)
and 0(reg). However, the validation predicate used for these operands
was only checking that they were registers, and not the register class,
so non-GPRs (such as FPRs) were also accepted. Thus, fix this by making
the predicate check that they are GPRs.

Reviewers: asb, lenary

Reviewed By: asb, lenary

Subscribers: hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72471
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoA.td
llvm/test/MC/RISCV/rva-aliases-invalid.s