RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA
authorEvan Green <evan@rivosinc.com>
Fri, 7 Apr 2023 23:11:00 +0000 (16:11 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 18 Apr 2023 22:48:15 +0000 (15:48 -0700)
commit00e76e2c6a2bd3976d44d4a1fdd0b7a3c2566607
treee91ab150e68efe1fede881b4f77704ff280e121f
parentea3de9ce8aa280c5175c835bd3e94a3a9b814b74
RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA

We have an implicit set of base behaviors that userspace depends on,
which are mostly defined in various ISA specifications.

Co-developed-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Evan Green <evan@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Tested-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Reviewed-by: Paul Walmsley <paul.walmsley@sifive.com>
Link: https://lore.kernel.org/r/20230407231103.2622178-4-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/riscv/hwprobe.rst
arch/riscv/include/asm/hwprobe.h
arch/riscv/include/uapi/asm/hwprobe.h
arch/riscv/kernel/sys_riscv.c