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(parent: b92332e) | patch
clk: meson: mpll: add rw operation
authorJerome Brunet <jbrunet@baylibre.com>
Thu, 9 Mar 2017 10:41:50 +0000 (11:41 +0100)
committerMichael Turquette <mturquette@baylibre.com>
Mon, 27 Mar 2017 19:30:18 +0000 (12:30 -0700)
commit007e6e5c5f01d379da91e0e30f83245022fd2579
treeba18d708147c3dadee0abb42fd83d07d09b89478tree | snapshot
parentb92332eea8a3406020411e61f84affb479fdc69ecommit | diff
clk: meson: mpll: add rw operation

This patch adds new callbacks to the meson-mpll driver to control
and set the pll rate. For this, we also need to add the enable bit and
sdm enable bit. The corresponding parameters are added to mpll data
structure.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20170309104154.28295-6-jbrunet@baylibre.com
drivers/clk/meson/clk-mpll.c diff | blob | history
drivers/clk/meson/clkc.h diff | blob | history
drivers/clk/meson/gxbb.c diff | blob | history
Domain: System / Kernel;