[X86][BtVer2] Improve simulation of (V)PINSR values
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 18 May 2018 17:09:41 +0000 (17:09 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 18 May 2018 17:09:41 +0000 (17:09 +0000)
commit007b50fd35d1fb3f77a8a9bd6ca64e6dc38bafc8
tree769fff869651a4172bedfe1862a1c9db5800baeb
parentb55009086931aa3c85fe3313dcfe005895d1f4ca
[X86][BtVer2] Improve simulation of (V)PINSR values

Include the 6cy delay transferring from the GPR to FPU.

llvm-svn: 332737
llvm/lib/Target/X86/X86ScheduleBtVer2.td
llvm/test/CodeGen/X86/mmx-schedule.ll
llvm/test/CodeGen/X86/sse2-schedule.ll
llvm/test/CodeGen/X86/sse41-schedule.ll
llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s
llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s
llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse41.s