drm/i915/bxt, glk: Avoid long atomic poll during CDCLK change
authorImre Deak <imre.deak@intel.com>
Tue, 30 Jan 2018 14:29:39 +0000 (16:29 +0200)
committerImre Deak <imre.deak@intel.com>
Thu, 1 Feb 2018 19:13:21 +0000 (21:13 +0200)
commit006bb4ccac3901d790b56ed4729cd4080a77a895
treef385d96a4b83498b863e96f8b7bb03072d537a7b
parente76019a81921e87a4d9e7b3d86102bc708a6c227
drm/i915/bxt, glk: Avoid long atomic poll during CDCLK change

There is no requirement for doing the PCODE request polling atomically,
so do that only for a short time switching to sleeping poll afterwards.
The specification requires a 150usec timeout for the change notification,
so let's use that for the atomic poll. Do the extra 2ms poll - needed as
a workaround on BXT/GLK - in sleeping mode.

v2:
- rebase on v2 of patchset dropping the sandybridge_pcode_read/write
  refactoring (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180130142939.17983-2-imre.deak@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_cdclk.c
drivers/gpu/drm/i915/intel_pm.c