spi/pxa2xx: enable multiblock DMA transfers for LPSS devices
authorMika Westerberg <mika.westerberg@linux.intel.com>
Tue, 5 Mar 2013 10:05:17 +0000 (12:05 +0200)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 12 Mar 2013 18:30:56 +0000 (18:30 +0000)
commit0054e28dc9d2d7c43b569ed5d491bc8bc2f903a9
tree90e0c1c28f991899c9a3adbebacb6da3c36165fc
parentc134634077942404a285f6b64bc1ce5932ac22fe
spi/pxa2xx: enable multiblock DMA transfers for LPSS devices

Intel LPSS SPI controllers need to have bit 0 (disable_ssp_dma_finish) set
in SSP_REG in order to properly perform DMA transfers spanning over
multiple blocks.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
drivers/spi/spi-pxa2xx.c