[X86] `X86TargetLowering`: override `allowsMemoryAccess()`
authorRoman Lebedev <lebedev.ri@gmail.com>
Sat, 21 Jan 2023 21:12:27 +0000 (00:12 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Sat, 21 Jan 2023 21:12:28 +0000 (00:12 +0300)
commit005173cbb609f79adc2018e378bc6897cf84b06d
tree98033b8b22f227f527b1f073ecec16c66c5dc447
parent898fcfac216e21860d5f687e6cbb61623ff42061
[X86] `X86TargetLowering`: override `allowsMemoryAccess()`

The baseline `allowsMemoryAccess()` is wrong for X86.
It assumes that aligned memory operations are always allowed,
but that is not true.

For example, We can not perform a 32-byte aligned non-temporal load
of a 32-byte vector, without AVX2 that is, yet `allowsMemoryAccess()`
will say it is allowed, so we may end up merging non-temporal loads,
only to split them up to legalize them, and here we go again.

NOTE: the test changes here are superfluous. The main effect is that without this change,
in D141777, we'd get stuck endlessly merging and splitting non-temporal stores.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D141776
18 files changed:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/test/CodeGen/X86/add-sub-bool.ll
llvm/test/CodeGen/X86/bswap-wide-int.ll
llvm/test/CodeGen/X86/fshl.ll
llvm/test/CodeGen/X86/fshr.ll
llvm/test/CodeGen/X86/i128-add.ll
llvm/test/CodeGen/X86/icmp-shift-opt.ll
llvm/test/CodeGen/X86/legalize-shl-vec.ll
llvm/test/CodeGen/X86/merge-consecutive-stores-nt.ll
llvm/test/CodeGen/X86/setcc-wide-types.ll
llvm/test/CodeGen/X86/smin.ll
llvm/test/CodeGen/X86/smul-with-overflow.ll
llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
llvm/test/CodeGen/X86/umin.ll
llvm/test/CodeGen/X86/umul-with-overflow.ll
llvm/test/CodeGen/X86/wide-integer-cmp.ll
llvm/test/CodeGen/X86/xaluo128.ll