spi: mxic: Add support for pipelined ECC operations
authorMiquel Raynal <miquel.raynal@bootlin.com>
Wed, 2 Feb 2022 14:45:36 +0000 (15:45 +0100)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Thu, 10 Feb 2022 08:32:30 +0000 (09:32 +0100)
commit00360ebae483e603d55ec9a7231b787cb80ffe13
tree896d1b7f2add039af3365230230c64cf0e18aae1
parent33fce1d8bfa8220eb3edf5b3691a411a9191d0b1
spi: mxic: Add support for pipelined ECC operations

Some SPI-NAND chips do not have a proper on-die ECC engine providing
error correction/detection. This is particularly an issue on embedded
devices with limited resources because all the computations must
happen in software, unless an external hardware engine is provided.

These external engines are new and can be of two categories: external
or pipelined. Macronix is providing both, the former being already
supported. The second, however, is very SoC implementation dependent
and must be instantiated by the SPI host controller directly.

An entire subsystem has been contributed to support these engines which
makes the insertion into another subsystem such as SPI quite
straightforward without the need for a lot of specific functions.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20220202144536.393792-1-miquel.raynal@bootlin.com
drivers/spi/Kconfig
drivers/spi/spi-mxic.c
include/linux/mtd/nand-ecc-mxic.h
include/linux/mtd/nand.h