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(parent: c47f260) | patch
ARM:clock:cpufreq: Correct MPLL clock and DTS binding
authorLukasz Majewski <l.majewski@samsung.com>
Fri, 5 Apr 2013 16:31:42 +0000 (18:31 +0200)
committerChanho Park <chanho61.park@samsung.com>
Tue, 18 Nov 2014 02:42:58 +0000 (11:42 +0900)
commit0017993a692431509e8e6d69fef52e38111f0a13
tree9ed9dd207c61d642798ce6b0b30f00442d92b04btree | snapshot
parentc47f2601c52d7c455e5f9c2c90c0c08c95a3ce1acommit | diff
ARM:clock:cpufreq: Correct MPLL clock and DTS binding

According to specification the mout_mpll_user_c clock shall be used instead
of sclk.

Moreover correct clock number (18) was assigned to mout_mpll_user_c.
It coply with ./Documentation/devicetree/bindings/clock/exynos4-clock.txt

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
arch/arm/boot/dts/exynos4x12.dtsi diff | blob | history
drivers/cpufreq/exynos4x12-cpufreq.c diff | blob | history
Domain: System / Kernel;