X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=src%2Fv8%2Fsrc%2Fx64%2Fdisasm-x64.cc;h=e9b1373cd2b0933c60eed4af7fd80580fad7b4a0;hb=ff3e2503a20db9193d323c1d19c38c68004dec4a;hp=76b541c01002b0f8ec1cb53f3220b8914d7ae0f1;hpb=7338fba38ba696536d1cc9d389afd716a6ab2fe6;p=platform%2Fframework%2Fweb%2Fcrosswalk.git diff --git a/src/v8/src/x64/disasm-x64.cc b/src/v8/src/x64/disasm-x64.cc index 76b541c..e9b1373 100644 --- a/src/v8/src/x64/disasm-x64.cc +++ b/src/v8/src/x64/disasm-x64.cc @@ -338,6 +338,17 @@ class DisassemblerX64 { OPERAND_QUADWORD_SIZE = 3 }; + enum { + rax = 0, + rcx = 1, + rdx = 2, + rbx = 3, + rsp = 4, + rbp = 5, + rsi = 6, + rdi = 7 + }; + const NameConverter& converter_; v8::internal::EmbeddedVector tmp_buffer_; unsigned int tmp_buffer_pos_; @@ -934,6 +945,7 @@ int DisassemblerX64::RegisterFPUInstruction(int escape_opcode, case 0xF5: mnem = "fprem1"; break; case 0xF7: mnem = "fincstp"; break; case 0xF8: mnem = "fprem"; break; + case 0xFC: mnem = "frndint"; break; case 0xFD: mnem = "fscale"; break; case 0xFE: mnem = "fsin"; break; case 0xFF: mnem = "fcos"; break; @@ -956,6 +968,8 @@ int DisassemblerX64::RegisterFPUInstruction(int escape_opcode, has_register = true; } else if (modrm_byte == 0xE2) { mnem = "fclex"; + } else if (modrm_byte == 0xE3) { + mnem = "fninit"; } else { UnimplementedInstruction(); } @@ -1038,6 +1052,22 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { current += PrintRightOperand(current); AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), (*current) & 3); current += 1; + } else if (third_byte == 0x21) { + get_modrm(*current, &mod, ®op, &rm); + // insertps xmm, xmm, imm8 + AppendToBuffer("insertps %s,%s,%d", + NameOfXMMRegister(regop), + NameOfXMMRegister(rm), + (*(current + 1)) & 3); + current += 2; + } else if (third_byte == 0x22) { + get_modrm(*current, &mod, ®op, &rm); + // pinsrd xmm, reg32, imm8 + AppendToBuffer("pinsrd %s,%s,%d", + NameOfXMMRegister(regop), + NameOfCPURegister(rm), + (*(current + 1)) & 3); + current += 2; } else if (third_byte == 0x0b) { get_modrm(*current, &mod, ®op, &rm); // roundsd xmm, xmm/m64, imm8 @@ -1048,6 +1078,16 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { } else { UnimplementedInstruction(); } + } else if (opcode == 0x38) { + byte third_byte = *current; + current = data + 3; + if (third_byte == 0x40) { + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("pmulld %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + } else { + UnimplementedInstruction(); + } } else { get_modrm(*current, &mod, ®op, &rm); if (opcode == 0x1f) { @@ -1077,6 +1117,24 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { AppendToBuffer("movdqa %s,", NameOfXMMRegister(regop)); current += PrintRightXMMOperand(current); + } else if (opcode == 0x70) { + AppendToBuffer("pshufd %s,", + NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + AppendToBuffer(",0x%x", (*current) & 0xff); + current += 1; + } else if (opcode == 0x5B) { + AppendToBuffer("cvtps2dq %s,", + NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + } else if (opcode == 0xFE) { + AppendToBuffer("paddd %s,", + NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + } else if (opcode == 0xFA) { + AppendToBuffer("psubd %s,", + NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); } else if (opcode == 0x7E) { AppendToBuffer("mov%c ", rex_w() ? 'q' : 'd'); @@ -1093,6 +1151,23 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { } else if (opcode == 0x50) { AppendToBuffer("movmskpd %s,", NameOfCPURegister(regop)); current += PrintRightXMMOperand(current); + } else if (opcode == 0x62) { + AppendToBuffer("punpackldq %s,", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + } else if (opcode == 0x72) { + AppendToBuffer(regop == rsi ? "pslld " + : regop == rdx ? "psrld" : "psrad"); + current += PrintRightXMMOperand(current); + AppendToBuffer(",0x%x", (*current) & 0xff); + current += 1; + } else if (opcode == 0x73) { + AppendToBuffer("psrldq "); + current += PrintRightXMMOperand(current); + AppendToBuffer(",0x%x", (*current) & 0xff); + current += 1; + } else if (opcode == 0xF4) { + AppendToBuffer("pmuludq %s,", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); } else { const char* mnemonic = "?"; if (opcode == 0x54) { @@ -1105,6 +1180,16 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { mnemonic = "ucomisd"; } else if (opcode == 0x2F) { mnemonic = "comisd"; + } else if (opcode == 0x66) { + mnemonic = "pcmpgtd"; + } else if (opcode == 0x76) { + mnemonic = "pcmpeqd"; + } else if (opcode == 0xD2) { + mnemonic = "psrld"; + } else if (opcode == 0xE2) { + mnemonic = "psrad"; + } else if (opcode == 0xF2) { + mnemonic = "pslld"; } else { UnimplementedInstruction(); } @@ -1249,6 +1334,21 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { current += PrintRightXMMOperand(current); AppendToBuffer(",%s", NameOfXMMRegister(regop)); + } else if (opcode == 0x10) { + // movups xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("movups %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x11) { + // movups xmm/m128, xmm + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("movups "); + current += PrintRightXMMOperand(current); + AppendToBuffer(", %s", NameOfXMMRegister(regop)); + } else if (opcode == 0xA2) { // CPUID AppendToBuffer("%s", mnemonic); @@ -1292,6 +1392,100 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { AppendToBuffer(", %d", (*current) & 3); current += 1; + } else if (opcode == 0xC6) { + // shufps xmm, xmm/m128, imm8 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("shufps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + AppendToBuffer(", %d", (*current) & 3); + current += 1; + + } else if (opcode == 0x54) { + // andps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("andps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x56) { + // orps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("orps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x58) { + // addps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("addps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x59) { + // mulps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("mulps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x5C) { + // subps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("subps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x5E) { + // divps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("divps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x5D) { + // minps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("minps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x5F) { + // maxps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("maxps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x5B) { + // cvtdq2ps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("cvtdq2ps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + + } else if (opcode == 0x53) { + // rcpps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("rcpps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x52) { + // rsqrtps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("rsqrtps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + + } else if (opcode == 0x51) { + // sqrtps xmm, xmm/m128 + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + AppendToBuffer("sqrtps %s, ", NameOfXMMRegister(regop)); + current += PrintRightXMMOperand(current); + } else if (opcode == 0x50) { // movmskps reg, xmm int mod, regop, rm; @@ -1299,6 +1493,26 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) { AppendToBuffer("movmskps %s,", NameOfCPURegister(regop)); current += PrintRightXMMOperand(current); + } else if (opcode == 0xC2) { + // Intel manual 2A, Table 3-11. + int mod, regop, rm; + get_modrm(*current, &mod, ®op, &rm); + const char* const pseudo_op[] = { + "cmpeqps", + "cmpltps", + "cmpleps", + "cmpunordps", + "cmpneqps", + "cmpnltps", + "cmpnleps", + "cmpordps" + }; + AppendToBuffer("%s %s,%s", + pseudo_op[current[1]], + NameOfXMMRegister(regop), + NameOfXMMRegister(rm)); + current += 2; + } else if ((opcode & 0xF0) == 0x80) { // Jcc: Conditional jump (branch). current = data + JumpConditional(data); @@ -1448,7 +1662,8 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector out_buffer, data += 3; break; case OPERAND_DOUBLEWORD_SIZE: - addr = reinterpret_cast(*reinterpret_cast(data + 1)); + addr = + reinterpret_cast(*reinterpret_cast(data + 1)); data += 5; break; case OPERAND_QUADWORD_SIZE: