X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=sim%2Farm%2Farmsupp.c;h=e2bac550457195253612d841f241e81af4e0664f;hb=3cb2ab1a46e0764d4bf712f22c66c64c02dffb64;hp=2d0390d1cbe6b99c11e8550c3f7fd9410b7ea8f7;hpb=f1129fb8ff9938330168992fb23ed35e37d82d61;p=platform%2Fupstream%2Fbinutils.git diff --git a/sim/arm/armsupp.c b/sim/arm/armsupp.c index 2d0390d..e2bac55 100644 --- a/sim/arm/armsupp.c +++ b/sim/arm/armsupp.c @@ -3,7 +3,7 @@ This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or + the Free Software Foundation; either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, @@ -12,75 +12,24 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + along with this program; if not, see . */ #include "armdefs.h" #include "armemu.h" #include "ansidecl.h" -/***************************************************************************\ -* Definitions for the support routines * -\***************************************************************************/ - -ARMword ARMul_GetReg (ARMul_State * state, unsigned mode, unsigned reg); -void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, - ARMword value); -ARMword ARMul_GetPC (ARMul_State * state); -ARMword ARMul_GetNextPC (ARMul_State * state); -void ARMul_SetPC (ARMul_State * state, ARMword value); -ARMword ARMul_GetR15 (ARMul_State * state); -void ARMul_SetR15 (ARMul_State * state, ARMword value); - -ARMword ARMul_GetCPSR (ARMul_State * state); -void ARMul_SetCPSR (ARMul_State * state, ARMword value); -ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode); -void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value); - -void ARMul_CPSRAltered (ARMul_State * state); -void ARMul_R15Altered (ARMul_State * state); - -ARMword ARMul_SwitchMode (ARMul_State * state, ARMword oldmode, - ARMword newmode); -static ARMword ModeToBank (ARMword mode); - -unsigned ARMul_NthReg (ARMword instr, unsigned number); - -void ARMul_NegZero (ARMul_State * state, ARMword result); -void ARMul_AddCarry (ARMul_State * state, ARMword a, ARMword b, - ARMword result); -void ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, - ARMword result); -void ARMul_SubCarry (ARMul_State * state, ARMword a, ARMword b, - ARMword result); -void ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b, - ARMword result); - -void ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address); -void ARMul_STC (ARMul_State * state, ARMword instr, ARMword address); -void ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source); -ARMword ARMul_MRC (ARMul_State * state, ARMword instr); -void ARMul_CDP (ARMul_State * state, ARMword instr); -unsigned IntPending (ARMul_State * state); - -ARMword ARMul_Align (ARMul_State * state, ARMword address, ARMword data); - -void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay, - unsigned (*what) ()); -void ARMul_EnvokeEvent (ARMul_State * state); -unsigned long ARMul_Time (ARMul_State * state); -static void EnvokeList (ARMul_State * state, unsigned long from, - unsigned long to); +/* Definitions for the support routines. */ + +static ARMword ModeToBank (ARMword); +static void EnvokeList (ARMul_State *, unsigned long, unsigned long); struct EventNode -{ /* An event list node */ - unsigned (*func) (); /* The function to call */ +{ /* An event list node. */ + unsigned (*func) (ARMul_State *); /* The function to call. */ struct EventNode *next; }; -/***************************************************************************\ -* This routine returns the value of a register from a mode. * -\***************************************************************************/ +/* This routine returns the value of a register from a mode. */ ARMword ARMul_GetReg (ARMul_State * state, unsigned mode, unsigned reg) @@ -92,9 +41,7 @@ ARMul_GetReg (ARMul_State * state, unsigned mode, unsigned reg) return (state->Reg[reg]); } -/***************************************************************************\ -* This routine sets the value of a register for a mode. * -\***************************************************************************/ +/* This routine sets the value of a register for a mode. */ void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, ARMword value) @@ -106,35 +53,29 @@ ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, ARMword value) state->Reg[reg] = value; } -/***************************************************************************\ -* This routine returns the value of the PC, mode independently. * -\***************************************************************************/ +/* This routine returns the value of the PC, mode independently. */ ARMword ARMul_GetPC (ARMul_State * state) { if (state->Mode > SVC26MODE) - return (state->Reg[15]); + return state->Reg[15]; else - return (R15PC); + return R15PC; } -/***************************************************************************\ -* This routine returns the value of the PC, mode independently. * -\***************************************************************************/ +/* This routine returns the value of the PC, mode independently. */ ARMword ARMul_GetNextPC (ARMul_State * state) { if (state->Mode > SVC26MODE) - return (state->Reg[15] + isize); + return state->Reg[15] + isize; else - return ((state->Reg[15] + isize) & R15PCBITS); + return (state->Reg[15] + isize) & R15PCBITS; } -/***************************************************************************\ -* This routine sets the value of the PC. * -\***************************************************************************/ +/* This routine sets the value of the PC. */ void ARMul_SetPC (ARMul_State * state, ARMword value) @@ -146,9 +87,7 @@ ARMul_SetPC (ARMul_State * state, ARMword value) FLUSHPIPE; } -/***************************************************************************\ -* This routine returns the value of register 15, mode independently. * -\***************************************************************************/ +/* This routine returns the value of register 15, mode independently. */ ARMword ARMul_GetR15 (ARMul_State * state) @@ -159,9 +98,7 @@ ARMul_GetR15 (ARMul_State * state) return (R15PC | ECC | ER15INT | EMODE); } -/***************************************************************************\ -* This routine sets the value of Register 15. * -\***************************************************************************/ +/* This routine sets the value of Register 15. */ void ARMul_SetR15 (ARMul_State * state, ARMword value) @@ -176,9 +113,7 @@ ARMul_SetR15 (ARMul_State * state, ARMword value) FLUSHPIPE; } -/***************************************************************************\ -* This routine returns the value of the CPSR * -\***************************************************************************/ +/* This routine returns the value of the CPSR. */ ARMword ARMul_GetCPSR (ARMul_State * state) @@ -186,9 +121,7 @@ ARMul_GetCPSR (ARMul_State * state) return (CPSR | state->Cpsr); } -/***************************************************************************\ -* This routine sets the value of the CPSR * -\***************************************************************************/ +/* This routine sets the value of the CPSR. */ void ARMul_SetCPSR (ARMul_State * state, ARMword value) @@ -197,17 +130,18 @@ ARMul_SetCPSR (ARMul_State * state, ARMword value) ARMul_CPSRAltered (state); } -/***************************************************************************\ -* This routine does all the nasty bits involved in a write to the CPSR, * -* including updating the register bank, given a MSR instruction. * -\***************************************************************************/ +/* This routine does all the nasty bits involved in a write to the CPSR, + including updating the register bank, given a MSR instruction. */ void ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) { state->Cpsr = ARMul_GetCPSR (state); - if (state->Bank != USERBANK) - { /* In user mode, only write flags */ + + if (state->Mode != USER26MODE + && state->Mode != USER32MODE) + { + /* In user mode, only write flags. */ if (BIT (16)) SETPSR_C (state->Cpsr, rhs); if (BIT (17)) @@ -220,9 +154,7 @@ ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) ARMul_CPSRAltered (state); } -/***************************************************************************\ -* Get an SPSR from the specified mode * -\***************************************************************************/ +/* Get an SPSR from the specified mode. */ ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode) @@ -235,9 +167,7 @@ ARMul_GetSPSR (ARMul_State * state, ARMword mode) return state->Spsr[bank]; } -/***************************************************************************\ -* This routine does a write to an SPSR * -\***************************************************************************/ +/* This routine does a write to an SPSR. */ void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value) @@ -248,9 +178,7 @@ ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value) state->Spsr[bank] = value; } -/***************************************************************************\ -* This routine does a write to the current SPSR, given an MSR instruction * -\***************************************************************************/ +/* This routine does a write to the current SPSR, given an MSR instruction. */ void ARMul_FixSPSR (ARMul_State * state, ARMword instr, ARMword rhs) @@ -268,10 +196,8 @@ ARMul_FixSPSR (ARMul_State * state, ARMword instr, ARMword rhs) } } -/***************************************************************************\ -* This routine updates the state of the emulator after the Cpsr has been * -* changed. Both the processor flags and register bank are updated. * -\***************************************************************************/ +/* This routine updates the state of the emulator after the Cpsr has been + changed. Both the processor flags and register bank are updated. */ void ARMul_CPSRAltered (ARMul_State * state) @@ -329,11 +255,9 @@ ARMul_CPSRAltered (ARMul_State * state) } } -/***************************************************************************\ -* This routine updates the state of the emulator after register 15 has * -* been changed. Both the processor flags and register bank are updated. * -* This routine should only be called from a 26 bit mode. * -\***************************************************************************/ +/* This routine updates the state of the emulator after register 15 has + been changed. Both the processor flags and register bank are updated. + This routine should only be called from a 26 bit mode. */ void ARMul_R15Altered (ARMul_State * state) @@ -343,22 +267,23 @@ ARMul_R15Altered (ARMul_State * state) state->Mode = ARMul_SwitchMode (state, state->Mode, R15MODE); state->NtransSig = (state->Mode & 3) ? HIGH : LOW; } + if (state->Mode > SVC26MODE) state->Emulate = CHANGEMODE; + ASSIGNR15INT (R15INT); + ASSIGNN ((state->Reg[15] & NBIT) != 0); ASSIGNZ ((state->Reg[15] & ZBIT) != 0); ASSIGNC ((state->Reg[15] & CBIT) != 0); ASSIGNV ((state->Reg[15] & VBIT) != 0); } -/***************************************************************************\ -* This routine controls the saving and restoring of registers across mode * -* changes. The regbank matrix is largely unused, only rows 13 and 14 are * -* used across all modes, 8 to 14 are used for FIQ, all others use the USER * -* column. It's easier this way. old and new parameter are modes numbers. * -* Notice the side effect of changing the Bank variable. * -\***************************************************************************/ +/* This routine controls the saving and restoring of registers across mode + changes. The regbank matrix is largely unused, only rows 13 and 14 are + used across all modes, 8 to 14 are used for FIQ, all others use the USER + column. It's easier this way. old and new parameter are modes numbers. + Notice the side effect of changing the Bank variable. */ ARMword ARMul_SwitchMode (ARMul_State * state, ARMword oldmode, ARMword newmode) @@ -370,10 +295,12 @@ ARMul_SwitchMode (ARMul_State * state, ARMword oldmode, ARMword newmode) oldbank = ModeToBank (oldmode); newbank = state->Bank = ModeToBank (newmode); + /* Do we really need to do it? */ if (oldbank != newbank) - { /* really need to do it */ + { + /* Save away the old registers. */ switch (oldbank) - { /* save away the old registers */ + { case USERBANK: case IRQBANK: case SVCBANK: @@ -397,8 +324,9 @@ ARMul_SwitchMode (ARMul_State * state, ARMword oldmode, ARMword newmode) abort (); } + /* Restore the new registers. */ switch (newbank) - { /* restore the new registers */ + { case USERBANK: case IRQBANK: case SVCBANK: @@ -420,16 +348,14 @@ ARMul_SwitchMode (ARMul_State * state, ARMword oldmode, ARMword newmode) break; default: abort (); - } /* switch */ - } /* if */ + } + } return newmode; } -/***************************************************************************\ -* Given a processor mode, this routine returns the register bank that * -* will be accessed in that mode. * -\***************************************************************************/ +/* Given a processor mode, this routine returns the + register bank that will be accessed in that mode. */ static ARMword ModeToBank (ARMword mode) @@ -452,24 +378,21 @@ ModeToBank (ARMword mode) return bankofmode[mode]; } -/***************************************************************************\ -* Returns the register number of the nth register in a reg list. * -\***************************************************************************/ +/* Returns the register number of the nth register in a reg list. */ unsigned ARMul_NthReg (ARMword instr, unsigned number) { unsigned bit, upto; - for (bit = 0, upto = 0; upto <= number; bit++) + for (bit = 0, upto = 0; upto <= number; bit ++) if (BIT (bit)) - upto++; + upto ++; + return (bit - 1); } -/***************************************************************************\ -* Assigns the N and Z flags depending on the value of result * -\***************************************************************************/ +/* Assigns the N and Z flags depending on the value of result. */ void ARMul_NegZero (ARMul_State * state, ARMword result) @@ -488,10 +411,11 @@ ARMul_NegZero (ARMul_State * state, ARMword result) { CLEARN; CLEARZ; - }; + } } /* Compute whether an addition of A and B, giving RESULT, overflowed. */ + int AddOverflow (ARMword a, ARMword b, ARMword result) { @@ -500,6 +424,7 @@ AddOverflow (ARMword a, ARMword b, ARMword result) } /* Compute whether a subtraction of A and B, giving RESULT, overflowed. */ + int SubOverflow (ARMword a, ARMword b, ARMword result) { @@ -507,9 +432,7 @@ SubOverflow (ARMword a, ARMword b, ARMword result) || (POS (a) && NEG (b) && NEG (result))); } -/***************************************************************************\ -* Assigns the C flag after an addition of a and b to give result * -\***************************************************************************/ +/* Assigns the C flag after an addition of a and b to give result. */ void ARMul_AddCarry (ARMul_State * state, ARMword a, ARMword b, ARMword result) @@ -518,9 +441,7 @@ ARMul_AddCarry (ARMul_State * state, ARMword a, ARMword b, ARMword result) (NEG (a) && POS (result)) || (NEG (b) && POS (result))); } -/***************************************************************************\ -* Assigns the V flag after an addition of a and b to give result * -\***************************************************************************/ +/* Assigns the V flag after an addition of a and b to give result. */ void ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) @@ -528,9 +449,7 @@ ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) ASSIGNV (AddOverflow (a, b, result)); } -/***************************************************************************\ -* Assigns the C flag after an subtraction of a and b to give result * -\***************************************************************************/ +/* Assigns the C flag after an subtraction of a and b to give result. */ void ARMul_SubCarry (ARMul_State * state, ARMword a, ARMword b, ARMword result) @@ -539,9 +458,7 @@ ARMul_SubCarry (ARMul_State * state, ARMword a, ARMword b, ARMword result) (NEG (a) && POS (result)) || (POS (b) && POS (result))); } -/***************************************************************************\ -* Assigns the V flag after an subtraction of a and b to give result * -\***************************************************************************/ +/* Assigns the V flag after an subtraction of a and b to give result. */ void ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) @@ -549,12 +466,10 @@ ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) ASSIGNV (SubOverflow (a, b, result)); } -/***************************************************************************\ -* This function does the work of generating the addresses used in an * -* LDC instruction. The code here is always post-indexed, it's up to the * -* caller to get the input address correct and to handle base register * -* modification. It also handles the Busy-Waiting. * -\***************************************************************************/ +/* This function does the work of generating the addresses used in an + LDC instruction. The code here is always post-indexed, it's up to the + caller to get the input address correct and to handle base register + modification. It also handles the Busy-Waiting. */ void ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) @@ -563,14 +478,21 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) ARMword data; UNDEF_LSCPCBaseWb; - if (ADDREXCEPT (address)) + + if (! CP_ACCESS_ALLOWED (state, CPNum)) { - INTERNALABORT (address); + ARMul_UndefInstr (state, instr); + return; } + + if (ADDREXCEPT (address)) + INTERNALABORT (address); + cpab = (state->LDC[CPNum]) (state, ARMul_FIRST, instr, 0); while (cpab == ARMul_BUSY) { ARMul_Icycles (state, 1, 0); + if (IntPending (state)) { cpab = (state->LDC[CPNum]) (state, ARMul_INTERRUPT, instr, 0); @@ -584,30 +506,30 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) CPTAKEABORT; return; } + cpab = (state->LDC[CPNum]) (state, ARMul_TRANSFER, instr, 0); data = ARMul_LoadWordN (state, address); BUSUSEDINCPCN; + if (BIT (21)) LSBase = state->Base; cpab = (state->LDC[CPNum]) (state, ARMul_DATA, instr, data); + while (cpab == ARMul_INC) { address += 4; data = ARMul_LoadWordN (state, address); cpab = (state->LDC[CPNum]) (state, ARMul_DATA, instr, data); } + if (state->abortSig || state->Aborted) - { - TAKEABORT; - } + TAKEABORT; } -/***************************************************************************\ -* This function does the work of generating the addresses used in an * -* STC instruction. The code here is always post-indexed, it's up to the * -* caller to get the input address correct and to handle base register * -* modification. It also handles the Busy-Waiting. * -\***************************************************************************/ +/* This function does the work of generating the addresses used in an + STC instruction. The code here is always post-indexed, it's up to the + caller to get the input address correct and to handle base register + modification. It also handles the Busy-Waiting. */ void ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) @@ -616,10 +538,16 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) ARMword data; UNDEF_LSCPCBaseWb; - if (ADDREXCEPT (address) || VECTORACCESS (address)) + + if (! CP_ACCESS_ALLOWED (state, CPNum)) { - INTERNALABORT (address); + ARMul_UndefInstr (state, instr); + return; } + + if (ADDREXCEPT (address) || VECTORACCESS (address)) + INTERNALABORT (address); + cpab = (state->STC[CPNum]) (state, ARMul_FIRST, instr, &data); while (cpab == ARMul_BUSY) { @@ -632,6 +560,7 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) else cpab = (state->STC[CPNum]) (state, ARMul_BUSY, instr, &data); } + if (cpab == ARMul_CANT) { CPTAKEABORT; @@ -639,36 +568,38 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) } #ifndef MODE32 if (ADDREXCEPT (address) || VECTORACCESS (address)) - { - INTERNALABORT (address); - } + INTERNALABORT (address); #endif BUSUSEDINCPCN; if (BIT (21)) LSBase = state->Base; cpab = (state->STC[CPNum]) (state, ARMul_DATA, instr, &data); ARMul_StoreWordN (state, address, data); + while (cpab == ARMul_INC) { address += 4; cpab = (state->STC[CPNum]) (state, ARMul_DATA, instr, &data); ARMul_StoreWordN (state, address, data); } + if (state->abortSig || state->Aborted) - { - TAKEABORT; - } + TAKEABORT; } -/***************************************************************************\ -* This function does the Busy-Waiting for an MCR instruction. * -\***************************************************************************/ +/* This function does the Busy-Waiting for an MCR instruction. */ void ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) { unsigned cpab; + if (! CP_ACCESS_ALLOWED (state, CPNum)) + { + ARMul_UndefInstr (state, instr); + return; + } + cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source); while (cpab == ARMul_BUSY) @@ -693,9 +624,7 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) } } -/***************************************************************************\ -* This function does the Busy-Waiting for an MRC instruction. * -\***************************************************************************/ +/* This function does the Busy-Waiting for an MRC instruction. */ ARMword ARMul_MRC (ARMul_State * state, ARMword instr) @@ -703,6 +632,12 @@ ARMul_MRC (ARMul_State * state, ARMword instr) unsigned cpab; ARMword result = 0; + if (! CP_ACCESS_ALLOWED (state, CPNum)) + { + ARMul_UndefInstr (state, instr); + return result; + } + cpab = (state->MRC[CPNum]) (state, ARMul_FIRST, instr, &result); while (cpab == ARMul_BUSY) { @@ -718,7 +653,8 @@ ARMul_MRC (ARMul_State * state, ARMword instr) if (cpab == ARMul_CANT) { ARMul_Abort (state, ARMul_UndefinedInstrV); - result = ECC; /* Parent will destroy the flags otherwise */ + /* Parent will destroy the flags otherwise. */ + result = ECC; } else { @@ -726,18 +662,23 @@ ARMul_MRC (ARMul_State * state, ARMword instr) ARMul_Ccycles (state, 1, 0); ARMul_Icycles (state, 1, 0); } - return (result); + + return result; } -/***************************************************************************\ -* This function does the Busy-Waiting for an CDP instruction. * -\***************************************************************************/ +/* This function does the Busy-Waiting for an CDP instruction. */ void ARMul_CDP (ARMul_State * state, ARMword instr) { unsigned cpab; + if (! CP_ACCESS_ALLOWED (state, CPNum)) + { + ARMul_UndefInstr (state, instr); + return; + } + cpab = (state->CDP[CPNum]) (state, ARMul_FIRST, instr); while (cpab == ARMul_BUSY) { @@ -756,9 +697,7 @@ ARMul_CDP (ARMul_State * state, ARMword instr) BUSUSEDN; } -/***************************************************************************\ -* This function handles Undefined instructions, as CP isntruction * -\***************************************************************************/ +/* This function handles Undefined instructions, as CP isntruction. */ void ARMul_UndefInstr (ARMul_State * state, ARMword instr ATTRIBUTE_UNUSED) @@ -766,37 +705,35 @@ ARMul_UndefInstr (ARMul_State * state, ARMword instr ATTRIBUTE_UNUSED) ARMul_Abort (state, ARMul_UndefinedInstrV); } -/***************************************************************************\ -* Return TRUE if an interrupt is pending, FALSE otherwise. * -\***************************************************************************/ +/* Return TRUE if an interrupt is pending, FALSE otherwise. */ unsigned IntPending (ARMul_State * state) { if (state->Exception) - { /* Any exceptions */ + { + /* Any exceptions. */ if (state->NresetSig == LOW) { ARMul_Abort (state, ARMul_ResetV); - return (TRUE); + return TRUE; } else if (!state->NfiqSig && !FFLAG) { ARMul_Abort (state, ARMul_FIQV); - return (TRUE); + return TRUE; } else if (!state->NirqSig && !IFLAG) { ARMul_Abort (state, ARMul_IRQV); - return (TRUE); + return TRUE; } } - return (FALSE); + + return FALSE; } -/***************************************************************************\ -* Align a word access to a non word boundary * -\***************************************************************************/ +/* Align a word access to a non word boundary. */ ARMword ARMul_Align (state, address, data) @@ -807,20 +744,18 @@ ARMul_Align (state, address, data) /* This code assumes the address is really unaligned, as a shift by 32 is undefined in C. */ - address = (address & 3) << 3; /* get the word address */ + address = (address & 3) << 3; /* Get the word address. */ return ((data >> address) | (data << (32 - address))); /* rot right */ } -/***************************************************************************\ -* This routine is used to call another routine after a certain number of * -* cycles have been executed. The first parameter is the number of cycles * -* delay before the function is called, the second argument is a pointer * -* to the function. A delay of zero doesn't work, just call the function. * -\***************************************************************************/ +/* This routine is used to call another routine after a certain number of + cycles have been executed. The first parameter is the number of cycles + delay before the function is called, the second argument is a pointer + to the function. A delay of zero doesn't work, just call the function. */ void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay, - unsigned (*what) ()) + unsigned (*what) (ARMul_State *)) { unsigned long when; struct EventNode *event; @@ -834,10 +769,8 @@ ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay, *(state->EventPtr + when) = event; } -/***************************************************************************\ -* This routine is called at the beginning of every cycle, to envoke * -* scheduled events. * -\***************************************************************************/ +/* This routine is called at the beginning of + every cycle, to envoke scheduled events. */ void ARMul_EnvokeEvent (ARMul_State * state) @@ -846,23 +779,26 @@ ARMul_EnvokeEvent (ARMul_State * state) then = state->Now; state->Now = ARMul_Time (state) % EVENTLISTSIZE; - if (then < state->Now) /* schedule events */ + if (then < state->Now) + /* Schedule events. */ EnvokeList (state, then, state->Now); else if (then > state->Now) - { /* need to wrap around the list */ + { + /* Need to wrap around the list. */ EnvokeList (state, then, EVENTLISTSIZE - 1L); EnvokeList (state, 0L, state->Now); } } +/* Envokes all the entries in a range. */ + static void EnvokeList (ARMul_State * state, unsigned long from, unsigned long to) -/* envokes all the entries in a range */ { - struct EventNode *anevent; - for (; from <= to; from++) { + struct EventNode *anevent; + anevent = *(state->EventPtr + from); while (anevent) { @@ -874,9 +810,7 @@ EnvokeList (ARMul_State * state, unsigned long from, unsigned long to) } } -/***************************************************************************\ -* This routine is returns the number of clock ticks since the last reset. * -\***************************************************************************/ +/* This routine is returns the number of clock ticks since the last reset. */ unsigned long ARMul_Time (ARMul_State * state)