X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=post%2Fcpu%2Fppc4xx%2Fuart.c;h=be217fcf8db85d97bfd1cbd5ef0aeed90040c8da;hb=297a65873d2cb2bd296253af51f59cc1391afbff;hp=f47b48e9dc2d1329aeb5d53d57d88d261b05f05b;hpb=2c3536425d987bf079258973e2acebaaef3e16b6;p=platform%2Fkernel%2Fu-boot.git diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index f47b48e..be217fc 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -32,18 +32,16 @@ * characters are transmitted. */ -#ifdef CONFIG_POST - #include -#if CONFIG_POST & CFG_POST_UART +#if CONFIG_POST & CONFIG_SYS_POST_UART /* * This table defines the UART's that should be tested and can * be overridden in the board config file */ -#ifndef CFG_POST_UART_TABLE -#define CFG_POST_UART_TABLE {UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE} +#ifndef CONFIG_SYS_POST_UART_TABLE +#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE} #endif #include @@ -52,17 +50,17 @@ #if defined(CONFIG_440) #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) -#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000300 -#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000400 -#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000500 -#define UART3_BASE CFG_PERIPHERAL_BASE + 0x00000600 +#define UART0_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000300 +#define UART1_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 +#define UART2_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000500 +#define UART3_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000600 #else -#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000200 -#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000300 +#define UART0_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000200 +#define UART1_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000300 #endif #if defined(CONFIG_440SP) || defined(CONFIG_440SPE) -#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000600 +#define UART2_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000600 #endif #if defined(CONFIG_440GP) @@ -70,7 +68,7 @@ #define CR0_EXTCLK_ENA 0x00600000 #define CR0_UDIV_POS 16 #define UDIV_SUBTRACT 1 -#define UART0_SDR cntrl0 +#define UART0_SDR CPC0_CR0 #define MFREG(a, d) d = mfdcr(a) #define MTREG(a, d) mtdcr(a, d) #else /* #if defined(CONFIG_440GP) */ @@ -79,16 +77,16 @@ #define CR0_EXTCLK_ENA 0x00800000 #define CR0_UDIV_POS 0 #define UDIV_SUBTRACT 0 -#define UART0_SDR sdr_uart0 -#define UART1_SDR sdr_uart1 -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPe) -#define UART2_SDR sdr_uart2 +#define UART0_SDR SDR0_UART0 +#define UART1_SDR SDR0_UART1 +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) +#define UART2_SDR SDR0_UART2 #endif -#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \ - defined(CONFIG_440GR) || defined(CONFIG_440GRx) -#define UART3_SDR sdr_uart3 +#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX) +#define UART3_SDR SDR0_UART3 #endif #define MFREG(a, d) mfsdr(a, d) #define MTREG(a, d) mtsdr(a, d) @@ -108,8 +106,8 @@ #define CR0_EXTCLK_ENA 0x00800000 #define CR0_UDIV_POS 0 #define UDIV_SUBTRACT 0 -#define UART0_SDR sdr_uart0 -#define UART1_SDR sdr_uart1 +#define UART0_SDR SDR0_UART0 +#define UART1_SDR SDR0_UART1 #define MFREG(a, d) mfsdr(a, d) #define MTREG(a, d) mtsdr(a, d) #else /* CONFIG_405GP || CONFIG_405CR */ @@ -149,7 +147,7 @@ DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_440) || defined(CONFIG_405EX) -#if !defined(CFG_EXT_SERIAL_CLOCK) +#if !defined(CONFIG_SYS_EXT_SERIAL_CLOCK) static void serial_divs (int baudrate, unsigned long *pudiv, unsigned short *pbdiv) { @@ -198,7 +196,7 @@ static int uart_post_init (unsigned long dev_base) unsigned long udiv; unsigned short bdiv; volatile char val; -#ifdef CFG_EXT_SERIAL_CLOCK +#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK unsigned long tmp; #endif int i; @@ -211,11 +209,11 @@ static int uart_post_init (unsigned long dev_base) MFREG(UART0_SDR, reg); reg &= ~CR0_MASK; -#ifdef CFG_EXT_SERIAL_CLOCK +#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK reg |= CR0_EXTCLK_ENA; udiv = 1; tmp = gd->baudrate * 16; - bdiv = (CFG_EXT_SERIAL_CLOCK + tmp / 2) / tmp; + bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp; #else /* For 440, the cpu clock is on divider chain A, UART on divider * chain B ... so cpu clock is irrelevant. Get the "optimized" @@ -278,34 +276,34 @@ static int uart_post_init (unsigned long dev_base) clk = tmp = reg = 0; #else #ifdef CONFIG_405EP - reg = mfdcr(cpc0_ucr) & ~(UCR0_MASK | UCR1_MASK); + reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK); clk = gd->cpu_clk; - tmp = CFG_BASE_BAUD * 16; + tmp = CONFIG_SYS_BASE_BAUD * 16; udiv = (clk + tmp / 2) / tmp; if (udiv > UDIV_MAX) /* max. n bits for udiv */ udiv = UDIV_MAX; reg |= (udiv) << UCR0_UDIV_POS; /* set the UART divisor */ reg |= (udiv) << UCR1_UDIV_POS; /* set the UART divisor */ - mtdcr (cpc0_ucr, reg); + mtdcr (CPC0_UCR, reg); #else /* CONFIG_405EP */ - reg = mfdcr(cntrl0) & ~CR0_MASK; -#ifdef CFG_EXT_SERIAL_CLOCK - clk = CFG_EXT_SERIAL_CLOCK; + reg = mfdcr(CPC0_CR0) & ~CR0_MASK; +#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK + clk = CONFIG_SYS_EXT_SERIAL_CLOCK; udiv = 1; reg |= CR0_EXTCLK_ENA; #else clk = gd->cpu_clk; -#ifdef CFG_405_UART_ERRATA_59 +#ifdef CONFIG_SYS_405_UART_ERRATA_59 udiv = 31; /* Errata 59: stuck at 31 */ #else - tmp = CFG_BASE_BAUD * 16; + tmp = CONFIG_SYS_BASE_BAUD * 16; udiv = (clk + tmp / 2) / tmp; if (udiv > UDIV_MAX) /* max. n bits for udiv */ udiv = UDIV_MAX; #endif #endif reg |= (udiv - 1) << CR0_UDIV_POS; /* set the UART divisor */ - mtdcr (cntrl0, reg); + mtdcr (CPC0_CR0, reg); #endif /* CONFIG_405EP */ tmp = gd->baudrate * udiv * 16; bdiv = (clk + tmp / 2) / tmp; @@ -377,7 +375,7 @@ done: int uart_post_test (int flags) { int i, res = 0; - static unsigned long base[] = CFG_POST_UART_TABLE; + static unsigned long base[] = CONFIG_SYS_POST_UART_TABLE; for (i = 0; i < sizeof (base) / sizeof (base[0]); i++) { if (test_ctlr (base[i], i)) @@ -388,5 +386,4 @@ int uart_post_test (int flags) return res; } -#endif /* CONFIG_POST & CFG_POST_UART */ -#endif /* CONFIG_POST */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_UART */