X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=pkg%2FTizen.NET.API11%2Fbuild%2Ftizen11.0%2Fref%2FSystem.Runtime.Intrinsics.xml;h=d13dee62607e3ad3730dc728116422f56d07749c;hb=9584dd2849d1846527f6d076ae3992d7b14e5e8d;hp=729a700a095dec3abccd0b6cb864732eb12e5ec6;hpb=46d64418e623f18e2ae0189b44a281cd32024632;p=platform%2Fcore%2Fcsapi%2Ftizenfx.git diff --git a/pkg/Tizen.NET.API11/build/tizen11.0/ref/System.Runtime.Intrinsics.xml b/pkg/Tizen.NET.API11/build/tizen11.0/ref/System.Runtime.Intrinsics.xml index 729a700..d13dee6 100755 --- a/pkg/Tizen.NET.API11/build/tizen11.0/ref/System.Runtime.Intrinsics.xml +++ b/pkg/Tizen.NET.API11/build/tizen11.0/ref/System.Runtime.Intrinsics.xml @@ -4,19567 +4,95 @@ System.Runtime.Intrinsics - - This class provides access to the ARM AdvSIMD hardware instructions via intrinsics. - - - - int16x8_t vabsq_s16 (int16x8_t a) - A32: VABS.S16 Qd, Qm - A64: ABS Vd.8H, Vn.8H - - - - - - int32x4_t vabsq_s32 (int32x4_t a) - A32: VABS.S32 Qd, Qm - A64: ABS Vd.4S, Vn.4S - - - - - - int8x16_t vabsq_s8 (int8x16_t a) - A32: VABS.S8 Qd, Qm - A64: ABS Vd.16B, Vn.16B - - - - - - float32x4_t vabsq_f32 (float32x4_t a) - A32: VABS.F32 Qd, Qm - A64: FABS Vd.4S, Vn.4S - - - - - - int16x4_t vabs_s16 (int16x4_t a) - A32: VABS.S16 Dd, Dm - A64: ABS Vd.4H, Vn.4H - - - - - - int32x2_t vabs_s32 (int32x2_t a) - A32: VABS.S32 Dd, Dm - A64: ABS Vd.2S, Vn.2S - - - - - - int8x8_t vabs_s8 (int8x8_t a) - A32: VABS.S8 Dd, Dm - A64: ABS Vd.8B, Vn.8B - - - - - - float32x2_t vabs_f32 (float32x2_t a) - A32: VABS.F32 Dd, Dm - A64: FABS Vd.2S, Vn.2S - - - - - - uint32x4_t vcagtq_f32 (float32x4_t a, float32x4_t b) - A32: VACGT.F32 Qd, Qn, Qm - A64: FACGT Vd.4S, Vn.4S, Vm.4S - - - - - - - uint32x2_t vcagt_f32 (float32x2_t a, float32x2_t b) - A32: VACGT.F32 Dd, Dn, Dm - A64: FACGT Vd.2S, Vn.2S, Vm.2S - - - - - - - uint32x4_t vcageq_f32 (float32x4_t a, float32x4_t b) - A32: VACGE.F32 Qd, Qn, Qm - A64: FACGE Vd.4S, Vn.4S, Vm.4S - - - - - - - uint32x2_t vcage_f32 (float32x2_t a, float32x2_t b) - A32: VACGE.F32 Dd, Dn, Dm - A64: FACGE Vd.2S, Vn.2S, Vm.2S - - - - - - - uint32x4_t vcaltq_f32 (float32x4_t a, float32x4_t b) - A32: VACLT.F32 Qd, Qn, Qm - A64: FACGT Vd.4S, Vn.4S, Vm.4S - - - - - - - uint32x2_t vcalt_f32 (float32x2_t a, float32x2_t b) - A32: VACLT.F32 Dd, Dn, Dm - A64: FACGT Vd.2S, Vn.2S, Vm.2S - - - - - - - uint32x4_t vcaleq_f32 (float32x4_t a, float32x4_t b) - A32: VACLE.F32 Qd, Qn, Qm - A64: FACGE Vd.4S, Vn.4S, Vm.4S - - - - - - - uint32x2_t vcale_f32 (float32x2_t a, float32x2_t b) - A32: VACLE.F32 Dd, Dn, Dm - A64: FACGE Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vabdq_u8 (uint8x16_t a, uint8x16_t b) - A32: VABD.U8 Qd, Qn, Qm - A64: UABD Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vabdq_s16 (int16x8_t a, int16x8_t b) - A32: VABD.S16 Qd, Qn, Qm - A64: SABD Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vabdq_s32 (int32x4_t a, int32x4_t b) - A32: VABD.S32 Qd, Qn, Qm - A64: SABD Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vabdq_s8 (int8x16_t a, int8x16_t b) - A32: VABD.S8 Qd, Qn, Qm - A64: SABD Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vabdq_f32 (float32x4_t a, float32x4_t b) - A32: VABD.F32 Qd, Qn, Qm - A64: FABD Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vabdq_u16 (uint16x8_t a, uint16x8_t b) - A32: VABD.U16 Qd, Qn, Qm - A64: UABD Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vabdq_u32 (uint32x4_t a, uint32x4_t b) - A32: VABD.U32 Qd, Qn, Qm - A64: UABD Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vabd_u8 (uint8x8_t a, uint8x8_t b) - A32: VABD.U8 Dd, Dn, Dm - A64: UABD Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vabd_s16 (int16x4_t a, int16x4_t b) - A32: VABD.S16 Dd, Dn, Dm - A64: SABD Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vabd_s32 (int32x2_t a, int32x2_t b) - A32: VABD.S32 Dd, Dn, Dm - A64: SABD Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vabd_s8 (int8x8_t a, int8x8_t b) - A32: VABD.S8 Dd, Dn, Dm - A64: SABD Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vabd_f32 (float32x2_t a, float32x2_t b) - A32: VABD.F32 Dd, Dn, Dm - A64: FABD Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vabd_u16 (uint16x4_t a, uint16x4_t b) - A32: VABD.U16 Dd, Dn, Dm - A64: UABD Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vabd_u32 (uint32x2_t a, uint32x2_t b) - A32: VABD.U32 Dd, Dn, Dm - A64: UABD Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vabaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) - A32: VABA.U8 Qd, Qn, Qm - A64: UABA Vd.16B, Vn.16B, Vm.16B - - - - - - - - int16x8_t vabaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) - A32: VABA.S16 Qd, Qn, Qm - A64: SABA Vd.8H, Vn.8H, Vm.8H - - - - - - - - int32x4_t vabaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) - A32: VABA.S32 Qd, Qn, Qm - A64: SABA Vd.4S, Vn.4S, Vm.4S - - - - - - - - int8x16_t vabaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) - A32: VABA.S8 Qd, Qn, Qm - A64: SABA Vd.16B, Vn.16B, Vm.16B - - - - - - - - uint16x8_t vabaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) - A32: VABA.U16 Qd, Qn, Qm - A64: UABA Vd.8H, Vn.8H, Vm.8H - - - - - - - - uint32x4_t vabaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) - A32: VABA.U32 Qd, Qn, Qm - A64: UABA Vd.4S, Vn.4S, Vm.4S - - - - - - - - uint8x8_t vaba_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) - A32: VABA.U8 Dd, Dn, Dm - A64: UABA Vd.8B, Vn.8B, Vm.8B - - - - - - - - int16x4_t vaba_s16 (int16x4_t a, int16x4_t b, int16x4_t c) - A32: VABA.S16 Dd, Dn, Dm - A64: SABA Vd.4H, Vn.4H, Vm.4H - - - - - - - - int32x2_t vaba_s32 (int32x2_t a, int32x2_t b, int32x2_t c) - A32: VABA.S32 Dd, Dn, Dm - A64: SABA Vd.2S, Vn.2S, Vm.2S - - - - - - - - int8x8_t vaba_s8 (int8x8_t a, int8x8_t b, int8x8_t c) - A32: VABA.S8 Dd, Dn, Dm - A64: SABA Vd.8B, Vn.8B, Vm.8B - - - - - - - - uint16x4_t vaba_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) - A32: VABA.U16 Dd, Dn, Dm - A64: UABA Vd.4H, Vn.4H, Vm.4H - - - - - - - - uint32x2_t vaba_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) - A32: VABA.U32 Dd, Dn, Dm - A64: UABA Vd.2S, Vn.2S, Vm.2S - - - - - - - - uint16x8_t vabdl_u8 (uint8x8_t a, uint8x8_t b) - A32: VABDL.U8 Qd, Dn, Dm - A64: UABDL Vd.8H, Vn.8B, Vm.8B - - - - - - - int32x4_t vabdl_s16 (int16x4_t a, int16x4_t b) - A32: VABDL.S16 Qd, Dn, Dm - A64: SABDL Vd.4S, Vn.4H, Vm.4H - - - - - - - int64x2_t vabdl_s32 (int32x2_t a, int32x2_t b) - A32: VABDL.S32 Qd, Dn, Dm - A64: SABDL Vd.2D, Vn.2S, Vm.2S - - - - - - - int16x8_t vabdl_s8 (int8x8_t a, int8x8_t b) - A32: VABDL.S8 Qd, Dn, Dm - A64: SABDL Vd.8H, Vn.8B, Vm.8B - - - - - - - uint32x4_t vabdl_u16 (uint16x4_t a, uint16x4_t b) - A32: VABDL.U16 Qd, Dn, Dm - A64: UABDL Vd.4S, Vn.4H, Vm.4H - - - - - - - uint64x2_t vabdl_u32 (uint32x2_t a, uint32x2_t b) - A32: VABDL.U32 Qd, Dn, Dm - A64: UABDL Vd.2D, Vn.2S, Vm.2S - - - - - - - int16x8_t vabal_s8 (int16x8_t a, int8x8_t b, int8x8_t c) - A32: VABAL.S8 Qd, Dn, Dm - A64: SABAL Vd.8H, Vn.8B, Vm.8B - - - - - - - - int32x4_t vabal_s16 (int32x4_t a, int16x4_t b, int16x4_t c) - A32: VABAL.S16 Qd, Dn, Dm - A64: SABAL Vd.4S, Vn.4H, Vm.4H - - - - - - - - int64x2_t vabal_s32 (int64x2_t a, int32x2_t b, int32x2_t c) - A32: VABAL.S32 Qd, Dn, Dm - A64: SABAL Vd.2D, Vn.2S, Vm.2S - - - - - - - - uint16x8_t vabal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) - A32: VABAL.U8 Qd, Dn, Dm - A64: UABAL Vd.8H, Vn.8B, Vm.8B - - - - - - - - uint32x4_t vabal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) - A32: VABAL.U16 Qd, Dn, Dm - A64: UABAL Vd.4S, Vn.4H, Vm.4H - - - - - - - - uint64x2_t vabal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) - A32: VABAL.U32 Qd, Dn, Dm - A64: UABAL Vd.2D, Vn.2S, Vm.2S - - - - - - - - uint16x8_t vabdl_high_u8 (uint8x16_t a, uint8x16_t b) - A32: VABDL.U8 Qd, Dn+1, Dm+1 - A64: UABDL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - int32x4_t vabdl_high_s16 (int16x8_t a, int16x8_t b) - A32: VABDL.S16 Qd, Dn+1, Dm+1 - A64: SABDL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - int64x2_t vabdl_high_s32 (int32x4_t a, int32x4_t b) - A32: VABDL.S32 Qd, Dn+1, Dm+1 - A64: SABDL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - int16x8_t vabdl_high_s8 (int8x16_t a, int8x16_t b) - A32: VABDL.S8 Qd, Dn+1, Dm+1 - A64: SABDL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - uint32x4_t vabdl_high_u16 (uint16x8_t a, uint16x8_t b) - A32: VABDL.U16 Qd, Dn+1, Dm+1 - A64: UABDL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - uint64x2_t vabdl_high_u32 (uint32x4_t a, uint32x4_t b) - A32: VABDL.U32 Qd, Dn+1, Dm+1 - A64: UABDL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - int16x8_t vabal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) - A32: VABAL.S8 Qd, Dn+1, Dm+1 - A64: SABAL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - - int32x4_t vabal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) - A32: VABAL.S16 Qd, Dn+1, Dm+1 - A64: SABAL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - - int64x2_t vabal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) - A32: VABAL.S32 Qd, Dn+1, Dm+1 - A64: SABAL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - - uint16x8_t vabal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) - A32: VABAL.U8 Qd, Dn+1, Dm+1 - A64: UABAL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - - uint32x4_t vabal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) - A32: VABAL.U16 Qd, Dn+1, Dm+1 - A64: UABAL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - - uint64x2_t vabal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) - A32: VABAL.U32 Qd, Dn+1, Dm+1 - A64: UABAL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - - int16x8_t vqabsq_s16 (int16x8_t a) - A32: VQABS.S16 Qd, Qm - A64: SQABS Vd.8H, Vn.8H - - - - - - int32x4_t vqabsq_s32 (int32x4_t a) - A32: VQABS.S32 Qd, Qm - A64: SQABS Vd.4S, Vn.4S - - - - - - int8x16_t vqabsq_s8 (int8x16_t a) - A32: VQABS.S8 Qd, Qm - A64: SQABS Vd.16B, Vn.16B - - - - - - int16x4_t vqabs_s16 (int16x4_t a) - A32: VQABS.S16 Dd, Dm - A64: SQABS Vd.4H, Vn.4H - - - - - - int32x2_t vqabs_s32 (int32x2_t a) - A32: VQABS.S32 Dd, Dm - A64: SQABS Vd.2S, Vn.2S - - - - - - int8x8_t vqabs_s8 (int8x8_t a) - A32: VQABS.S8 Dd, Dm - A64: SQABS Vd.8B, Vn.8B - - - - - - float64x1_t vabs_f64 (float64x1_t a) - A32: VABS.F64 Dd, Dm - A64: FABS Dd, Dn - - - - - - float32_t vabss_f32 (float32_t a) - A32: VABS.F32 Sd, Sm - A64: FABS Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - uint8x16_t vaddq_u8 (uint8x16_t a, uint8x16_t b) - A32: VADD.I8 Qd, Qn, Qm - A64: ADD Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vaddq_s16 (int16x8_t a, int16x8_t b) - A32: VADD.I16 Qd, Qn, Qm - A64: ADD Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vaddq_s32 (int32x4_t a, int32x4_t b) - A32: VADD.I32 Qd, Qn, Qm - A64: ADD Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vaddq_s64 (int64x2_t a, int64x2_t b) - A32: VADD.I64 Qd, Qn, Qm - A64: ADD Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vaddq_s8 (int8x16_t a, int8x16_t b) - A32: VADD.I8 Qd, Qn, Qm - A64: ADD Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vaddq_f32 (float32x4_t a, float32x4_t b) - A32: VADD.F32 Qd, Qn, Qm - A64: FADD Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vaddq_u16 (uint16x8_t a, uint16x8_t b) - A32: VADD.I16 Qd, Qn, Qm - A64: ADD Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vaddq_u32 (uint32x4_t a, uint32x4_t b) - A32: VADD.I32 Qd, Qn, Qm - A64: ADD Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vaddq_u64 (uint64x2_t a, uint64x2_t b) - A32: VADD.I64 Qd, Qn, Qm - A64: ADD Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vadd_u8 (uint8x8_t a, uint8x8_t b) - A32: VADD.I8 Dd, Dn, Dm - A64: ADD Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vadd_s16 (int16x4_t a, int16x4_t b) - A32: VADD.I16 Dd, Dn, Dm - A64: ADD Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vadd_s32 (int32x2_t a, int32x2_t b) - A32: VADD.I32 Dd, Dn, Dm - A64: ADD Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vadd_s8 (int8x8_t a, int8x8_t b) - A32: VADD.I8 Dd, Dn, Dm - A64: ADD Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vadd_f32 (float32x2_t a, float32x2_t b) - A32: VADD.F32 Dd, Dn, Dm - A64: FADD Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vadd_u16 (uint16x4_t a, uint16x4_t b) - A32: VADD.I16 Dd, Dn, Dm - A64: ADD Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vadd_u32 (uint32x2_t a, uint32x2_t b) - A32: VADD.I32 Dd, Dn, Dm - A64: ADD Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vaddhn_s16 (int16x8_t a, int16x8_t b) - A32: VADDHN.I16 Dd, Qn, Qm - A64: ADDHN Vd.8B, Vn.8H, Vm.8H - - - - - - - int16x4_t vaddhn_s32 (int32x4_t a, int32x4_t b) - A32: VADDHN.I32 Dd, Qn, Qm - A64: ADDHN Vd.4H, Vn.4S, Vm.4S - - - - - - - int32x2_t vaddhn_s64 (int64x2_t a, int64x2_t b) - A32: VADDHN.I64 Dd, Qn, Qm - A64: ADDHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x8_t vaddhn_u16 (uint16x8_t a, uint16x8_t b) - A32: VADDHN.I16 Dd, Qn, Qm - A64: ADDHN Vd.8B, Vn.8H, Vm.8H - - - - - - - uint16x4_t vaddhn_u32 (uint32x4_t a, uint32x4_t b) - A32: VADDHN.I32 Dd, Qn, Qm - A64: ADDHN Vd.4H, Vn.4S, Vm.4S - - - - - - - uint32x2_t vaddhn_u64 (uint64x2_t a, uint64x2_t b) - A32: VADDHN.I64 Dd, Qn, Qm - A64: ADDHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x16_t vaddhn_high_u16 (uint8x8_t r, uint16x8_t a, uint16x8_t b) - A32: VADDHN.I16 Dd+1, Qn, Qm - A64: ADDHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - int16x8_t vaddhn_high_s32 (int16x4_t r, int32x4_t a, int32x4_t b) - A32: VADDHN.I32 Dd+1, Qn, Qm - A64: ADDHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - int32x4_t vaddhn_high_s64 (int32x2_t r, int64x2_t a, int64x2_t b) - A32: VADDHN.I64 Dd+1, Qn, Qm - A64: ADDHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - int8x16_t vaddhn_high_s16 (int8x8_t r, int16x8_t a, int16x8_t b) - A32: VADDHN.I16 Dd+1, Qn, Qm - A64: ADDHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - uint16x8_t vaddhn_high_u32 (uint16x4_t r, uint32x4_t a, uint32x4_t b) - A32: VADDHN.I32 Dd+1, Qn, Qm - A64: ADDHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - uint32x4_t vaddhn_high_u64 (uint32x2_t r, uint64x2_t a, uint64x2_t b) - A32: VADDHN.I64 Dd+1, Qn, Qm - A64: ADDHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - uint8x8_t vpadd_u8 (uint8x8_t a, uint8x8_t b) - A32: VPADD.I8 Dd, Dn, Dm - A64: ADDP Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vpadd_s16 (int16x4_t a, int16x4_t b) - A32: VPADD.I16 Dd, Dn, Dm - A64: ADDP Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vpadd_s32 (int32x2_t a, int32x2_t b) - A32: VPADD.I32 Dd, Dn, Dm - A64: ADDP Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vpadd_s8 (int8x8_t a, int8x8_t b) - A32: VPADD.I8 Dd, Dn, Dm - A64: ADDP Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vpadd_f32 (float32x2_t a, float32x2_t b) - A32: VPADD.F32 Dd, Dn, Dm - A64: FADDP Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vpadd_u16 (uint16x4_t a, uint16x4_t b) - A32: VPADD.I16 Dd, Dn, Dm - A64: ADDP Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vpadd_u32 (uint32x2_t a, uint32x2_t b) - A32: VPADD.I32 Dd, Dn, Dm - A64: ADDP Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x8_t vpaddlq_u8 (uint8x16_t a) - A32: VPADDL.U8 Qd, Qm - A64: UADDLP Vd.8H, Vn.16B - - - - - - int32x4_t vpaddlq_s16 (int16x8_t a) - A32: VPADDL.S16 Qd, Qm - A64: SADDLP Vd.4S, Vn.8H - - - - - - int64x2_t vpaddlq_s32 (int32x4_t a) - A32: VPADDL.S32 Qd, Qm - A64: SADDLP Vd.2D, Vn.4S - - - - - - int16x8_t vpaddlq_s8 (int8x16_t a) - A32: VPADDL.S8 Qd, Qm - A64: SADDLP Vd.8H, Vn.16B - - - - - - uint32x4_t vpaddlq_u16 (uint16x8_t a) - A32: VPADDL.U16 Qd, Qm - A64: UADDLP Vd.4S, Vn.8H - - - - - - uint64x2_t vpaddlq_u32 (uint32x4_t a) - A32: VPADDL.U32 Qd, Qm - A64: UADDLP Vd.2D, Vn.4S - - - - - - uint16x4_t vpaddl_u8 (uint8x8_t a) - A32: VPADDL.U8 Dd, Dm - A64: UADDLP Vd.4H, Vn.8B - - - - - - int32x2_t vpaddl_s16 (int16x4_t a) - A32: VPADDL.S16 Dd, Dm - A64: SADDLP Vd.2S, Vn.4H - - - - - - int16x4_t vpaddl_s8 (int8x8_t a) - A32: VPADDL.S8 Dd, Dm - A64: SADDLP Vd.4H, Vn.8B - - - - - - uint32x2_t vpaddl_u16 (uint16x4_t a) - A32: VPADDL.U16 Dd, Dm - A64: UADDLP Vd.2S, Vn.4H - - - - - - int16x8_t vpadalq_s8 (int16x8_t a, int8x16_t b) - A32: VPADAL.S8 Qd, Qm - A64: SADALP Vd.8H, Vn.16B - - - - - - - int32x4_t vpadalq_s16 (int32x4_t a, int16x8_t b) - A32: VPADAL.S16 Qd, Qm - A64: SADALP Vd.4S, Vn.8H - - - - - - - int64x2_t vpadalq_s32 (int64x2_t a, int32x4_t b) - A32: VPADAL.S32 Qd, Qm - A64: SADALP Vd.2D, Vn.4S - - - - - - - uint16x8_t vpadalq_u8 (uint16x8_t a, uint8x16_t b) - A32: VPADAL.U8 Qd, Qm - A64: UADALP Vd.8H, Vn.16B - - - - - - - uint32x4_t vpadalq_u16 (uint32x4_t a, uint16x8_t b) - A32: VPADAL.U16 Qd, Qm - A64: UADALP Vd.4S, Vn.8H - - - - - - - uint64x2_t vpadalq_u32 (uint64x2_t a, uint32x4_t b) - A32: VPADAL.U32 Qd, Qm - A64: UADALP Vd.2D, Vn.4S - - - - - - - int16x4_t vpadal_s8 (int16x4_t a, int8x8_t b) - A32: VPADAL.S8 Dd, Dm - A64: SADALP Vd.4H, Vn.8B - - - - - - - int32x2_t vpadal_s16 (int32x2_t a, int16x4_t b) - A32: VPADAL.S16 Dd, Dm - A64: SADALP Vd.2S, Vn.4H - - - - - - - uint16x4_t vpadal_u8 (uint16x4_t a, uint8x8_t b) - A32: VPADAL.U8 Dd, Dm - A64: UADALP Vd.4H, Vn.8B - - - - - - - uint32x2_t vpadal_u16 (uint32x2_t a, uint16x4_t b) - A32: VPADAL.U16 Dd, Dm - A64: UADALP Vd.2S, Vn.4H - - - - - - - int64x1_t vpadal_s32 (int64x1_t a, int32x2_t b) - A32: VPADAL.S32 Dd, Dm - A64: SADALP Vd.1D, Vn.2S - - - - - - - uint64x1_t vpadal_u32 (uint64x1_t a, uint32x2_t b) - A32: VPADAL.U32 Dd, Dm - A64: UADALP Vd.1D, Vn.2S - - - - - - - int64x1_t vpaddl_s32 (int32x2_t a) - A32: VPADDL.S32 Dd, Dm - A64: SADDLP Dd, Vn.2S - - - - - - uint64x1_t vpaddl_u32 (uint32x2_t a) - A32: VPADDL.U32 Dd, Dm - A64: UADDLP Dd, Vn.2S - - - - - - int8x8_t vraddhn_s16 (int16x8_t a, int16x8_t b) - A32: VRADDHN.I16 Dd, Qn, Qm - A64: RADDHN Vd.8B, Vn.8H, Vm.8H - - - - - - - int16x4_t vraddhn_s32 (int32x4_t a, int32x4_t b) - A32: VRADDHN.I32 Dd, Qn, Qm - A64: RADDHN Vd.4H, Vn.4S, Vm.4S - - - - - - - int32x2_t vraddhn_s64 (int64x2_t a, int64x2_t b) - A32: VRADDHN.I64 Dd, Qn, Qm - A64: RADDHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x8_t vraddhn_u16 (uint16x8_t a, uint16x8_t b) - A32: VRADDHN.I16 Dd, Qn, Qm - A64: RADDHN Vd.8B, Vn.8H, Vm.8H - - - - - - - uint16x4_t vraddhn_u32 (uint32x4_t a, uint32x4_t b) - A32: VRADDHN.I32 Dd, Qn, Qm - A64: RADDHN Vd.4H, Vn.4S, Vm.4S - - - - - - - uint32x2_t vraddhn_u64 (uint64x2_t a, uint64x2_t b) - A32: VRADDHN.I64 Dd, Qn, Qm - A64: RADDHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x16_t vraddhn_high_u16 (uint8x8_t r, uint16x8_t a, uint16x8_t b) - A32: VRADDHN.I16 Dd+1, Qn, Qm - A64: RADDHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - int16x8_t vraddhn_high_s32 (int16x4_t r, int32x4_t a, int32x4_t b) - A32: VRADDHN.I32 Dd+1, Qn, Qm - A64: RADDHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - int32x4_t vraddhn_high_s64 (int32x2_t r, int64x2_t a, int64x2_t b) - A32: VRADDHN.I64 Dd+1, Qn, Qm - A64: RADDHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - int8x16_t vraddhn_high_s16 (int8x8_t r, int16x8_t a, int16x8_t b) - A32: VRADDHN.I16 Dd+1, Qn, Qm - A64: RADDHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - uint16x8_t vraddhn_high_u32 (uint16x4_t r, uint32x4_t a, uint32x4_t b) - A32: VRADDHN.I32 Dd+1, Qn, Qm - A64: RADDHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - uint32x4_t vraddhn_high_u64 (uint32x2_t r, uint64x2_t a, uint64x2_t b) - A32: VRADDHN.I64 Dd+1, Qn, Qm - A64: RADDHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - uint8x16_t vqaddq_u8 (uint8x16_t a, uint8x16_t b) - A32: VQADD.U8 Qd, Qn, Qm - A64: UQADD Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vqaddq_s16 (int16x8_t a, int16x8_t b) - A32: VQADD.S16 Qd, Qn, Qm - A64: SQADD Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vqaddq_s32 (int32x4_t a, int32x4_t b) - A32: VQADD.S32 Qd, Qn, Qm - A64: SQADD Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vqaddq_s64 (int64x2_t a, int64x2_t b) - A32: VQADD.S64 Qd, Qn, Qm - A64: SQADD Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vqaddq_s8 (int8x16_t a, int8x16_t b) - A32: VQADD.S8 Qd, Qn, Qm - A64: SQADD Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vqaddq_u16 (uint16x8_t a, uint16x8_t b) - A32: VQADD.U16 Qd, Qn, Qm - A64: UQADD Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vqaddq_u32 (uint32x4_t a, uint32x4_t b) - A32: VQADD.U32 Qd, Qn, Qm - A64: UQADD Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vqaddq_u64 (uint64x2_t a, uint64x2_t b) - A32: VQADD.U64 Qd, Qn, Qm - A64: UQADD Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vqadd_u8 (uint8x8_t a, uint8x8_t b) - A32: VQADD.U8 Dd, Dn, Dm - A64: UQADD Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vqadd_s16 (int16x4_t a, int16x4_t b) - A32: VQADD.S16 Dd, Dn, Dm - A64: SQADD Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vqadd_s32 (int32x2_t a, int32x2_t b) - A32: VQADD.S32 Dd, Dn, Dm - A64: SQADD Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vqadd_s8 (int8x8_t a, int8x8_t b) - A32: VQADD.S8 Dd, Dn, Dm - A64: SQADD Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vqadd_u16 (uint16x4_t a, uint16x4_t b) - A32: VQADD.U16 Dd, Dn, Dm - A64: UQADD Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vqadd_u32 (uint32x2_t a, uint32x2_t b) - A32: VQADD.U32 Dd, Dn, Dm - A64: UQADD Vd.2S, Vn.2S, Vm.2S - - - - - - - int64x1_t vqadd_s64 (int64x1_t a, int64x1_t b) - A32: VQADD.S64 Dd, Dn, Dm - A64: SQADD Dd, Dn, Dm - - - - - - - uint64x1_t vqadd_u64 (uint64x1_t a, uint64x1_t b) - A32: VQADD.U64 Dd, Dn, Dm - A64: UQADD Dd, Dn, Dm - - - - - - - float64x1_t vadd_f64 (float64x1_t a, float64x1_t b) - A32: VADD.F64 Dd, Dn, Dm - A64: FADD Dd, Dn, Dm - - - - - - - int64x1_t vadd_s64 (int64x1_t a, int64x1_t b) - A32: VADD.I64 Dd, Dn, Dm - A64: ADD Dd, Dn, Dm - - - - - - - float32_t vadds_f32 (float32_t a, float32_t b) - A32: VADD.F32 Sd, Sn, Sm - A64: FADD Sd, Sn, Sm The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint64x1_t vadd_u64 (uint64x1_t a, uint64x1_t b) - A32: VADD.I64 Dd, Dn, Dm - A64: ADD Dd, Dn, Dm - - - - - - - int16x8_t vaddw_s8 (int16x8_t a, int8x8_t b) - A32: VADDW.S8 Qd, Qn, Dm - A64: SADDW Vd.8H, Vn.8H, Vm.8B - - - - - - - int32x4_t vaddw_s16 (int32x4_t a, int16x4_t b) - A32: VADDW.S16 Qd, Qn, Dm - A64: SADDW Vd.4S, Vn.4S, Vm.4H - - - - - - - int64x2_t vaddw_s32 (int64x2_t a, int32x2_t b) - A32: VADDW.S32 Qd, Qn, Dm - A64: SADDW Vd.2D, Vn.2D, Vm.2S - - - - - - - uint16x8_t vaddw_u8 (uint16x8_t a, uint8x8_t b) - A32: VADDW.U8 Qd, Qn, Dm - A64: UADDW Vd.8H, Vn.8H, Vm.8B - - - - - - - uint32x4_t vaddw_u16 (uint32x4_t a, uint16x4_t b) - A32: VADDW.U16 Qd, Qn, Dm - A64: UADDW Vd.4S, Vn.4S, Vm.4H - - - - - - - uint64x2_t vaddw_u32 (uint64x2_t a, uint32x2_t b) - A32: VADDW.U32 Qd, Qn, Dm - A64: UADDW Vd.2D, Vn.2D, Vm.2S - - - - - - - uint16x8_t vaddl_u8 (uint8x8_t a, uint8x8_t b) - A32: VADDL.U8 Qd, Dn, Dm - A64: UADDL Vd.8H, Vn.8B, Vm.8B - - - - - - - int32x4_t vaddl_s16 (int16x4_t a, int16x4_t b) - A32: VADDL.S16 Qd, Dn, Dm - A64: SADDL Vd.4S, Vn.4H, Vm.4H - - - - - - - int64x2_t vaddl_s32 (int32x2_t a, int32x2_t b) - A32: VADDL.S32 Qd, Dn, Dm - A64: SADDL Vd.2D, Vn.2S, Vm.2S - - - - - - - int16x8_t vaddl_s8 (int8x8_t a, int8x8_t b) - A32: VADDL.S8 Qd, Dn, Dm - A64: SADDL Vd.8H, Vn.8B, Vm.8B - - - - - - - uint32x4_t vaddl_u16 (uint16x4_t a, uint16x4_t b) - A32: VADDL.U16 Qd, Dn, Dm - A64: UADDL Vd.4S, Vn.4H, Vm.4H - - - - - - - uint64x2_t vaddl_u32 (uint32x2_t a, uint32x2_t b) - A32: VADDL.U32 Qd, Dn, Dm - A64: UADDL Vd.2D, Vn.2S, Vm.2S - - - - - - - uint16x8_t vaddl_high_u8 (uint8x16_t a, uint8x16_t b) - A32: VADDL.U8 Qd, Dn+1, Dm+1 - A64: UADDL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - int32x4_t vaddl_high_s16 (int16x8_t a, int16x8_t b) - A32: VADDL.S16 Qd, Dn+1, Dm+1 - A64: SADDL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - int16x8_t vaddw_high_s8 (int16x8_t a, int8x16_t b) - A32: VADDW.S8 Qd, Qn, Dm+1 - A64: SADDW2 Vd.8H, Vn.8H, Vm.16B - - - - - - - int32x4_t vaddw_high_s16 (int32x4_t a, int16x8_t b) - A32: VADDW.S16 Qd, Qn, Dm+1 - A64: SADDW2 Vd.4S, Vn.4S, Vm.8H - - - - - - - int64x2_t vaddl_high_s32 (int32x4_t a, int32x4_t b) - A32: VADDL.S32 Qd, Dn+1, Dm+1 - A64: SADDL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - int64x2_t vaddw_high_s32 (int64x2_t a, int32x4_t b) - A32: VADDW.S32 Qd, Qn, Dm+1 - A64: SADDW2 Vd.2D, Vn.2D, Vm.4S - - - - - - - int16x8_t vaddl_high_s8 (int8x16_t a, int8x16_t b) - A32: VADDL.S8 Qd, Dn+1, Dm+1 - A64: SADDL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - uint16x8_t vaddw_high_u8 (uint16x8_t a, uint8x16_t b) - A32: VADDW.U8 Qd, Qn, Dm+1 - A64: UADDW2 Vd.8H, Vn.8H, Vm.16B - - - - - - - uint32x4_t vaddl_high_u16 (uint16x8_t a, uint16x8_t b) - A32: VADDL.U16 Qd, Dn+1, Dm+1 - A64: UADDL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - uint32x4_t vaddw_high_u16 (uint32x4_t a, uint16x8_t b) - A32: VADDW.U16 Qd, Qn, Dm+1 - A64: UADDW2 Vd.4S, Vn.4S, Vm.8H - - - - - - - uint64x2_t vaddl_high_u32 (uint32x4_t a, uint32x4_t b) - A32: VADDL.U32 Qd, Dn+1, Dm+1 - A64: UADDL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - uint64x2_t vaddw_high_u32 (uint64x2_t a, uint32x4_t b) - A32: VADDW.U32 Qd, Qn, Dm+1 - A64: UADDW2 Vd.2D, Vn.2D, Vm.4S - - - - - - - uint8x16_t vandq_u8 (uint8x16_t a, uint8x16_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vandq_f64 (float64x2_t a, float64x2_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x8_t vandq_s16 (int16x8_t a, int16x8_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - int32x4_t vandq_s32 (int32x4_t a, int32x4_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - int64x2_t vandq_s64 (int64x2_t a, int64x2_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - int8x16_t vandq_s8 (int8x16_t a, int8x16_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vandq_f32 (float32x4_t a, float32x4_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x8_t vandq_u16 (uint16x8_t a, uint16x8_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vandq_u32 (uint32x4_t a, uint32x4_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - uint64x2_t vandq_u64 (uint64x2_t a, uint64x2_t b) - A32: VAND Qd, Qn, Qm - A64: AND Vd.16B, Vn.16B, Vm.16B - - - - - - - uint8x8_t vand_u8 (uint8x8_t a, uint8x8_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - float64x1_t vand_f64 (float64x1_t a, float64x1_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x4_t vand_s16 (int16x4_t a, int16x4_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - int32x2_t vand_s32 (int32x2_t a, int32x2_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - int64x1_t vand_s64 (int64x1_t a, int64x1_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - int8x8_t vand_s8 (int8x8_t a, int8x8_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vand_f32 (float32x2_t a, float32x2_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x4_t vand_u16 (uint16x4_t a, uint16x4_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vand_u32 (uint32x2_t a, uint32x2_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - uint64x1_t vand_u64 (uint64x1_t a, uint64x1_t b) - A32: VAND Dd, Dn, Dm - A64: AND Vd.8B, Vn.8B, Vm.8B - - - - - - - uint8x16_t vbicq_u8 (uint8x16_t a, uint8x16_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vbicq_f64 (float64x2_t a, float64x2_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x8_t vbicq_s16 (int16x8_t a, int16x8_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - int32x4_t vbicq_s32 (int32x4_t a, int32x4_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - int64x2_t vbicq_s64 (int64x2_t a, int64x2_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - int8x16_t vbicq_s8 (int8x16_t a, int8x16_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vbicq_f32 (float32x4_t a, float32x4_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x8_t vbicq_u16 (uint16x8_t a, uint16x8_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vbicq_u32 (uint32x4_t a, uint32x4_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - uint64x2_t vbicq_u64 (uint64x2_t a, uint64x2_t b) - A32: VBIC Qd, Qn, Qm - A64: BIC Vd.16B, Vn.16B, Vm.16B - - - - - - - uint8x8_t vbic_u8 (uint8x8_t a, uint8x8_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - float64x1_t vbic_f64 (float64x1_t a, float64x1_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x4_t vbic_s16 (int16x4_t a, int16x4_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - int32x2_t vbic_s32 (int32x2_t a, int32x2_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - int64x1_t vbic_s64 (int64x1_t a, int64x1_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - int8x8_t vbic_s8 (int8x8_t a, int8x8_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vbic_f32 (float32x2_t a, float32x2_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x4_t vbic_u16 (uint16x4_t a, uint16x4_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vbic_u32 (uint32x2_t a, uint32x2_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - uint64x1_t vbic_u64 (uint64x1_t a, uint64x1_t b) - A32: VBIC Dd, Dn, Dm - A64: BIC Vd.8B, Vn.8B, Vm.8B - - - - - - - uint8x16_t vbslq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - float64x2_t vbslq_f64 (uint64x2_t a, float64x2_t b, float64x2_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - int16x8_t vbslq_s16 (uint16x8_t a, int16x8_t b, int16x8_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - int32x4_t vbslq_s32 (uint32x4_t a, int32x4_t b, int32x4_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - int64x2_t vbslq_s64 (uint64x2_t a, int64x2_t b, int64x2_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - int8x16_t vbslq_s8 (uint8x16_t a, int8x16_t b, int8x16_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - float32x4_t vbslq_f32 (uint32x4_t a, float32x4_t b, float32x4_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - uint16x8_t vbslq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - uint32x4_t vbslq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - uint64x2_t vbslq_u64 (uint64x2_t a, uint64x2_t b, uint64x2_t c) - A32: VBSL Qd, Qn, Qm - A64: BSL Vd.16B, Vn.16B, Vm.16B - - - - - - - - uint8x8_t vbsl_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - float64x1_t vbsl_f64 (uint64x1_t a, float64x1_t b, float64x1_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - int16x4_t vbsl_s16 (uint16x4_t a, int16x4_t b, int16x4_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - int32x2_t vbsl_s32 (uint32x2_t a, int32x2_t b, int32x2_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - int64x1_t vbsl_s64 (uint64x1_t a, int64x1_t b, int64x1_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - int8x8_t vbsl_s8 (uint8x8_t a, int8x8_t b, int8x8_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - float32x2_t vbsl_f32 (uint32x2_t a, float32x2_t b, float32x2_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - uint16x4_t vbsl_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - uint32x2_t vbsl_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - uint64x1_t vbsl_u64 (uint64x1_t a, uint64x1_t b, uint64x1_t c) - A32: VBSL Dd, Dn, Dm - A64: BSL Vd.8B, Vn.8B, Vm.8B - - - - - - - - float32x4_t vrndpq_f32 (float32x4_t a) - A32: VRINTP.F32 Qd, Qm - A64: FRINTP Vd.4S, Vn.4S - - - - - - float32x2_t vrndp_f32 (float32x2_t a) - A32: VRINTP.F32 Dd, Dm - A64: FRINTP Vd.2S, Vn.2S - - - - - - float64x1_t vrndp_f64 (float64x1_t a) - A32: VRINTP.F64 Dd, Dm - A64: FRINTP Dd, Dn - - - - - - float32_t vrndps_f32 (float32_t a) - A32: VRINTP.F32 Sd, Sm - A64: FRINTP Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - uint8x16_t vceqq_u8 (uint8x16_t a, uint8x16_t b) - A32: VCEQ.I8 Qd, Qn, Qm - A64: CMEQ Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vceqq_s16 (int16x8_t a, int16x8_t b) - A32: VCEQ.I16 Qd, Qn, Qm - A64: CMEQ Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vceqq_s32 (int32x4_t a, int32x4_t b) - A32: VCEQ.I32 Qd, Qn, Qm - A64: CMEQ Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x16_t vceqq_s8 (int8x16_t a, int8x16_t b) - A32: VCEQ.I8 Qd, Qn, Qm - A64: CMEQ Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vceqq_f32 (float32x4_t a, float32x4_t b) - A32: VCEQ.F32 Qd, Qn, Qm - A64: FCMEQ Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vceqq_u16 (uint16x8_t a, uint16x8_t b) - A32: VCEQ.I16 Qd, Qn, Qm - A64: CMEQ Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vceqq_u32 (uint32x4_t a, uint32x4_t b) - A32: VCEQ.I32 Qd, Qn, Qm - A64: CMEQ Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vceq_u8 (uint8x8_t a, uint8x8_t b) - A32: VCEQ.I8 Dd, Dn, Dm - A64: CMEQ Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vceq_s16 (int16x4_t a, int16x4_t b) - A32: VCEQ.I16 Dd, Dn, Dm - A64: CMEQ Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vceq_s32 (int32x2_t a, int32x2_t b) - A32: VCEQ.I32 Dd, Dn, Dm - A64: CMEQ Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vceq_s8 (int8x8_t a, int8x8_t b) - A32: VCEQ.I8 Dd, Dn, Dm - A64: CMEQ Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vceq_f32 (float32x2_t a, float32x2_t b) - A32: VCEQ.F32 Dd, Dn, Dm - A64: FCMEQ Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vceq_u16 (uint16x4_t a, uint16x4_t b) - A32: VCEQ.I16 Dd, Dn, Dm - A64: CMEQ Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vceq_u32 (uint32x2_t a, uint32x2_t b) - A32: VCEQ.I32 Dd, Dn, Dm - A64: CMEQ Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vcgtq_u8 (uint8x16_t a, uint8x16_t b) - A32: VCGT.U8 Qd, Qn, Qm - A64: CMHI Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vcgtq_s16 (int16x8_t a, int16x8_t b) - A32: VCGT.S16 Qd, Qn, Qm - A64: CMGT Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcgtq_s32 (int32x4_t a, int32x4_t b) - A32: VCGT.S32 Qd, Qn, Qm - A64: CMGT Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x16_t vcgtq_s8 (int8x16_t a, int8x16_t b) - A32: VCGT.S8 Qd, Qn, Qm - A64: CMGT Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vcgtq_f32 (float32x4_t a, float32x4_t b) - A32: VCGT.F32 Qd, Qn, Qm - A64: FCMGT Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vcgtq_u16 (uint16x8_t a, uint16x8_t b) - A32: VCGT.U16 Qd, Qn, Qm - A64: CMHI Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcgtq_u32 (uint32x4_t a, uint32x4_t b) - A32: VCGT.U32 Qd, Qn, Qm - A64: CMHI Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vcgt_u8 (uint8x8_t a, uint8x8_t b) - A32: VCGT.U8 Dd, Dn, Dm - A64: CMHI Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vcgt_s16 (int16x4_t a, int16x4_t b) - A32: VCGT.S16 Dd, Dn, Dm - A64: CMGT Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vcgt_s32 (int32x2_t a, int32x2_t b) - A32: VCGT.S32 Dd, Dn, Dm - A64: CMGT Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vcgt_s8 (int8x8_t a, int8x8_t b) - A32: VCGT.S8 Dd, Dn, Dm - A64: CMGT Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vcgt_f32 (float32x2_t a, float32x2_t b) - A32: VCGT.F32 Dd, Dn, Dm - A64: FCMGT Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vcgt_u16 (uint16x4_t a, uint16x4_t b) - A32: VCGT.U16 Dd, Dn, Dm - A64: CMHI Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vcgt_u32 (uint32x2_t a, uint32x2_t b) - A32: VCGT.U32 Dd, Dn, Dm - A64: CMHI Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vcgeq_u8 (uint8x16_t a, uint8x16_t b) - A32: VCGE.U8 Qd, Qn, Qm - A64: CMHS Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vcgeq_s16 (int16x8_t a, int16x8_t b) - A32: VCGE.S16 Qd, Qn, Qm - A64: CMGE Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcgeq_s32 (int32x4_t a, int32x4_t b) - A32: VCGE.S32 Qd, Qn, Qm - A64: CMGE Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x16_t vcgeq_s8 (int8x16_t a, int8x16_t b) - A32: VCGE.S8 Qd, Qn, Qm - A64: CMGE Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vcgeq_f32 (float32x4_t a, float32x4_t b) - A32: VCGE.F32 Qd, Qn, Qm - A64: FCMGE Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vcgeq_u16 (uint16x8_t a, uint16x8_t b) - A32: VCGE.U16 Qd, Qn, Qm - A64: CMHS Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcgeq_u32 (uint32x4_t a, uint32x4_t b) - A32: VCGE.U32 Qd, Qn, Qm - A64: CMHS Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vcge_u8 (uint8x8_t a, uint8x8_t b) - A32: VCGE.U8 Dd, Dn, Dm - A64: CMHS Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vcge_s16 (int16x4_t a, int16x4_t b) - A32: VCGE.S16 Dd, Dn, Dm - A64: CMGE Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vcge_s32 (int32x2_t a, int32x2_t b) - A32: VCGE.S32 Dd, Dn, Dm - A64: CMGE Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vcge_s8 (int8x8_t a, int8x8_t b) - A32: VCGE.S8 Dd, Dn, Dm - A64: CMGE Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vcge_f32 (float32x2_t a, float32x2_t b) - A32: VCGE.F32 Dd, Dn, Dm - A64: FCMGE Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vcge_u16 (uint16x4_t a, uint16x4_t b) - A32: VCGE.U16 Dd, Dn, Dm - A64: CMHS Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vcge_u32 (uint32x2_t a, uint32x2_t b) - A32: VCGE.U32 Dd, Dn, Dm - A64: CMHS Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vcltq_u8 (uint8x16_t a, uint8x16_t b) - A32: VCLT.U8 Qd, Qn, Qm - A64: CMHI Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vcltq_s16 (int16x8_t a, int16x8_t b) - A32: VCLT.S16 Qd, Qn, Qm - A64: CMGT Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcltq_s32 (int32x4_t a, int32x4_t b) - A32: VCLT.S32 Qd, Qn, Qm - A64: CMGT Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x16_t vcltq_s8 (int8x16_t a, int8x16_t b) - A32: VCLT.S8 Qd, Qn, Qm - A64: CMGT Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vcltq_f32 (float32x4_t a, float32x4_t b) - A32: VCLT.F32 Qd, Qn, Qm - A64: FCMGT Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vcltq_u16 (uint16x8_t a, uint16x8_t b) - A32: VCLT.U16 Qd, Qn, Qm - A64: CMHI Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcltq_u32 (uint32x4_t a, uint32x4_t b) - A32: VCLT.U32 Qd, Qn, Qm - A64: CMHI Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vclt_u8 (uint8x8_t a, uint8x8_t b) - A32: VCLT.U8 Dd, Dn, Dm - A64: CMHI Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vclt_s16 (int16x4_t a, int16x4_t b) - A32: VCLT.S16 Dd, Dn, Dm - A64: CMGT Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vclt_s32 (int32x2_t a, int32x2_t b) - A32: VCLT.S32 Dd, Dn, Dm - A64: CMGT Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vclt_s8 (int8x8_t a, int8x8_t b) - A32: VCLT.S8 Dd, Dn, Dm - A64: CMGT Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vclt_f32 (float32x2_t a, float32x2_t b) - A32: VCLT.F32 Dd, Dn, Dm - A64: FCMGT Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vclt_u16 (uint16x4_t a, uint16x4_t b) - A32: VCLT.U16 Dd, Dn, Dm - A64: CMHI Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vclt_u32 (uint32x2_t a, uint32x2_t b) - A32: VCLT.U32 Dd, Dn, Dm - A64: CMHI Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vcleq_u8 (uint8x16_t a, uint8x16_t b) - A32: VCLE.U8 Qd, Qn, Qm - A64: CMHS Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vcleq_s16 (int16x8_t a, int16x8_t b) - A32: VCLE.S16 Qd, Qn, Qm - A64: CMGE Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcleq_s32 (int32x4_t a, int32x4_t b) - A32: VCLE.S32 Qd, Qn, Qm - A64: CMGE Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x16_t vcleq_s8 (int8x16_t a, int8x16_t b) - A32: VCLE.S8 Qd, Qn, Qm - A64: CMGE Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vcleq_f32 (float32x4_t a, float32x4_t b) - A32: VCLE.F32 Qd, Qn, Qm - A64: FCMGE Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vcleq_u16 (uint16x8_t a, uint16x8_t b) - A32: VCLE.U16 Qd, Qn, Qm - A64: CMHS Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vcleq_u32 (uint32x4_t a, uint32x4_t b) - A32: VCLE.U32 Qd, Qn, Qm - A64: CMHS Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vcle_u8 (uint8x8_t a, uint8x8_t b) - A32: VCLE.U8 Dd, Dn, Dm - A64: CMHS Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vcle_s16 (int16x4_t a, int16x4_t b) - A32: VCLE.S16 Dd, Dn, Dm - A64: CMGE Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vcle_s32 (int32x2_t a, int32x2_t b) - A32: VCLE.S32 Dd, Dn, Dm - A64: CMGE Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vcle_s8 (int8x8_t a, int8x8_t b) - A32: VCLE.S8 Dd, Dn, Dm - A64: CMGE Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vcle_f32 (float32x2_t a, float32x2_t b) - A32: VCLE.F32 Dd, Dn, Dm - A64: FCMGE Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vcle_u16 (uint16x4_t a, uint16x4_t b) - A32: VCLE.U16 Dd, Dn, Dm - A64: CMHS Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vcle_u32 (uint32x2_t a, uint32x2_t b) - A32: VCLE.U32 Dd, Dn, Dm - A64: CMHS Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vtstq_u8 (uint8x16_t a, uint8x16_t b) - A32: VTST.8 Qd, Qn, Qm - A64: CMTST Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vtstq_s16 (int16x8_t a, int16x8_t b) - A32: VTST.16 Qd, Qn, Qm - A64: CMTST Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vtstq_s32 (int32x4_t a, int32x4_t b) - A32: VTST.32 Qd, Qn, Qm - A64: CMTST Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x16_t vtstq_s8 (int8x16_t a, int8x16_t b) - A32: VTST.8 Qd, Qn, Qm - A64: CMTST Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vtstq_f32 (float32x4_t a, float32x4_t b) - A32: VTST.32 Qd, Qn, Qm - A64: CMTST Vd.4S, Vn.4S, Vm.4S The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x8_t vtstq_u16 (uint16x8_t a, uint16x8_t b) - A32: VTST.16 Qd, Qn, Qm - A64: CMTST Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vtstq_u32 (uint32x4_t a, uint32x4_t b) - A32: VTST.32 Qd, Qn, Qm - A64: CMTST Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vtst_u8 (uint8x8_t a, uint8x8_t b) - A32: VTST.8 Dd, Dn, Dm - A64: CMTST Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vtst_s16 (int16x4_t a, int16x4_t b) - A32: VTST.16 Dd, Dn, Dm - A64: CMTST Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vtst_s32 (int32x2_t a, int32x2_t b) - A32: VTST.32 Dd, Dn, Dm - A64: CMTST Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vtst_s8 (int8x8_t a, int8x8_t b) - A32: VTST.8 Dd, Dn, Dm - A64: CMTST Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vtst_f32 (float32x2_t a, float32x2_t b) - A32: VTST.32 Dd, Dn, Dm - A64: CMTST Vd.2S, Vn.2S, Vm.2S The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x4_t vtst_u16 (uint16x4_t a, uint16x4_t b) - A32: VTST.16 Dd, Dn, Dm - A64: CMTST Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vtst_u32 (uint32x2_t a, uint32x2_t b) - A32: VTST.32 Dd, Dn, Dm - A64: CMTST Vd.2S, Vn.2S, Vm.2S - - - - - - - int32x4_t vcvtaq_s32_f32 (float32x4_t a) - A32: VCVTA.S32.F32 Qd, Qm - A64: FCVTAS Vd.4S, Vn.4S - - - - - - int32x2_t vcvta_s32_f32 (float32x2_t a) - A32: VCVTA.S32.F32 Dd, Dm - A64: FCVTAS Vd.2S, Vn.2S - - - - - - int32_t vcvtas_s32_f32 (float32_t a) - A32: VCVTA.S32.F32 Sd, Sm - A64: FCVTAS Sd, Sn - - - - - - int32x4_t vcvtnq_s32_f32 (float32x4_t a) - A32: VCVTN.S32.F32 Qd, Qm - A64: FCVTNS Vd.4S, Vn.4S - - - - - - int32x2_t vcvtn_s32_f32 (float32x2_t a) - A32: VCVTN.S32.F32 Dd, Dm - A64: FCVTNS Vd.2S, Vn.2S - - - - - - int32_t vcvtns_s32_f32 (float32_t a) - A32: VCVTN.S32.F32 Sd, Sm - A64: FCVTNS Sd, Sn - - - - - - int32x4_t vcvtmq_s32_f32 (float32x4_t a) - A32: VCVTM.S32.F32 Qd, Qm - A64: FCVTMS Vd.4S, Vn.4S - - - - - - int32x2_t vcvtm_s32_f32 (float32x2_t a) - A32: VCVTM.S32.F32 Dd, Dm - A64: FCVTMS Vd.2S, Vn.2S - - - - - - int32_t vcvtms_s32_f32 (float32_t a) - A32: VCVTM.S32.F32 Sd, Sm - A64: FCVTMS Sd, Sn - - - - - - int32x4_t vcvtpq_s32_f32 (float32x4_t a) - A32: VCVTP.S32.F32 Qd, Qm - A64: FCVTPS Vd.4S, Vn.4S - - - - - - int32x2_t vcvtp_s32_f32 (float32x2_t a) - A32: VCVTP.S32.F32 Dd, Dm - A64: FCVTPS Vd.2S, Vn.2S - - - - - - int32_t vcvtps_s32_f32 (float32_t a) - A32: VCVTP.S32.F32 Sd, Sm - A64: FCVTPS Sd, Sn - - - - - - int32x4_t vcvtq_s32_f32 (float32x4_t a) - A32: VCVT.S32.F32 Qd, Qm - A64: FCVTZS Vd.4S, Vn.4S - - - - - - int32x2_t vcvt_s32_f32 (float32x2_t a) - A32: VCVT.S32.F32 Dd, Dm - A64: FCVTZS Vd.2S, Vn.2S - - - - - - int32_t vcvts_s32_f32 (float32_t a) - A32: VCVT.S32.F32 Sd, Sm - A64: FCVTZS Sd, Sn - - - - - - float32x4_t vcvtq_f32_s32 (int32x4_t a) - A32: VCVT.F32.S32 Qd, Qm - A64: SCVTF Vd.4S, Vn.4S - - - - - - float32x4_t vcvtq_f32_u32 (uint32x4_t a) - A32: VCVT.F32.U32 Qd, Qm - A64: UCVTF Vd.4S, Vn.4S - - - - - - float32x2_t vcvt_f32_s32 (int32x2_t a) - A32: VCVT.F32.S32 Dd, Dm - A64: SCVTF Vd.2S, Vn.2S - - - - - - float32x2_t vcvt_f32_u32 (uint32x2_t a) - A32: VCVT.F32.U32 Dd, Dm - A64: UCVTF Vd.2S, Vn.2S - - - - - - float32_t vcvts_f32_s32 (int32_t a) - A32: VCVT.F32.S32 Sd, Sm - A64: SCVTF Sd, Sn - - - - - - float32_t vcvts_f32_u32 (uint32_t a) - A32: VCVT.F32.U32 Sd, Sm - A64: UCVTF Sd, Sn - - - - - - uint32x4_t vcvtaq_u32_f32 (float32x4_t a) - A32: VCVTA.U32.F32 Qd, Qm - A64: FCVTAU Vd.4S, Vn.4S - - - - - - uint32x2_t vcvta_u32_f32 (float32x2_t a) - A32: VCVTA.U32.F32 Dd, Dm - A64: FCVTAU Vd.2S, Vn.2S - - - - - - uint32_t vcvtas_u32_f32 (float32_t a) - A32: VCVTA.U32.F32 Sd, Sm - A64: FCVTAU Sd, Sn - - - - - - uint32x4_t vcvtnq_u32_f32 (float32x4_t a) - A32: VCVTN.U32.F32 Qd, Qm - A64: FCVTNU Vd.4S, Vn.4S - - - - - - uint32x2_t vcvtn_u32_f32 (float32x2_t a) - A32: VCVTN.U32.F32 Dd, Dm - A64: FCVTNU Vd.2S, Vn.2S - - - - - - uint32_t vcvtns_u32_f32 (float32_t a) - A32: VCVTN.U32.F32 Sd, Sm - A64: FCVTNU Sd, Sn - - - - - - uint32x4_t vcvtmq_u32_f32 (float32x4_t a) - A32: VCVTM.U32.F32 Qd, Qm - A64: FCVTMU Vd.4S, Vn.4S - - - - - - uint32x2_t vcvtm_u32_f32 (float32x2_t a) - A32: VCVTM.U32.F32 Dd, Dm - A64: FCVTMU Vd.2S, Vn.2S - - - - - - uint32_t vcvtms_u32_f32 (float32_t a) - A32: VCVTM.U32.F32 Sd, Sm - A64: FCVTMU Sd, Sn - - - - - - uint32x4_t vcvtpq_u32_f32 (float32x4_t a) - A32: VCVTP.U32.F32 Qd, Qm - A64: FCVTPU Vd.4S, Vn.4S - - - - - - uint32x2_t vcvtp_u32_f32 (float32x2_t a) - A32: VCVTP.U32.F32 Dd, Dm - A64: FCVTPU Vd.2S, Vn.2S - - - - - - uint32_t vcvtps_u32_f32 (float32_t a) - A32: VCVTP.U32.F32 Sd, Sm - A64: FCVTPU Sd, Sn - - - - - - uint32x4_t vcvtq_u32_f32 (float32x4_t a) - A32: VCVT.U32.F32 Qd, Qm - A64: FCVTZU Vd.4S, Vn.4S - - - - - - uint32x2_t vcvt_u32_f32 (float32x2_t a) - A32: VCVT.U32.F32 Dd, Dm - A64: FCVTZU Vd.2S, Vn.2S - - - - - - uint32_t vcvts_u32_f32 (float32_t a) - A32: VCVT.U32.F32 Sd, Sm - A64: FCVTZU Sd, Sn - - - - - - float64x1_t vdiv_f64 (float64x1_t a, float64x1_t b) - A32: VDIV.F64 Dd, Dn, Dm - A64: FDIV Dd, Dn, Dm - - - - - - - float32_t vdivs_f32 (float32_t a, float32_t b) - A32: VDIV.F32 Sd, Sn, Sm - A64: FDIV Sd, Sn, Sm The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint8x16_t vdupq_lane_u8 (uint8x16_t vec, const int lane) - A32: VDUP.8 Qd, Dm[index] - A64: DUP Vd.16B, Vn.B[index] - - - - - - - int16x8_t vdupq_lane_s16 (int16x8_t vec, const int lane) - A32: VDUP.16 Qd, Dm[index] - A64: DUP Vd.8H, Vn.H[index] - - - - - - - int32x4_t vdupq_lane_s32 (int32x4_t vec, const int lane) - A32: VDUP.32 Qd, Dm[index] - A64: DUP Vd.4S, Vn.S[index] - - - - - - - int8x16_t vdupq_lane_s8 (int8x16_t vec, const int lane) - A32: VDUP.8 Qd, Dm[index] - A64: DUP Vd.16B, Vn.B[index] - - - - - - - float32x4_t vdupq_lane_f32 (float32x4_t vec, const int lane) - A32: VDUP.32 Qd, Dm[index] - A64: DUP Vd.4S, Vn.S[index] - - - - - - - uint16x8_t vdupq_lane_u16 (uint16x8_t vec, const int lane) - A32: VDUP.16 Qd, Dm[index] - A64: DUP Vd.8H, Vn.H[index] - - - - - - - uint32x4_t vdupq_lane_u32 (uint32x4_t vec, const int lane) - A32: VDUP.32 Qd, Dm[index] - A64: DUP Vd.4S, Vn.S[index] - - - - - - - uint8x16_t vdupq_lane_u8 (uint8x8_t vec, const int lane) - A32: VDUP.8 Qd, Dm[index] - A64: DUP Vd.16B, Vn.B[index] - - - - - - - int16x8_t vdupq_lane_s16 (int16x4_t vec, const int lane) - A32: VDUP.16 Qd, Dm[index] - A64: DUP Vd.8H, Vn.H[index] - - - - - - - int32x4_t vdupq_lane_s32 (int32x2_t vec, const int lane) - A32: VDUP.32 Qd, Dm[index] - A64: DUP Vd.4S, Vn.S[index] - - - - - - - int8x16_t vdupq_lane_s8 (int8x8_t vec, const int lane) - A32: VDUP.8 Qd, Dm[index] - A64: DUP Vd.16B, Vn.B[index] - - - - - - - float32x4_t vdupq_lane_f32 (float32x2_t vec, const int lane) - A32: VDUP.32 Qd, Dm[index] - A64: DUP Vd.4S, Vn.S[index] - - - - - - - uint16x8_t vdupq_lane_u16 (uint16x4_t vec, const int lane) - A32: VDUP.16 Qd, Dm[index] - A64: DUP Vd.8H, Vn.H[index] - - - - - - - uint32x4_t vdupq_lane_u32 (uint32x2_t vec, const int lane) - A32: VDUP.32 Qd, Dm[index] - A64: DUP Vd.4S, Vn.S[index] - - - - - - - uint8x8_t vdup_laneq_u8 (uint8x16_t vec, const int lane) - A32: VDUP.8 Dd, Dm[index] - A64: DUP Vd.8B, Vn.B[index] - - - - - - - int16x4_t vdup_laneq_s16 (int16x8_t vec, const int lane) - A32: VDUP.16 Dd, Dm[index] - A64: DUP Vd.4H, Vn.H[index] - - - - - - - int32x2_t vdup_laneq_s32 (int32x4_t vec, const int lane) - A32: VDUP.32 Dd, Dm[index] - A64: DUP Vd.2S, Vn.S[index] - - - - - - - int8x8_t vdup_laneq_s8 (int8x16_t vec, const int lane) - A32: VDUP.8 Dd, Dm[index] - A64: DUP Vd.8B, Vn.B[index] - - - - - - - float32x2_t vdup_laneq_f32 (float32x4_t vec, const int lane) - A32: VDUP.32 Dd, Dm[index] - A64: DUP Vd.2S, Vn.S[index] - - - - - - - uint16x4_t vdup_laneq_u16 (uint16x8_t vec, const int lane) - A32: VDUP.16 Dd, Dm[index] - A64: DUP Vd.4H, Vn.H[index] - - - - - - - uint32x2_t vdup_laneq_u32 (uint32x4_t vec, const int lane) - A32: VDUP.32 Dd, Dm[index] - A64: DUP Vd.2S, Vn.S[index] - - - - - - - uint8x8_t vdup_lane_u8 (uint8x8_t vec, const int lane) - A32: VDUP.8 Dd, Dm[index] - A64: DUP Vd.8B, Vn.B[index] - - - - - - - int16x4_t vdup_lane_s16 (int16x4_t vec, const int lane) - A32: VDUP.16 Dd, Dm[index] - A64: DUP Vd.4H, Vn.H[index] - - - - - - - int32x2_t vdup_lane_s32 (int32x2_t vec, const int lane) - A32: VDUP.32 Dd, Dm[index] - A64: DUP Vd.2S, Vn.S[index] - - - - - - - int8x8_t vdup_lane_s8 (int8x8_t vec, const int lane) - A32: VDUP.8 Dd, Dm[index] - A64: DUP Vd.8B, Vn.B[index] - - - - - - - float32x2_t vdup_lane_f32 (float32x2_t vec, const int lane) - A32: VDUP.32 Dd, Dm[index] - A64: DUP Vd.2S, Vn.S[index] - - - - - - - uint16x4_t vdup_lane_u16 (uint16x4_t vec, const int lane) - A32: VDUP.16 Dd, Dm[index] - A64: DUP Vd.4H, Vn.H[index] - - - - - - - uint32x2_t vdup_lane_u32 (uint32x2_t vec, const int lane) - A32: VDUP.32 Dd, Dm[index] - A64: DUP Vd.2S, Vn.S[index] - - - - - - - uint8x16_t vdupq_n_u8 (uint8_t value) - A32: VDUP.8 Qd, Rt - A64: DUP Vd.16B, Rn - - - - - - int16x8_t vdupq_n_s16 (int16_t value) - A32: VDUP.16 Qd, Rt - A64: DUP Vd.8H, Rn - - - - - - int32x4_t vdupq_n_s32 (int32_t value) - A32: VDUP.32 Qd, Rt - A64: DUP Vd.4S, Rn - - - - - - int8x16_t vdupq_n_s8 (int8_t value) - A32: VDUP.8 Qd, Rt - A64: DUP Vd.16B, Rn - - - - - - float32x4_t vdupq_n_f32 (float32_t value) - A32: VDUP Qd, Dm[0] - A64: DUP Vd.4S, Vn.S[0] - - - - - - uint16x8_t vdupq_n_u16 (uint16_t value) - A32: VDUP.16 Qd, Rt - A64: DUP Vd.8H, Rn - - - - - - uint32x4_t vdupq_n_u32 (uint32_t value) - A32: VDUP.32 Qd, Rt - A64: DUP Vd.4S, Rn - - - - - - uint8x8_t vdup_n_u8 (uint8_t value) - A32: VDUP.8 Dd, Rt - A64: DUP Vd.8B, Rn - - - - - - int16x4_t vdup_n_s16 (int16_t value) - A32: VDUP.16 Dd, Rt - A64: DUP Vd.4H, Rn - - - - - - int32x2_t vdup_n_s32 (int32_t value) - A32: VDUP.32 Dd, Rt - A64: DUP Vd.2S, Rn - - - - - - int8x8_t vdup_n_s8 (int8_t value) - A32: VDUP.8 Dd, Rt - A64: DUP Vd.8B, Rn - - - - - - float32x2_t vdup_n_f32 (float32_t value) - A32: VDUP Dd, Dm[0] - A64: DUP Vd.2S, Vn.S[0] - - - - - - uint16x4_t vdup_n_u16 (uint16_t value) - A32: VDUP.16 Dd, Rt - A64: DUP Vd.4H, Rn - - - - - - uint32x2_t vdup_n_u32 (uint32_t value) - A32: VDUP.32 Dd, Rt - A64: DUP Vd.2S, Rn - - - - - - uint8_t vgetq_lane_u8 (uint8x16_t v, const int lane) - A32: VMOV.U8 Rt, Dn[lane] - A64: UMOV Wd, Vn.B[lane] - - - - - - - float64_t vgetq_lane_f64 (float64x2_t v, const int lane) - A32: VMOV.F64 Dd, Dm - A64: DUP Dd, Vn.D[lane] - - - - - - - int16_t vgetq_lane_s16 (int16x8_t v, const int lane) - A32: VMOV.S16 Rt, Dn[lane] - A64: SMOV Wd, Vn.H[lane] - - - - - - - int32_t vgetq_lane_s32 (int32x4_t v, const int lane) - A32: VMOV.32 Rt, Dn[lane] - A64: SMOV Wd, Vn.S[lane] - - - - - - - int64_t vgetq_lane_s64 (int64x2_t v, const int lane) - A32: VMOV Rt, Rt2, Dm - A64: UMOV Xd, Vn.D[lane] - - - - - - - int8_t vgetq_lane_s8 (int8x16_t v, const int lane) - A32: VMOV.S8 Rt, Dn[lane] - A64: SMOV Wd, Vn.B[lane] - - - - - - - float32_t vgetq_lane_f32 (float32x4_t v, const int lane) - A32: VMOV.F32 Sd, Sm - A64: DUP Sd, Vn.S[lane] - - - - - - - uint16_t vgetq_lane_u16 (uint16x8_t v, const int lane) - A32: VMOV.U16 Rt, Dn[lane] - A64: UMOV Wd, Vn.H[lane] - - - - - - - uint32_t vgetq_lane_u32 (uint32x4_t v, const int lane) - A32: VMOV.32 Rt, Dn[lane] - A64: UMOV Wd, Vn.S[lane] - - - - - - - uint64_t vgetq_lane_u64 (uint64x2_t v, const int lane) - A32: VMOV Rt, Rt2, Dm - A64: UMOV Xd, Vn.D[lane] - - - - - - - uint8_t vget_lane_u8 (uint8x8_t v, const int lane) - A32: VMOV.U8 Rt, Dn[lane] - A64: UMOV Wd, Vn.B[lane] - - - - - - - int16_t vget_lane_s16 (int16x4_t v, const int lane) - A32: VMOV.S16 Rt, Dn[lane] - A64: SMOV Wd, Vn.H[lane] - - - - - - - int32_t vget_lane_s32 (int32x2_t v, const int lane) - A32: VMOV.32 Rt, Dn[lane] - A64: SMOV Wd, Vn.S[lane] - - - - - - - int8_t vget_lane_s8 (int8x8_t v, const int lane) - A32: VMOV.S8 Rt, Dn[lane] - A64: SMOV Wd, Vn.B[lane] - - - - - - - float32_t vget_lane_f32 (float32x2_t v, const int lane) - A32: VMOV.F32 Sd, Sm - A64: DUP Sd, Vn.S[lane] - - - - - - - uint16_t vget_lane_u16 (uint16x4_t v, const int lane) - A32: VMOV.U16 Rt, Dn[lane] - A64: UMOV Wd, Vn.H[lane] - - - - - - - uint32_t vget_lane_u32 (uint32x2_t v, const int lane) - A32: VMOV.32 Rt, Dn[lane] - A64: UMOV Wd, Vn.S[lane] - - - - - - - int8x8_t vmovn_s16 (int16x8_t a) - A32: VMOVN.I16 Dd, Qm - A64: XTN Vd.8B, Vn.8H - - - - - - int16x4_t vmovn_s32 (int32x4_t a) - A32: VMOVN.I32 Dd, Qm - A64: XTN Vd.4H, Vn.4S - - - - - - int32x2_t vmovn_s64 (int64x2_t a) - A32: VMOVN.I64 Dd, Qm - A64: XTN Vd.2S, Vn.2D - - - - - - uint8x8_t vmovn_u16 (uint16x8_t a) - A32: VMOVN.I16 Dd, Qm - A64: XTN Vd.8B, Vn.8H - - - - - - uint16x4_t vmovn_u32 (uint32x4_t a) - A32: VMOVN.I32 Dd, Qm - A64: XTN Vd.4H, Vn.4S - - - - - - uint32x2_t vmovn_u64 (uint64x2_t a) - A32: VMOVN.I64 Dd, Qm - A64: XTN Vd.2S, Vn.2D - - - - - int8x8_t vqmovn_s16 (int16x8_t a) A32: VQMOVN.S16 Dd, Qm A64: SQXTN Vd.8B, Vn.8H - - - - int16x4_t vqmovn_s32 (int32x4_t a) A32: VQMOVN.S32 Dd, Qm A64: SQXTN Vd.4H, Vn.4S - - - - int32x2_t vqmovn_s64 (int64x2_t a) A32: VQMOVN.S64 Dd, Qm A64: SQXTN Vd.2S, Vn.2D - - - - uint8x8_t vqmovn_u16 (uint16x8_t a) A32: VQMOVN.U16 Dd, Qm A64: UQXTN Vd.8B, Vn.8H - - - - uint16x4_t vqmovn_u32 (uint32x4_t a) A32: VQMOVN.U32 Dd, Qm A64: UQXTN Vd.4H, Vn.4S - - - - uint32x2_t vqmovn_u64 (uint64x2_t a) A32: VQMOVN.U64 Dd, Qm A64: UQXTN Vd.2S, Vn.2D - - - - uint8x8_t vqmovun_s16 (int16x8_t a) A32: VQMOVUN.S16 Dd, Qm A64: SQXTUN Vd.8B, Vn.8H - - - - uint16x4_t vqmovun_s32 (int32x4_t a) A32: VQMOVUN.S32 Dd, Qm A64: SQXTUN Vd.4H, Vn.4S - - - - uint32x2_t vqmovun_s64 (int64x2_t a) A32: VQMOVUN.S64 Dd, Qm A64: SQXTUN Vd.2S, Vn.2D - - - - uint8x16_t vqmovun_high_s16 (uint8x8_t r, int16x8_t a) A32: VQMOVUN.S16 Dd+1, Qm A64: SQXTUN2 Vd.16B, Vn.8H - - - - - uint16x8_t vqmovun_high_s32 (uint16x4_t r, int32x4_t a) A32: VQMOVUN.S32 Dd+1, Qm A64: SQXTUN2 Vd.8H, Vn.4S - - - - - uint32x4_t vqmovun_high_s64 (uint32x2_t r, int64x2_t a) A32: VQMOVUN.S64 Dd+1, Qm A64: SQXTUN2 Vd.4S, Vn.2D - - - - - uint8x16_t vqmovn_high_u16 (uint8x8_t r, uint16x8_t a) A32: VQMOVN.U16 Dd+1, Qm A64: UQXTN2 Vd.16B, Vn.8H - - - - - int16x8_t vqmovn_high_s32 (int16x4_t r, int32x4_t a) A32: VQMOVN.S32 Dd+1, Qm A64: SQXTN2 Vd.8H, Vn.4S - - - - - int32x4_t vqmovn_high_s64 (int32x2_t r, int64x2_t a) A32: VQMOVN.S64 Dd+1, Qm A64: SQXTN2 Vd.4S, Vn.2D - - - - - int8x16_t vqmovn_high_s16 (int8x8_t r, int16x8_t a) A32: VQMOVN.S16 Dd+1, Qm A64: SQXTN2 Vd.16B, Vn.8H - - - - - uint16x8_t vqmovn_high_u32 (uint16x4_t r, uint32x4_t a) A32: VQMOVN.U32 Dd+1, Qm A64: UQXTN2 Vd.8H, Vn.4S - - - - - uint32x4_t vqmovn_high_u64 (uint32x2_t r, uint64x2_t a) A32: VQMOVN.U64 Dd+1, Qm A64: UQXTN2 Vd.4S, Vn.2D - - - - - - uint8x16_t vmovn_high_u16 (uint8x8_t r, uint16x8_t a) - A32: VMOVN.I16 Dd+1, Qm - A64: XTN2 Vd.16B, Vn.8H - - - - - - - int16x8_t vmovn_high_s32 (int16x4_t r, int32x4_t a) - A32: VMOVN.I32 Dd+1, Qm - A64: XTN2 Vd.8H, Vn.4S - - - - - - - int32x4_t vmovn_high_s64 (int32x2_t r, int64x2_t a) - A32: VMOVN.I64 Dd+1, Qm - A64: XTN2 Vd.4S, Vn.2D - - - - - - - int8x16_t vmovn_high_s16 (int8x8_t r, int16x8_t a) - A32: VMOVN.I16 Dd+1, Qm - A64: XTN2 Vd.16B, Vn.8H - - - - - - - uint16x8_t vmovn_high_u32 (uint16x4_t r, uint32x4_t a) - A32: VMOVN.I32 Dd+1, Qm - A64: XTN2 Vd.8H, Vn.4S - - - - - - - uint32x4_t vmovn_high_u64 (uint32x2_t r, uint64x2_t a) - A32: VMOVN.I64 Dd+1, Qm - A64: XTN2 Vd.4S, Vn.2D - - - - - - - uint8x16_t vextq_s8 (uint8x16_t a, uint8x16_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #n - A64: EXT Vd.16B, Vn.16B, Vm.16B, #n - - - - - - - - float64x2_t vextq_f64 (float64x2_t a, float64x2_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*8) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*8) - - - - - - - - int16x8_t vextq_s16 (int16x8_t a, int16x8_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*2) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*2) - - - - - - - - int32x4_t vextq_s32 (int32x4_t a, int32x4_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*4) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*4) - - - - - - - - int64x2_t vextq_s64 (int64x2_t a, int64x2_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*8) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*8) - - - - - - - - int8x16_t vextq_s8 (int8x16_t a, int8x16_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #n - A64: EXT Vd.16B, Vn.16B, Vm.16B, #n - - - - - - - - float32x4_t vextq_f32 (float32x4_t a, float32x4_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*4) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*4) - - - - - - - - uint16x8_t vextq_s16 (uint16x8_t a, uint16x8_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*2) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*2) - - - - - - - - uint32x4_t vextq_s32 (uint32x4_t a, uint32x4_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*4) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*4) - - - - - - - - uint64x2_t vextq_s64 (uint64x2_t a, uint64x2_t b, const int n) - A32: VEXT.8 Qd, Qn, Qm, #(n*8) - A64: EXT Vd.16B, Vn.16B, Vm.16B, #(n*8) - - - - - - - - uint8x8_t vext_s8 (uint8x8_t a, uint8x8_t b, const int n) - A32: VEXT.8 Dd, Dn, Dm, #n - A64: EXT Vd.8B, Vn.8B, Vm.8B, #n - - - - - - - - int16x4_t vext_s16 (int16x4_t a, int16x4_t b, const int n) - A32: VEXT.8 Dd, Dn, Dm, #(n*2) - A64: EXT Vd.8B, Vn.8B, Vm.8B, #(n*2) - - - - - - - - int32x2_t vext_s32 (int32x2_t a, int32x2_t b, const int n) - A32: VEXT.8 Dd, Dn, Dm, #(n*4) - A64: EXT Vd.8B, Vn.8B, Vm.8B, #(n*4) - - - - - - - - int8x8_t vext_s8 (int8x8_t a, int8x8_t b, const int n) - A32: VEXT.8 Dd, Dn, Dm, #n - A64: EXT Vd.8B, Vn.8B, Vm.8B, #n - - - - - - - - float32x2_t vext_f32 (float32x2_t a, float32x2_t b, const int n) - A32: VEXT.8 Dd, Dn, Dm, #(n*4) - A64: EXT Vd.8B, Vn.8B, Vm.8B, #(n*4) - - - - - - - - uint16x4_t vext_s16 (uint16x4_t a, uint16x4_t b, const int n) - A32: VEXT.8 Dd, Dn, Dm, #(n*2) - A64: EXT Vd.8B, Vn.8B, Vm.8B, #(n*2) - - - - - - - - uint32x2_t vext_s32 (uint32x2_t a, uint32x2_t b, const int n) - A32: VEXT.8 Dd, Dn, Dm, #(n*4) - A64: EXT Vd.8B, Vn.8B, Vm.8B, #(n*4) - - - - - - - - float32x4_t vrndmq_f32 (float32x4_t a) - A32: VRINTM.F32 Qd, Qm - A64: FRINTM Vd.4S, Vn.4S - - - - - - float32x2_t vrndm_f32 (float32x2_t a) - A32: VRINTM.F32 Dd, Dm - A64: FRINTM Vd.2S, Vn.2S - - - - - - float64x1_t vrndm_f64 (float64x1_t a) - A32: VRINTM.F64 Dd, Dm - A64: FRINTM Dd, Dn - - - - - - float32_t vrndms_f32 (float32_t a) - A32: VRINTM.F32 Sd, Sm - A64: FRINTM Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - uint8x16_t vhaddq_u8 (uint8x16_t a, uint8x16_t b) - A32: VHADD.U8 Qd, Qn, Qm - A64: UHADD Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vhaddq_s16 (int16x8_t a, int16x8_t b) - A32: VHADD.S16 Qd, Qn, Qm - A64: SHADD Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vhaddq_s32 (int32x4_t a, int32x4_t b) - A32: VHADD.S32 Qd, Qn, Qm - A64: SHADD Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vhaddq_s8 (int8x16_t a, int8x16_t b) - A32: VHADD.S8 Qd, Qn, Qm - A64: SHADD Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vhaddq_u16 (uint16x8_t a, uint16x8_t b) - A32: VHADD.U16 Qd, Qn, Qm - A64: UHADD Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vhaddq_u32 (uint32x4_t a, uint32x4_t b) - A32: VHADD.U32 Qd, Qn, Qm - A64: UHADD Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vhadd_u8 (uint8x8_t a, uint8x8_t b) - A32: VHADD.U8 Dd, Dn, Dm - A64: UHADD Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vhadd_s16 (int16x4_t a, int16x4_t b) - A32: VHADD.S16 Dd, Dn, Dm - A64: SHADD Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vhadd_s32 (int32x2_t a, int32x2_t b) - A32: VHADD.S32 Dd, Dn, Dm - A64: SHADD Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vhadd_s8 (int8x8_t a, int8x8_t b) - A32: VHADD.S8 Dd, Dn, Dm - A64: SHADD Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vhadd_u16 (uint16x4_t a, uint16x4_t b) - A32: VHADD.U16 Dd, Dn, Dm - A64: UHADD Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vhadd_u32 (uint32x2_t a, uint32x2_t b) - A32: VHADD.U32 Dd, Dn, Dm - A64: UHADD Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vrhaddq_u8 (uint8x16_t a, uint8x16_t b) - A32: VRHADD.U8 Qd, Qn, Qm - A64: URHADD Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vrhaddq_s16 (int16x8_t a, int16x8_t b) - A32: VRHADD.S16 Qd, Qn, Qm - A64: SRHADD Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vrhaddq_s32 (int32x4_t a, int32x4_t b) - A32: VRHADD.S32 Qd, Qn, Qm - A64: SRHADD Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vrhaddq_s8 (int8x16_t a, int8x16_t b) - A32: VRHADD.S8 Qd, Qn, Qm - A64: SRHADD Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vrhaddq_u16 (uint16x8_t a, uint16x8_t b) - A32: VRHADD.U16 Qd, Qn, Qm - A64: URHADD Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vrhaddq_u32 (uint32x4_t a, uint32x4_t b) - A32: VRHADD.U32 Qd, Qn, Qm - A64: URHADD Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vrhadd_u8 (uint8x8_t a, uint8x8_t b) - A32: VRHADD.U8 Dd, Dn, Dm - A64: URHADD Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vrhadd_s16 (int16x4_t a, int16x4_t b) - A32: VRHADD.S16 Dd, Dn, Dm - A64: SRHADD Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vrhadd_s32 (int32x2_t a, int32x2_t b) - A32: VRHADD.S32 Dd, Dn, Dm - A64: SRHADD Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vrhadd_s8 (int8x8_t a, int8x8_t b) - A32: VRHADD.S8 Dd, Dn, Dm - A64: SRHADD Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vrhadd_u16 (uint16x4_t a, uint16x4_t b) - A32: VRHADD.U16 Dd, Dn, Dm - A64: URHADD Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vrhadd_u32 (uint32x2_t a, uint32x2_t b) - A32: VRHADD.U32 Dd, Dn, Dm - A64: URHADD Vd.2S, Vn.2S, Vm.2S - - - - - - - float32x4_t vfmaq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) - A32: VFMA.F32 Qd, Qn, Qm - A64: FMLA Vd.4S, Vn.4S, Vm.4S - - - - - - - - float32x2_t vfma_f32 (float32x2_t a, float32x2_t b, float32x2_t c) - A32: VFMA.F32 Dd, Dn, Dm - A64: FMLA Vd.2S, Vn.2S, Vm.2S - - - - - - - - float64x1_t vfnma_f64 (float64x1_t a, float64x1_t b, float64x1_t c) - A32: VFNMA.F64 Dd, Dn, Dm - A64: FNMADD Dd, Dn, Dm, Da The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - - float32_t vfnmas_f32 (float32_t a, float32_t b, float32_t c) - A32: VFNMA.F32 Sd, Sn, Sm - A64: FNMADD Sd, Sn, Sm, Sa The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - - float64x1_t vfma_f64 (float64x1_t a, float64x1_t b, float64x1_t c) - A32: VFMA.F64 Dd, Dn, Dm - A64: FMADD Dd, Dn, Dm, Da - - - - - - - - float32_t vfmas_f32 (float32_t a, float32_t b, float32_t c) - A32: VFMA.F32 Sd, Sn, Sm - A64: FMADD Sd, Sn, Sm, Sa The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - - float32x4_t vfmsq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) - A32: VFMS.F32 Qd, Qn, Qm - A64: FMLS Vd.4S, Vn.4S, Vm.4S - - - - - - - - float32x2_t vfms_f32 (float32x2_t a, float32x2_t b, float32x2_t c) - A32: VFMS.F32 Dd, Dn, Dm - A64: FMLS Vd.2S, Vn.2S, Vm.2S - - - - - - - - float64x1_t vfnms_f64 (float64x1_t a, float64x1_t b, float64x1_t c) - A32: VFNMS.F64 Dd, Dn, Dm - A64: FNMSUB Dd, Dn, Dm, Da The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - - float32_t vfnmss_f32 (float32_t a, float32_t b, float32_t c) - A32: VFNMS.F32 Sd, Sn, Sm - A64: FNMSUB Sd, Sn, Sm, Sa The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - - float64x1_t vfms_f64 (float64x1_t a, float64x1_t b, float64x1_t c) - A32: VFMS.F64 Dd, Dn, Dm - A64: FMSUB Dd, Dn, Dm, Da - - - - - - - - float32_t vfmss_f32 (float32_t a, float32_t b, float32_t c) - A32: VFMS.F32 Sd, Sn, Sm - A64: FMSUB Sd, Sn, Sm, Sa The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - - uint8x16_t vhsubq_u8 (uint8x16_t a, uint8x16_t b) - A32: VHSUB.U8 Qd, Qn, Qm - A64: UHSUB Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vhsubq_s16 (int16x8_t a, int16x8_t b) - A32: VHSUB.S16 Qd, Qn, Qm - A64: SHSUB Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vhsubq_s32 (int32x4_t a, int32x4_t b) - A32: VHSUB.S32 Qd, Qn, Qm - A64: SHSUB Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vhsubq_s8 (int8x16_t a, int8x16_t b) - A32: VHSUB.S8 Qd, Qn, Qm - A64: SHSUB Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vhsubq_u16 (uint16x8_t a, uint16x8_t b) - A32: VHSUB.U16 Qd, Qn, Qm - A64: UHSUB Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vhsubq_u32 (uint32x4_t a, uint32x4_t b) - A32: VHSUB.U32 Qd, Qn, Qm - A64: UHSUB Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vhsub_u8 (uint8x8_t a, uint8x8_t b) - A32: VHSUB.U8 Dd, Dn, Dm - A64: UHSUB Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vhsub_s16 (int16x4_t a, int16x4_t b) - A32: VHSUB.S16 Dd, Dn, Dm - A64: SHSUB Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vhsub_s32 (int32x2_t a, int32x2_t b) - A32: VHSUB.S32 Dd, Dn, Dm - A64: SHSUB Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vhsub_s8 (int8x8_t a, int8x8_t b) - A32: VHSUB.S8 Dd, Dn, Dm - A64: SHSUB Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vhsub_u16 (uint16x4_t a, uint16x4_t b) - A32: VHSUB.U16 Dd, Dn, Dm - A64: UHSUB Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vhsub_u32 (uint32x2_t a, uint32x2_t b) - A32: VHSUB.U32 Dd, Dn, Dm - A64: UHSUB Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vsetq_lane_u8 (uint8_t a, uint8x16_t v, const int lane) - A32: VMOV.8 Dd[lane], Rt - A64: INS Vd.B[lane], Wn - - - - - - - - float64x2_t vsetq_lane_f64 (float64_t a, float64x2_t v, const int lane) - A32: VMOV.F64 Dd, Dm - A64: INS Vd.D[lane], Vn.D[0] - - - - - - - - int16x8_t vsetq_lane_s16 (int16_t a, int16x8_t v, const int lane) - A32: VMOV.16 Dd[lane], Rt - A64: INS Vd.H[lane], Wn - - - - - - - - int32x4_t vsetq_lane_s32 (int32_t a, int32x4_t v, const int lane) - A32: VMOV.32 Dd[lane], Rt - A64: INS Vd.S[lane], Wn - - - - - - - - int64x2_t vsetq_lane_s64 (int64_t a, int64x2_t v, const int lane) - A32: VMOV.64 Dd, Rt, Rt2 - A64: INS Vd.D[lane], Xn - - - - - - - - int8x16_t vsetq_lane_s8 (int8_t a, int8x16_t v, const int lane) - A32: VMOV.8 Dd[lane], Rt - A64: INS Vd.B[lane], Wn - - - - - - - - float32x4_t vsetq_lane_f32 (float32_t a, float32x4_t v, const int lane) - A32: VMOV.F32 Sd, Sm - A64: INS Vd.S[lane], Vn.S[0] - - - - - - - - uint16x8_t vsetq_lane_u16 (uint16_t a, uint16x8_t v, const int lane) - A32: VMOV.16 Dd[lane], Rt - A64: INS Vd.H[lane], Wn - - - - - - - - uint32x4_t vsetq_lane_u32 (uint32_t a, uint32x4_t v, const int lane) - A32: VMOV.32 Dd[lane], Rt - A64: INS Vd.S[lane], Wn - - - - - - - - uint64x2_t vsetq_lane_u64 (uint64_t a, uint64x2_t v, const int lane) - A32: VMOV.64 Dd, Rt, Rt2 - A64: INS Vd.D[lane], Xn - - - - - - - - uint8x8_t vset_lane_u8 (uint8_t a, uint8x8_t v, const int lane) - A32: VMOV.8 Dd[lane], Rt - A64: INS Vd.B[lane], Wn - - - - - - - - int16x4_t vset_lane_s16 (int16_t a, int16x4_t v, const int lane) - A32: VMOV.16 Dd[lane], Rt - A64: INS Vd.H[lane], Wn - - - - - - - - int32x2_t vset_lane_s32 (int32_t a, int32x2_t v, const int lane) - A32: VMOV.32 Dd[lane], Rt - A64: INS Vd.S[lane], Wn - - - - - - - - int8x8_t vset_lane_s8 (int8_t a, int8x8_t v, const int lane) - A32: VMOV.8 Dd[lane], Rt - A64: INS Vd.B[lane], Wn - - - - - - - - float32x2_t vset_lane_f32 (float32_t a, float32x2_t v, const int lane) - A32: VMOV.F32 Sd, Sm - A64: INS Vd.S[lane], Vn.S[0] - - - - - - - - uint16x4_t vset_lane_u16 (uint16_t a, uint16x4_t v, const int lane) - A32: VMOV.16 Dd[lane], Rt - A64: INS Vd.H[lane], Wn - - - - - - - - uint32x2_t vset_lane_u32 (uint32_t a, uint32x2_t v, const int lane) - A32: VMOV.32 Dd[lane], Rt - A64: INS Vd.S[lane], Wn - - - - - - - float64x2_t vcopyq_lane_f64 (float64x2_t a, const int lane1, float64x1_t b, const int lane2) A32: VMOV.F64 Dd, Dm A64: INS Vd.D[lane1], Vn.D[0] - - - - - - int64x2_t vcopyq_lane_s64 (int64x2_t a, const int lane1, int64x1_t b, const int lane2) A32: VMOV Dd, Dm A64: INS Vd.D[lane1], Vn.D[0] - - - - - - uint64x2_t vcopyq_lane_u64 (uint64x2_t a, const int lane1, uint64x1_t b, const int lane2) A32: VMOV Dd, Dm A64: INS Vd.D[lane1], Vn.D[0] - - - - - - - int16x8_t vclsq_s16 (int16x8_t a) - A32: VCLS.S16 Qd, Qm - A64: CLS Vd.8H, Vn.8H - - - - - - int32x4_t vclsq_s32 (int32x4_t a) - A32: VCLS.S32 Qd, Qm - A64: CLS Vd.4S, Vn.4S - - - - - - int8x16_t vclsq_s8 (int8x16_t a) - A32: VCLS.S8 Qd, Qm - A64: CLS Vd.16B, Vn.16B - - - - - - int16x4_t vcls_s16 (int16x4_t a) - A32: VCLS.S16 Dd, Dm - A64: CLS Vd.4H, Vn.4H - - - - - - int32x2_t vcls_s32 (int32x2_t a) - A32: VCLS.S32 Dd, Dm - A64: CLS Vd.2S, Vn.2S - - - - - - int8x8_t vcls_s8 (int8x8_t a) - A32: VCLS.S8 Dd, Dm - A64: CLS Vd.8B, Vn.8B - - - - - - uint8x16_t vclzq_u8 (uint8x16_t a) - A32: VCLZ.I8 Qd, Qm - A64: CLZ Vd.16B, Vn.16B - - - - - - int16x8_t vclzq_s16 (int16x8_t a) - A32: VCLZ.I16 Qd, Qm - A64: CLZ Vd.8H, Vn.8H - - - - - - int32x4_t vclzq_s32 (int32x4_t a) - A32: VCLZ.I32 Qd, Qm - A64: CLZ Vd.4S, Vn.4S - - - - - - int8x16_t vclzq_s8 (int8x16_t a) - A32: VCLZ.I8 Qd, Qm - A64: CLZ Vd.16B, Vn.16B - - - - - - uint16x8_t vclzq_u16 (uint16x8_t a) - A32: VCLZ.I16 Qd, Qm - A64: CLZ Vd.8H, Vn.8H - - - - - - uint32x4_t vclzq_u32 (uint32x4_t a) - A32: VCLZ.I32 Qd, Qm - A64: CLZ Vd.4S, Vn.4S - - - - - - uint8x8_t vclz_u8 (uint8x8_t a) - A32: VCLZ.I8 Dd, Dm - A64: CLZ Vd.8B, Vn.8B - - - - - - int16x4_t vclz_s16 (int16x4_t a) - A32: VCLZ.I16 Dd, Dm - A64: CLZ Vd.4H, Vn.4H - - - - - - int32x2_t vclz_s32 (int32x2_t a) - A32: VCLZ.I32 Dd, Dm - A64: CLZ Vd.2S, Vn.2S - - - - - - int8x8_t vclz_s8 (int8x8_t a) - A32: VCLZ.I8 Dd, Dm - A64: CLZ Vd.8B, Vn.8B - - - - - - uint16x4_t vclz_u16 (uint16x4_t a) - A32: VCLZ.I16 Dd, Dm - A64: CLZ Vd.4H, Vn.4H - - - - - - uint32x2_t vclz_u32 (uint32x2_t a) - A32: VCLZ.I32 Dd, Dm - A64: CLZ Vd.2S, Vn.2S - - - - - - uint8x16_t vld1q_lane_u8 (uint8_t const * ptr, uint8x16_t src, const int lane) - A32: VLD1.8 { Dd[index] }, [Rn] - A64: LD1 { Vt.B }[index], [Xn] - - - - - - - - float64x2_t vld1q_lane_f64 (float64_t const * ptr, float64x2_t src, const int lane) - A32: VLDR.64 Dd, [Rn] - A64: LD1 { Vt.D }[index], [Xn] - - - - - - - - int16x8_t vld1q_lane_s16 (int16_t const * ptr, int16x8_t src, const int lane) - A32: VLD1.16 { Dd[index] }, [Rn] - A64: LD1 { Vt.H }[index], [Xn] - - - - - - - - int32x4_t vld1q_lane_s32 (int32_t const * ptr, int32x4_t src, const int lane) - A32: VLD1.32 { Dd[index] }, [Rn] - A64: LD1 { Vt.S }[index], [Xn] - - - - - - - - int64x2_t vld1q_lane_s64 (int64_t const * ptr, int64x2_t src, const int lane) - A32: VLDR.64 Dd, [Rn] - A64: LD1 { Vt.D }[index], [Xn] - - - - - - - - int8x16_t vld1q_lane_s8 (int8_t const * ptr, int8x16_t src, const int lane) - A32: VLD1.8 { Dd[index] }, [Rn] - A64: LD1 { Vt.B }[index], [Xn] - - - - - - - - float32x4_t vld1q_lane_f32 (float32_t const * ptr, float32x4_t src, const int lane) - A32: VLD1.32 { Dd[index] }, [Rn] - A64: LD1 { Vt.S }[index], [Xn] - - - - - - - - uint16x8_t vld1q_lane_u16 (uint16_t const * ptr, uint16x8_t src, const int lane) - A32: VLD1.16 { Dd[index] }, [Rn] - A64: LD1 { Vt.H }[index], [Xn] - - - - - - - - uint32x4_t vld1q_lane_u32 (uint32_t const * ptr, uint32x4_t src, const int lane) - A32: VLD1.32 { Dd[index] }, [Rn] - A64: LD1 { Vt.S }[index], [Xn] - - - - - - - - uint64x2_t vld1q_lane_u64 (uint64_t const * ptr, uint64x2_t src, const int lane) - A32: VLDR.64 Dd, [Rn] - A64: LD1 { Vt.D }[index], [Xn] - - - - - - - - uint8x8_t vld1_lane_u8 (uint8_t const * ptr, uint8x8_t src, const int lane) - A32: VLD1.8 { Dd[index] }, [Rn] - A64: LD1 { Vt.B }[index], [Xn] - - - - - - - - int16x4_t vld1_lane_s16 (int16_t const * ptr, int16x4_t src, const int lane) - A32: VLD1.16 { Dd[index] }, [Rn] - A64: LD1 { Vt.H }[index], [Xn] - - - - - - - - int32x2_t vld1_lane_s32 (int32_t const * ptr, int32x2_t src, const int lane) - A32: VLD1.32 { Dd[index] }, [Rn] - A64: LD1 { Vt.S }[index], [Xn] - - - - - - - - int8x8_t vld1_lane_s8 (int8_t const * ptr, int8x8_t src, const int lane) - A32: VLD1.8 { Dd[index] }, [Rn] - A64: LD1 { Vt.B }[index], [Xn] - - - - - - - - float32x2_t vld1_lane_f32 (float32_t const * ptr, float32x2_t src, const int lane) - A32: VLD1.32 { Dd[index] }, [Rn] - A64: LD1 { Vt.S }[index], [Xn] - - - - - - - - uint16x4_t vld1_lane_u16 (uint16_t const * ptr, uint16x4_t src, const int lane) - A32: VLD1.16 { Dd[index] }, [Rn] - A64: LD1 { Vt.H }[index], [Xn] - - - - - - - - uint32x2_t vld1_lane_u32 (uint32_t const * ptr, uint32x2_t src, const int lane) - A32: VLD1.32 { Dd[index] }, [Rn] - A64: LD1 { Vt.S }[index], [Xn] - - - - - - - - uint8x16_t vld1q_dup_u8 (uint8_t const * ptr) - A32: VLD1.8 { Dd[], Dd+1[] }, [Rn] - A64: LD1R { Vt.16B }, [Xn] - - - - - - int16x8_t vld1q_dup_s16 (int16_t const * ptr) - A32: VLD1.16 { Dd[], Dd+1[] }, [Rn] - A64: LD1R { Vt.8H }, [Xn] - - - - - - int32x4_t vld1q_dup_s32 (int32_t const * ptr) - A32: VLD1.32 { Dd[], Dd+1[] }, [Rn] - A64: LD1R { Vt.4S }, [Xn] - - - - - - int8x16_t vld1q_dup_s8 (int8_t const * ptr) - A32: VLD1.8 { Dd[], Dd+1[] }, [Rn] - A64: LD1R { Vt.16B }, [Xn] - - - - - - float32x4_t vld1q_dup_f32 (float32_t const * ptr) - A32: VLD1.32 { Dd[], Dd+1[] }, [Rn] - A64: LD1R { Vt.4S }, [Xn] - - - - - - uint16x8_t vld1q_dup_u16 (uint16_t const * ptr) - A32: VLD1.16 { Dd[], Dd+1[] }, [Rn] - A64: LD1R { Vt.8H }, [Xn] - - - - - - uint32x4_t vld1q_dup_u32 (uint32_t const * ptr) - A32: VLD1.32 { Dd[], Dd+1[] }, [Rn] - A64: LD1R { Vt.4S }, [Xn] - - - - - - uint8x8_t vld1_dup_u8 (uint8_t const * ptr) - A32: VLD1.8 { Dd[] }, [Rn] - A64: LD1R { Vt.8B }, [Xn] - - - - - - int16x4_t vld1_dup_s16 (int16_t const * ptr) - A32: VLD1.16 { Dd[] }, [Rn] - A64: LD1R { Vt.4H }, [Xn] - - - - - - int32x2_t vld1_dup_s32 (int32_t const * ptr) - A32: VLD1.32 { Dd[] }, [Rn] - A64: LD1R { Vt.2S }, [Xn] - - - - - - int8x8_t vld1_dup_s8 (int8_t const * ptr) - A32: VLD1.8 { Dd[] }, [Rn] - A64: LD1R { Vt.8B }, [Xn] - - - - - - float32x2_t vld1_dup_f32 (float32_t const * ptr) - A32: VLD1.32 { Dd[] }, [Rn] - A64: LD1R { Vt.2S }, [Xn] - - - - - - uint16x4_t vld1_dup_u16 (uint16_t const * ptr) - A32: VLD1.16 { Dd[] }, [Rn] - A64: LD1R { Vt.4H }, [Xn] - - - - - - uint32x2_t vld1_dup_u32 (uint32_t const * ptr) - A32: VLD1.32 { Dd[] }, [Rn] - A64: LD1R { Vt.2S }, [Xn] - - - - - - uint8x16_t vld1q_u8 (uint8_t const * ptr) - A32: VLD1.8 Dd, Dd+1, [Rn] - A64: LD1 Vt.16B, [Xn] - - - - - - float64x2_t vld1q_f64 (float64_t const * ptr) - A32: VLD1.64 Dd, Dd+1, [Rn] - A64: LD1 Vt.2D, [Xn] - - - - - - int16x8_t vld1q_s16 (int16_t const * ptr) - A32: VLD1.16 Dd, Dd+1, [Rn] - A64: LD1 Vt.8H, [Xn] - - - - - - int32x4_t vld1q_s32 (int32_t const * ptr) - A32: VLD1.32 Dd, Dd+1, [Rn] - A64: LD1 Vt.4S, [Xn] - - - - - - int64x2_t vld1q_s64 (int64_t const * ptr) - A32: VLD1.64 Dd, Dd+1, [Rn] - A64: LD1 Vt.2D, [Xn] - - - - - - int8x16_t vld1q_s8 (int8_t const * ptr) - A32: VLD1.8 Dd, Dd+1, [Rn] - A64: LD1 Vt.16B, [Xn] - - - - - - float32x4_t vld1q_f32 (float32_t const * ptr) - A32: VLD1.32 Dd, Dd+1, [Rn] - A64: LD1 Vt.4S, [Xn] - - - - - - uint16x8_t vld1q_s16 (uint16_t const * ptr) - A32: VLD1.16 Dd, Dd+1, [Rn] - A64: LD1 Vt.8H, [Xn] - - - - - - uint32x4_t vld1q_s32 (uint32_t const * ptr) - A32: VLD1.32 Dd, Dd+1, [Rn] - A64: LD1 Vt.4S, [Xn] - - - - - - uint64x2_t vld1q_u64 (uint64_t const * ptr) - A32: VLD1.64 Dd, Dd+1, [Rn] - A64: LD1 Vt.2D, [Xn] - - - - - - uint8x8_t vld1_u8 (uint8_t const * ptr) - A32: VLD1.8 Dd, [Rn] - A64: LD1 Vt.8B, [Xn] - - - - - - float64x1_t vld1_f64 (float64_t const * ptr) - A32: VLD1.64 Dd, [Rn] - A64: LD1 Vt.1D, [Xn] - - - - - - int16x4_t vld1_s16 (int16_t const * ptr) - A32: VLD1.16 Dd, [Rn] - A64: LD1 Vt.4H, [Xn] - - - - - - int32x2_t vld1_s32 (int32_t const * ptr) - A32: VLD1.32 Dd, [Rn] - A64: LD1 Vt.2S, [Xn] - - - - - - int64x1_t vld1_s64 (int64_t const * ptr) - A32: VLD1.64 Dd, [Rn] - A64: LD1 Vt.1D, [Xn] - - - - - - int8x8_t vld1_s8 (int8_t const * ptr) - A32: VLD1.8 Dd, [Rn] - A64: LD1 Vt.8B, [Xn] - - - - - - float32x2_t vld1_f32 (float32_t const * ptr) - A32: VLD1.32 Dd, [Rn] - A64: LD1 Vt.2S, [Xn] - - - - - - uint16x4_t vld1_u16 (uint16_t const * ptr) - A32: VLD1.16 Dd, [Rn] - A64: LD1 Vt.4H, [Xn] - - - - - - uint32x2_t vld1_u32 (uint32_t const * ptr) - A32: VLD1.32 Dd, [Rn] - A64: LD1 Vt.2S, [Xn] - - - - - - uint64x1_t vld1_u64 (uint64_t const * ptr) - A32: VLD1.64 Dd, [Rn] - A64: LD1 Vt.1D, [Xn] - - - - - - uint8x16_t vmaxq_u8 (uint8x16_t a, uint8x16_t b) - A32: VMAX.U8 Qd, Qn, Qm - A64: UMAX Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vmaxq_s16 (int16x8_t a, int16x8_t b) - A32: VMAX.S16 Qd, Qn, Qm - A64: SMAX Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vmaxq_s32 (int32x4_t a, int32x4_t b) - A32: VMAX.S32 Qd, Qn, Qm - A64: SMAX Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vmaxq_s8 (int8x16_t a, int8x16_t b) - A32: VMAX.S8 Qd, Qn, Qm - A64: SMAX Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vmaxq_f32 (float32x4_t a, float32x4_t b) - A32: VMAX.F32 Qd, Qn, Qm - A64: FMAX Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vmaxq_u16 (uint16x8_t a, uint16x8_t b) - A32: VMAX.U16 Qd, Qn, Qm - A64: UMAX Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vmaxq_u32 (uint32x4_t a, uint32x4_t b) - A32: VMAX.U32 Qd, Qn, Qm - A64: UMAX Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vmax_u8 (uint8x8_t a, uint8x8_t b) - A32: VMAX.U8 Dd, Dn, Dm - A64: UMAX Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vmax_s16 (int16x4_t a, int16x4_t b) - A32: VMAX.S16 Dd, Dn, Dm - A64: SMAX Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vmax_s32 (int32x2_t a, int32x2_t b) - A32: VMAX.S32 Dd, Dn, Dm - A64: SMAX Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vmax_s8 (int8x8_t a, int8x8_t b) - A32: VMAX.S8 Dd, Dn, Dm - A64: SMAX Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vmax_f32 (float32x2_t a, float32x2_t b) - A32: VMAX.F32 Dd, Dn, Dm - A64: FMAX Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vmax_u16 (uint16x4_t a, uint16x4_t b) - A32: VMAX.U16 Dd, Dn, Dm - A64: UMAX Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vmax_u32 (uint32x2_t a, uint32x2_t b) - A32: VMAX.U32 Dd, Dn, Dm - A64: UMAX Vd.2S, Vn.2S, Vm.2S - - - - - - - float32x4_t vmaxnmq_f32 (float32x4_t a, float32x4_t b) - A32: VMAXNM.F32 Qd, Qn, Qm - A64: FMAXNM Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vmaxnm_f32 (float32x2_t a, float32x2_t b) - A32: VMAXNM.F32 Dd, Dn, Dm - A64: FMAXNM Vd.2S, Vn.2S, Vm.2S - - - - - - - float64x1_t vmaxnm_f64 (float64x1_t a, float64x1_t b) - A32: VMAXNM.F64 Dd, Dn, Dm - A64: FMAXNM Dd, Dn, Dm - - - - - - - float32_t vmaxnms_f32 (float32_t a, float32_t b) - A32: VMAXNM.F32 Sd, Sn, Sm - A64: FMAXNM Sd, Sn, Sm - - - - - - - uint8x8_t vpmax_u8 (uint8x8_t a, uint8x8_t b) - A32: VPMAX.U8 Dd, Dn, Dm - A64: UMAXP Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vpmax_s16 (int16x4_t a, int16x4_t b) - A32: VPMAX.S16 Dd, Dn, Dm - A64: SMAXP Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vpmax_s32 (int32x2_t a, int32x2_t b) - A32: VPMAX.S32 Dd, Dn, Dm - A64: SMAXP Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vpmax_s8 (int8x8_t a, int8x8_t b) - A32: VPMAX.S8 Dd, Dn, Dm - A64: SMAXP Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vpmax_f32 (float32x2_t a, float32x2_t b) - A32: VPMAX.F32 Dd, Dn, Dm - A64: FMAXP Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vpmax_u16 (uint16x4_t a, uint16x4_t b) - A32: VPMAX.U16 Dd, Dn, Dm - A64: UMAXP Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vpmax_u32 (uint32x2_t a, uint32x2_t b) - A32: VPMAX.U32 Dd, Dn, Dm - A64: UMAXP Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vminq_u8 (uint8x16_t a, uint8x16_t b) - A32: VMIN.U8 Qd, Qn, Qm - A64: UMIN Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vminq_s16 (int16x8_t a, int16x8_t b) - A32: VMIN.S16 Qd, Qn, Qm - A64: SMIN Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vminq_s32 (int32x4_t a, int32x4_t b) - A32: VMIN.S32 Qd, Qn, Qm - A64: SMIN Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vminq_s8 (int8x16_t a, int8x16_t b) - A32: VMIN.S8 Qd, Qn, Qm - A64: SMIN Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vminq_f32 (float32x4_t a, float32x4_t b) - A32: VMIN.F32 Qd, Qn, Qm - A64: FMIN Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vminq_u16 (uint16x8_t a, uint16x8_t b) - A32: VMIN.U16 Qd, Qn, Qm - A64: UMIN Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vminq_u32 (uint32x4_t a, uint32x4_t b) - A32: VMIN.U32 Qd, Qn, Qm - A64: UMIN Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vmin_u8 (uint8x8_t a, uint8x8_t b) - A32: VMIN.U8 Dd, Dn, Dm - A64: UMIN Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vmin_s16 (int16x4_t a, int16x4_t b) - A32: VMIN.S16 Dd, Dn, Dm - A64: SMIN Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vmin_s32 (int32x2_t a, int32x2_t b) - A32: VMIN.S32 Dd, Dn, Dm - A64: SMIN Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vmin_s8 (int8x8_t a, int8x8_t b) - A32: VMIN.S8 Dd, Dn, Dm - A64: SMIN Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vmin_f32 (float32x2_t a, float32x2_t b) - A32: VMIN.F32 Dd, Dn, Dm - A64: FMIN Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vmin_u16 (uint16x4_t a, uint16x4_t b) - A32: VMIN.U16 Dd, Dn, Dm - A64: UMIN Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vmin_u32 (uint32x2_t a, uint32x2_t b) - A32: VMIN.U32 Dd, Dn, Dm - A64: UMIN Vd.2S, Vn.2S, Vm.2S - - - - - - - float32x4_t vminnmq_f32 (float32x4_t a, float32x4_t b) - A32: VMINNM.F32 Qd, Qn, Qm - A64: FMINNM Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vminnm_f32 (float32x2_t a, float32x2_t b) - A32: VMINNM.F32 Dd, Dn, Dm - A64: FMINNM Vd.2S, Vn.2S, Vm.2S - - - - - - - float64x1_t vminnm_f64 (float64x1_t a, float64x1_t b) - A32: VMINNM.F64 Dd, Dn, Dm - A64: FMINNM Dd, Dn, Dm - - - - - - - float32_t vminnms_f32 (float32_t a, float32_t b) - A32: VMINNM.F32 Sd, Sn, Sm - A64: FMINNM Sd, Sn, Sm - - - - - - - uint8x8_t vpmin_u8 (uint8x8_t a, uint8x8_t b) - A32: VPMIN.U8 Dd, Dn, Dm - A64: UMINP Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vpmin_s16 (int16x4_t a, int16x4_t b) - A32: VPMIN.S16 Dd, Dn, Dm - A64: SMINP Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vpmin_s32 (int32x2_t a, int32x2_t b) - A32: VPMIN.S32 Dd, Dn, Dm - A64: SMINP Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vpmin_s8 (int8x8_t a, int8x8_t b) - A32: VPMIN.S8 Dd, Dn, Dm - A64: SMINP Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vpmin_f32 (float32x2_t a, float32x2_t b) - A32: VPMIN.F32 Dd, Dn, Dm - A64: FMINP Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vpmin_u16 (uint16x4_t a, uint16x4_t b) - A32: VPMIN.U16 Dd, Dn, Dm - A64: UMINP Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vpmin_u32 (uint32x2_t a, uint32x2_t b) - A32: VPMIN.U32 Dd, Dn, Dm - A64: UMINP Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vmulq_u8 (uint8x16_t a, uint8x16_t b) - A32: VMUL.I8 Qd, Qn, Qm - A64: MUL Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vmulq_s16 (int16x8_t a, int16x8_t b) - A32: VMUL.I16 Qd, Qn, Qm - A64: MUL Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vmulq_s32 (int32x4_t a, int32x4_t b) - A32: VMUL.I32 Qd, Qn, Qm - A64: MUL Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vmulq_s8 (int8x16_t a, int8x16_t b) - A32: VMUL.I8 Qd, Qn, Qm - A64: MUL Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vmulq_f32 (float32x4_t a, float32x4_t b) - A32: VMUL.F32 Qd, Qn, Qm - A64: FMUL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vmulq_u16 (uint16x8_t a, uint16x8_t b) - A32: VMUL.I16 Qd, Qn, Qm - A64: MUL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vmulq_u32 (uint32x4_t a, uint32x4_t b) - A32: VMUL.I32 Qd, Qn, Qm - A64: MUL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint8x8_t vmul_u8 (uint8x8_t a, uint8x8_t b) - A32: VMUL.I8 Dd, Dn, Dm - A64: MUL Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vmul_s16 (int16x4_t a, int16x4_t b) - A32: VMUL.I16 Dd, Dn, Dm - A64: MUL Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vmul_s32 (int32x2_t a, int32x2_t b) - A32: VMUL.I32 Dd, Dn, Dm - A64: MUL Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vmul_s8 (int8x8_t a, int8x8_t b) - A32: VMUL.I8 Dd, Dn, Dm - A64: MUL Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vmul_f32 (float32x2_t a, float32x2_t b) - A32: VMUL.F32 Dd, Dn, Dm - A64: FMUL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vmul_u16 (uint16x4_t a, uint16x4_t b) - A32: VMUL.I16 Dd, Dn, Dm - A64: MUL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vmul_u32 (uint32x2_t a, uint32x2_t b) - A32: VMUL.I32 Dd, Dn, Dm - A64: MUL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vmlaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) - A32: VMLA.I8 Qd, Qn, Qm - A64: MLA Vd.16B, Vn.16B, Vm.16B - - - - - - - - int16x8_t vmlaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) - A32: VMLA.I16 Qd, Qn, Qm - A64: MLA Vd.8H, Vn.8H, Vm.8H - - - - - - - - int32x4_t vmlaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) - A32: VMLA.I32 Qd, Qn, Qm - A64: MLA Vd.4S, Vn.4S, Vm.4S - - - - - - - - int8x16_t vmlaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) - A32: VMLA.I8 Qd, Qn, Qm - A64: MLA Vd.16B, Vn.16B, Vm.16B - - - - - - - - uint16x8_t vmlaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) - A32: VMLA.I16 Qd, Qn, Qm - A64: MLA Vd.8H, Vn.8H, Vm.8H - - - - - - - - uint32x4_t vmlaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) - A32: VMLA.I32 Qd, Qn, Qm - A64: MLA Vd.4S, Vn.4S, Vm.4S - - - - - - - - uint8x8_t vmla_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) - A32: VMLA.I8 Dd, Dn, Dm - A64: MLA Vd.8B, Vn.8B, Vm.8B - - - - - - - - int16x4_t vmla_s16 (int16x4_t a, int16x4_t b, int16x4_t c) - A32: VMLA.I16 Dd, Dn, Dm - A64: MLA Vd.4H, Vn.4H, Vm.4H - - - - - - - - int32x2_t vmla_s32 (int32x2_t a, int32x2_t b, int32x2_t c) - A32: VMLA.I32 Dd, Dn, Dm - A64: MLA Vd.2S, Vn.2S, Vm.2S - - - - - - - - int8x8_t vmla_s8 (int8x8_t a, int8x8_t b, int8x8_t c) - A32: VMLA.I8 Dd, Dn, Dm - A64: MLA Vd.8B, Vn.8B, Vm.8B - - - - - - - - uint16x4_t vmla_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) - A32: VMLA.I16 Dd, Dn, Dm - A64: MLA Vd.4H, Vn.4H, Vm.4H - - - - - - - - uint32x2_t vmla_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) - A32: VMLA.I32 Dd, Dn, Dm - A64: MLA Vd.2S, Vn.2S, Vm.2S - - - - - - - - int16x8_t vmlaq_n_s16 (int16x8_t a, int16x8_t b, int16_t c) - A32: VMLA.I16 Qd, Qn, Dm[0] - A64: MLA Vd.8H, Vn.8H, Vm.H[0] - - - - - - - - int32x4_t vmlaq_n_s32 (int32x4_t a, int32x4_t b, int32_t c) - A32: VMLA.I32 Qd, Qn, Dm[0] - A64: MLA Vd.4S, Vn.4S, Vm.S[0] - - - - - - - - uint16x8_t vmlaq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c) - A32: VMLA.I16 Qd, Qn, Dm[0] - A64: MLA Vd.8H, Vn.8H, Vm.H[0] - - - - - - - - uint32x4_t vmlaq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c) - A32: VMLA.I32 Qd, Qn, Dm[0] - A64: MLA Vd.4S, Vn.4S, Vm.S[0] - - - - - - - - int16x4_t vmla_n_s16 (int16x4_t a, int16x4_t b, int16_t c) - A32: VMLA.I16 Dd, Dn, Dm[0] - A64: MLA Vd.4H, Vn.4H, Vm.H[0] - - - - - - - - int32x2_t vmla_n_s32 (int32x2_t a, int32x2_t b, int32_t c) - A32: VMLA.I32 Dd, Dn, Dm[0] - A64: MLA Vd.2S, Vn.2S, Vm.S[0] - - - - - - - - uint16x4_t vmla_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c) - A32: VMLA.I16 Dd, Dn, Dm[0] - A64: MLA Vd.4H, Vn.4H, Vm.H[0] - - - - - - - - uint32x2_t vmla_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c) - A32: VMLA.I32 Dd, Dn, Dm[0] - A64: MLA Vd.2S, Vn.2S, Vm.S[0] - - - - - - - - int16x8_t vmlaq_laneq_s16 (int16x8_t a, int16x8_t b, int16x8_t v, const int lane) - A32: VMLA.I16 Qd, Qn, Dm[lane] - A64: MLA Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - int16x8_t vmlaq_lane_s16 (int16x8_t a, int16x8_t b, int16x4_t v, const int lane) - A32: VMLA.I16 Qd, Qn, Dm[lane] - A64: MLA Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - int32x4_t vmlaq_laneq_s32 (int32x4_t a, int32x4_t b, int32x4_t v, const int lane) - A32: VMLA.I32 Qd, Qn, Dm[lane] - A64: MLA Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - int32x4_t vmlaq_lane_s32 (int32x4_t a, int32x4_t b, int32x2_t v, const int lane) - A32: VMLA.I32 Qd, Qn, Dm[lane] - A64: MLA Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - uint16x8_t vmlaq_laneq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane) - A32: VMLA.I16 Qd, Qn, Dm[lane] - A64: MLA Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - uint16x8_t vmlaq_lane_u16 (uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane) - A32: VMLA.I16 Qd, Qn, Dm[lane] - A64: MLA Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - uint32x4_t vmlaq_laneq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane) - A32: VMLA.I32 Qd, Qn, Dm[lane] - A64: MLA Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - uint32x4_t vmlaq_lane_u32 (uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane) - A32: VMLA.I32 Qd, Qn, Dm[lane] - A64: MLA Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - int16x4_t vmla_laneq_s16 (int16x4_t a, int16x4_t b, int16x8_t v, const int lane) - A32: VMLA.I16 Dd, Dn, Dm[lane] - A64: MLA Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - int16x4_t vmla_lane_s16 (int16x4_t a, int16x4_t b, int16x4_t v, const int lane) - A32: VMLA.I16 Dd, Dn, Dm[lane] - A64: MLA Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - int32x2_t vmla_laneq_s32 (int32x2_t a, int32x2_t b, int32x4_t v, const int lane) - A32: VMLA.I32 Dd, Dn, Dm[lane] - A64: MLA Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - int32x2_t vmla_lane_s32 (int32x2_t a, int32x2_t b, int32x2_t v, const int lane) - A32: VMLA.I32 Dd, Dn, Dm[lane] - A64: MLA Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - uint16x4_t vmla_laneq_u16 (uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane) - A32: VMLA.I16 Dd, Dn, Dm[lane] - A64: MLA Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - uint16x4_t vmla_lane_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane) - A32: VMLA.I16 Dd, Dn, Dm[lane] - A64: MLA Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - uint32x2_t vmla_laneq_u32 (uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane) - A32: VMLA.I32 Dd, Dn, Dm[lane] - A64: MLA Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - uint32x2_t vmla_lane_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane) - A32: VMLA.I32 Dd, Dn, Dm[lane] - A64: MLA Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - int16x8_t vmulq_n_s16 (int16x8_t a, int16_t b) - A32: VMUL.I16 Qd, Qn, Dm[0] - A64: MUL Vd.8H, Vn.8H, Vm.H[0] - - - - - - - int32x4_t vmulq_n_s32 (int32x4_t a, int32_t b) - A32: VMUL.I32 Qd, Qn, Dm[0] - A64: MUL Vd.4S, Vn.4S, Vm.S[0] - - - - - - - float32x4_t vmulq_n_f32 (float32x4_t a, float32_t b) - A32: VMUL.F32 Qd, Qn, Dm[0] - A64: FMUL Vd.4S, Vn.4S, Vm.S[0] - - - - - - - uint16x8_t vmulq_n_u16 (uint16x8_t a, uint16_t b) - A32: VMUL.I16 Qd, Qn, Dm[0] - A64: MUL Vd.8H, Vn.8H, Vm.H[0] - - - - - - - uint32x4_t vmulq_n_u32 (uint32x4_t a, uint32_t b) - A32: VMUL.I32 Qd, Qn, Dm[0] - A64: MUL Vd.4S, Vn.4S, Vm.S[0] - - - - - - - int16x4_t vmul_n_s16 (int16x4_t a, int16_t b) - A32: VMUL.I16 Dd, Dn, Dm[0] - A64: MUL Vd.4H, Vn.4H, Vm.H[0] - - - - - - - int32x2_t vmul_n_s32 (int32x2_t a, int32_t b) - A32: VMUL.I32 Dd, Dn, Dm[0] - A64: MUL Vd.2S, Vn.2S, Vm.S[0] - - - - - - - float32x2_t vmul_n_f32 (float32x2_t a, float32_t b) - A32: VMUL.F32 Dd, Dn, Dm[0] - A64: FMUL Vd.2S, Vn.2S, Vm.S[0] - - - - - - - uint16x4_t vmul_n_u16 (uint16x4_t a, uint16_t b) - A32: VMUL.I16 Dd, Dn, Dm[0] - A64: MUL Vd.4H, Vn.4H, Vm.H[0] - - - - - - - uint32x2_t vmul_n_u32 (uint32x2_t a, uint32_t b) - A32: VMUL.I32 Dd, Dn, Dm[0] - A64: MUL Vd.2S, Vn.2S, Vm.S[0] - - - - - - - int16x8_t vmulq_laneq_s16 (int16x8_t a, int16x8_t v, const int lane) - A32: VMUL.I16 Qd, Qn, Dm[lane] - A64: MUL Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - int16x8_t vmulq_lane_s16 (int16x8_t a, int16x4_t v, const int lane) - A32: VMUL.I16 Qd, Qn, Dm[lane] - A64: MUL Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - int32x4_t vmulq_laneq_s32 (int32x4_t a, int32x4_t v, const int lane) - A32: VMUL.I32 Qd, Qn, Dm[lane] - A64: MUL Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - int32x4_t vmulq_lane_s32 (int32x4_t a, int32x2_t v, const int lane) - A32: VMUL.I32 Qd, Qn, Dm[lane] - A64: MUL Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - float32x4_t vmulq_laneq_f32 (float32x4_t a, float32x4_t v, const int lane) - A32: VMUL.F32 Qd, Qn, Dm[lane] - A64: FMUL Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - float32x4_t vmulq_lane_f32 (float32x4_t a, float32x2_t v, const int lane) - A32: VMUL.F32 Qd, Qn, Dm[lane] - A64: FMUL Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - uint16x8_t vmulq_laneq_u16 (uint16x8_t a, uint16x8_t v, const int lane) - A32: VMUL.I16 Qd, Qn, Dm[lane] - A64: MUL Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - uint16x8_t vmulq_lane_u16 (uint16x8_t a, uint16x4_t v, const int lane) - A32: VMUL.I16 Qd, Qn, Dm[lane] - A64: MUL Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - uint32x4_t vmulq_laneq_u32 (uint32x4_t a, uint32x4_t v, const int lane) - A32: VMUL.I32 Qd, Qn, Dm[lane] - A64: MUL Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - uint32x4_t vmulq_lane_u32 (uint32x4_t a, uint32x2_t v, const int lane) - A32: VMUL.I32 Qd, Qn, Dm[lane] - A64: MUL Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - int16x4_t vmul_laneq_s16 (int16x4_t a, int16x8_t v, const int lane) - A32: VMUL.I16 Dd, Dn, Dm[lane] - A64: MUL Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - int16x4_t vmul_lane_s16 (int16x4_t a, int16x4_t v, const int lane) - A32: VMUL.I16 Dd, Dn, Dm[lane] - A64: MUL Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - int32x2_t vmul_laneq_s32 (int32x2_t a, int32x4_t v, const int lane) - A32: VMUL.I32 Dd, Dn, Dm[lane] - A64: MUL Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - int32x2_t vmul_lane_s32 (int32x2_t a, int32x2_t v, const int lane) - A32: VMUL.I32 Dd, Dn, Dm[lane] - A64: MUL Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - float32x2_t vmul_laneq_f32 (float32x2_t a, float32x4_t v, const int lane) - A32: VMUL.F32 Dd, Dn, Dm[lane] - A64: FMUL Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - float32x2_t vmul_lane_f32 (float32x2_t a, float32x2_t v, const int lane) - A32: VMUL.F32 Dd, Dn, Dm[lane] - A64: FMUL Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - uint16x4_t vmul_laneq_u16 (uint16x4_t a, uint16x8_t v, const int lane) - A32: VMUL.I16 Dd, Dn, Dm[lane] - A64: MUL Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - uint16x4_t vmul_lane_u16 (uint16x4_t a, uint16x4_t v, const int lane) - A32: VMUL.I16 Dd, Dn, Dm[lane] - A64: MUL Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - uint32x2_t vmul_laneq_u32 (uint32x2_t a, uint32x4_t v, const int lane) - A32: VMUL.I32 Dd, Dn, Dm[lane] - A64: MUL Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - uint32x2_t vmul_lane_u32 (uint32x2_t a, uint32x2_t v, const int lane) - A32: VMUL.I32 Dd, Dn, Dm[lane] - A64: MUL Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - int32x4_t vmull_laneq_s16 (int16x4_t a, int16x8_t v, const int lane) - A32: VMULL.S16 Qd, Dn, Dm[lane] - A64: SMULL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - int32x4_t vmull_lane_s16 (int16x4_t a, int16x4_t v, const int lane) - A32: VMULL.S16 Qd, Dn, Dm[lane] - A64: SMULL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - int64x2_t vmull_laneq_s32 (int32x2_t a, int32x4_t v, const int lane) - A32: VMULL.S32 Qd, Dn, Dm[lane] - A64: SMULL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - int64x2_t vmull_lane_s32 (int32x2_t a, int32x2_t v, const int lane) - A32: VMULL.S32 Qd, Dn, Dm[lane] - A64: SMULL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - uint32x4_t vmull_laneq_u16 (uint16x4_t a, uint16x8_t v, const int lane) - A32: VMULL.U16 Qd, Dn, Dm[lane] - A64: UMULL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - uint32x4_t vmull_lane_u16 (uint16x4_t a, uint16x4_t v, const int lane) - A32: VMULL.U16 Qd, Dn, Dm[lane] - A64: UMULL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - uint64x2_t vmull_laneq_u32 (uint32x2_t a, uint32x4_t v, const int lane) - A32: VMULL.U32 Qd, Dn, Dm[lane] - A64: UMULL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - uint64x2_t vmull_lane_u32 (uint32x2_t a, uint32x2_t v, const int lane) - A32: VMULL.U32 Qd, Dn, Dm[lane] - A64: UMULL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - int32x4_t vmlal_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t v, const int lane) - A32: VMLAL.S16 Qd, Dn, Dm[lane] - A64: SMLAL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - int32x4_t vmlal_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t v, const int lane) - A32: VMLAL.S16 Qd, Dn, Dm[lane] - A64: SMLAL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - int64x2_t vmlal_laneq_s32 (int64x2_t a, int32x2_t b, int32x4_t v, const int lane) - A32: VMLAL.S32 Qd, Dn, Dm[lane] - A64: SMLAL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - int64x2_t vmlal_lane_s32 (int64x2_t a, int32x2_t b, int32x2_t v, const int lane) - A32: VMLAL.S32 Qd, Dn, Dm[lane] - A64: SMLAL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - uint32x4_t vmlal_laneq_u16 (uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane) - A32: VMLAL.U16 Qd, Dn, Dm[lane] - A64: UMLAL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - uint32x4_t vmlal_lane_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane) - A32: VMLAL.U16 Qd, Dn, Dm[lane] - A64: UMLAL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - uint64x2_t vmlal_laneq_u32 (uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane) - A32: VMLAL.U32 Qd, Dn, Dm[lane] - A64: UMLAL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - uint64x2_t vmlal_lane_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane) - A32: VMLAL.U32 Qd, Dn, Dm[lane] - A64: UMLAL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - int32x4_t vmlsl_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t v, const int lane) - A32: VMLSL.S16 Qd, Dn, Dm[lane] - A64: SMLSL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - int32x4_t vmlsl_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t v, const int lane) - A32: VMLSL.S16 Qd, Dn, Dm[lane] - A64: SMLSL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - int64x2_t vmlsl_laneq_s32 (int64x2_t a, int32x2_t b, int32x4_t v, const int lane) - A32: VMLSL.S32 Qd, Dn, Dm[lane] - A64: SMLSL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - int64x2_t vmlsl_lane_s32 (int64x2_t a, int32x2_t b, int32x2_t v, const int lane) - A32: VMLSL.S32 Qd, Dn, Dm[lane] - A64: SMLSL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - uint32x4_t vmlsl_laneq_u16 (uint32x4_t a, uint16x4_t b, uint16x8_t v, const int lane) - A32: VMLSL.U16 Qd, Dn, Dm[lane] - A64: UMLSL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - uint32x4_t vmlsl_lane_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane) - A32: VMLSL.U16 Qd, Dn, Dm[lane] - A64: UMLSL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - - - uint64x2_t vmlsl_laneq_u32 (uint64x2_t a, uint32x2_t b, uint32x4_t v, const int lane) - A32: VMLSL.U32 Qd, Dn, Dm[lane] - A64: UMLSL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - uint64x2_t vmlsl_lane_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t v, const int lane) - A32: VMLSL.U32 Qd, Dn, Dm[lane] - A64: UMLSL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - - - int32x4_t vmull_high_laneq_s16 (int16x8_t a, int16x8_t v, const int lane) - A32: VMULL.S16 Qd, Dn+1, Dm[lane] - A64: SMULL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - int32x4_t vmull_high_lane_s16 (int16x8_t a, int16x4_t v, const int lane) - A32: VMULL.S16 Qd, Dn+1, Dm[lane] - A64: SMULL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - int64x2_t vmull_high_laneq_s32 (int32x4_t a, int32x4_t v, const int lane) - A32: VMULL.S32 Qd, Dn+1, Dm[lane] - A64: SMULL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - int64x2_t vmull_high_lane_s32 (int32x4_t a, int32x2_t v, const int lane) - A32: VMULL.S32 Qd, Dn+1, Dm[lane] - A64: SMULL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - uint32x4_t vmull_high_laneq_u16 (uint16x8_t a, uint16x8_t v, const int lane) - A32: VMULL.U16 Qd, Dn+1, Dm[lane] - A64: UMULL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - uint32x4_t vmull_high_lane_u16 (uint16x8_t a, uint16x4_t v, const int lane) - A32: VMULL.U16 Qd, Dn+1, Dm[lane] - A64: UMULL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - uint64x2_t vmull_high_laneq_u32 (uint32x4_t a, uint32x4_t v, const int lane) - A32: VMULL.U32 Qd, Dn+1, Dm[lane] - A64: UMULL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - uint64x2_t vmull_high_lane_u32 (uint32x4_t a, uint32x2_t v, const int lane) - A32: VMULL.U32 Qd, Dn+1, Dm[lane] - A64: UMULL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - int32x4_t vmlal_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t v, const int lane) - A32: VMLAL.S16 Qd, Dn+1, Dm[lane] - A64: SMLAL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - int32x4_t vmlal_high_lane_s16 (int32x4_t a, int16x8_t b, int16x4_t v, const int lane) - A32: VMLAL.S16 Qd, Dn+1, Dm[lane] - A64: SMLAL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - int64x2_t vmlal_high_laneq_s32 (int64x2_t a, int32x4_t b, int32x4_t v, const int lane) - A32: VMLAL.S32 Qd, Dn+1, Dm[lane] - A64: SMLAL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - - int64x2_t vmlal_high_lane_s32 (int64x2_t a, int32x4_t b, int32x2_t v, const int lane) - A32: VMLAL.S32 Qd, Dn+1, Dm[lane] - A64: SMLAL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - - uint32x4_t vmlal_high_laneq_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane) - A32: VMLAL.U16 Qd, Dn+1, Dm[lane] - A64: UMLAL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - uint32x4_t vmlal_high_lane_u16 (uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane) - A32: VMLAL.U16 Qd, Dn+1, Dm[lane] - A64: UMLAL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - uint64x2_t vmlal_high_laneq_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane) - A32: VMLAL.U32 Qd, Dn+1, Dm[lane] - A64: UMLAL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - - uint64x2_t vmlal_high_lane_u32 (uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane) - A32: VMLAL.U32 Qd, Dn+1, Dm[lane] - A64: UMLAL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - - int32x4_t vmlsl_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t v, const int lane) - A32: VMLSL.S16 Qd, Dn+1, Dm[lane] - A64: SMLSL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - int32x4_t vmlsl_high_lane_s16 (int32x4_t a, int16x8_t b, int16x4_t v, const int lane) - A32: VMLSL.S16 Qd, Dn+1, Dm[lane] - A64: SMLSL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - int64x2_t vmlsl_high_laneq_s32 (int64x2_t a, int32x4_t b, int32x4_t v, const int lane) - A32: VMLSL.S32 Qd, Dn+1, Dm[lane] - A64: SMLSL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - - int64x2_t vmlsl_high_lane_s32 (int64x2_t a, int32x4_t b, int32x2_t v, const int lane) - A32: VMLSL.S32 Qd, Dn+1, Dm[lane] - A64: SMLSL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - - uint32x4_t vmlsl_high_laneq_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t v, const int lane) - A32: VMLSL.U16 Qd, Dn+1, Dm[lane] - A64: UMLSL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - uint32x4_t vmlsl_high_lane_u16 (uint32x4_t a, uint16x8_t b, uint16x4_t v, const int lane) - A32: VMLSL.U16 Qd, Dn+1, Dm[lane] - A64: UMLSL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - - - uint64x2_t vmlsl_high_laneq_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t v, const int lane) - A32: VMLSL.U32 Qd, Dn+1, Dm[lane] - A64: UMLSL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - - uint64x2_t vmlsl_high_lane_u32 (uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane) - A32: VMLSL.U32 Qd, Dn+1, Dm[lane] - A64: UMLSL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - - int16x8_t vqdmulhq_n_s16 (int16x8_t a, int16_t b) A32: VQDMULH.S16 Qd, Qn, Dm[0] A64: SQDMULH Vd.8H, Vn.8H, Vm.H[0] - - - - - int32x4_t vqdmulhq_n_s32 (int32x4_t a, int32_t b) A32: VQDMULH.S32 Qd, Qn, Dm[0] A64: SQDMULH Vd.4S, Vn.4S, Vm.S[0] - - - - - int16x4_t vqdmulh_n_s16 (int16x4_t a, int16_t b) A32: VQDMULH.S16 Dd, Dn, Dm[0] A64: SQDMULH Vd.4H, Vn.4H, Vm.H[0] - - - - - int32x2_t vqdmulh_n_s32 (int32x2_t a, int32_t b) A32: VQDMULH.S32 Dd, Dn, Dm[0] A64: SQDMULH Vd.2S, Vn.2S, Vm.S[0] - - - - - int16x8_t vqdmulhq_laneq_s16 (int16x8_t a, int16x8_t v, const int lane) A32: VQDMULH.S16 Qd, Qn, Dm[lane] A64: SQDMULH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - int16x8_t vqdmulhq_lane_s16 (int16x8_t a, int16x4_t v, const int lane) A32: VQDMULH.S16 Qd, Qn, Dm[lane] A64: SQDMULH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - int32x4_t vqdmulhq_laneq_s32 (int32x4_t a, int32x4_t v, const int lane) A32: VQDMULH.S32 Qd, Qn, Dm[lane] A64: SQDMULH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - int32x4_t vqdmulhq_lane_s32 (int32x4_t a, int32x2_t v, const int lane) A32: VQDMULH.S32 Qd, Qn, Dm[lane] A64: SQDMULH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - int16x4_t vqdmulh_laneq_s16 (int16x4_t a, int16x8_t v, const int lane) A32: VQDMULH.S16 Dd, Dn, Dm[lane] A64: SQDMULH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - int16x4_t vqdmulh_lane_s16 (int16x4_t a, int16x4_t v, const int lane) A32: VQDMULH.S16 Dd, Dn, Dm[lane] A64: SQDMULH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - int32x2_t vqdmulh_laneq_s32 (int32x2_t a, int32x4_t v, const int lane) A32: VQDMULH.S32 Dd, Dn, Dm[lane] A64: SQDMULH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - int32x2_t vqdmulh_lane_s32 (int32x2_t a, int32x2_t v, const int lane) A32: VQDMULH.S32 Dd, Dn, Dm[lane] A64: SQDMULH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - int16x8_t vqdmulhq_s16 (int16x8_t a, int16x8_t b) A32: VQDMULH.S16 Qd, Qn, Qm A64: SQDMULH Vd.8H, Vn.8H, Vm.8H - - - - - int32x4_t vqdmulhq_s32 (int32x4_t a, int32x4_t b) A32: VQDMULH.S32 Qd, Qn, Qm A64: SQDMULH Vd.4S, Vn.4S, Vm.4S - - - - - int16x4_t vqdmulh_s16 (int16x4_t a, int16x4_t b) A32: VQDMULH.S16 Dd, Dn, Dm A64: SQDMULH Vd.4H, Vn.4H, Vm.4H - - - - - int32x2_t vqdmulh_s32 (int32x2_t a, int32x2_t b) A32: VQDMULH.S32 Dd, Dn, Dm A64: SQDMULH Vd.2S, Vn.2S, Vm.2S - - - - - int32x4_t vqdmlal_s16 (int32x4_t a, int16x4_t b, int16x4_t c) A32: VQDMLAL.S16 Qd, Dn, Dm A64: SQDMLAL Vd.4S, Vn.4H, Vm.4H - - - - - - int64x2_t vqdmlal_s32 (int64x2_t a, int32x2_t b, int32x2_t c) A32: VQDMLAL.S32 Qd, Dn, Dm A64: SQDMLAL Vd.2D, Vn.2S, Vm.2S - - - - - - int32x4_t vqdmlsl_s16 (int32x4_t a, int16x4_t b, int16x4_t c) A32: VQDMLSL.S16 Qd, Dn, Dm A64: SQDMLSL Vd.4S, Vn.4H, Vm.4H - - - - - - int64x2_t vqdmlsl_s32 (int64x2_t a, int32x2_t b, int32x2_t c) A32: VQDMLSL.S32 Qd, Dn, Dm A64: SQDMLSL Vd.2D, Vn.2S, Vm.2S - - - - - - int32x4_t vqdmlal_n_s16 (int32x4_t a, int16x4_t b, int16_t c) A32: VQDMLAL.S16 Qd, Dn, Dm[0] A64: SQDMLAL Vd.4S, Vn.4H, Vm.H[0] - - - - - - int64x2_t vqdmlal_n_s32 (int64x2_t a, int32x2_t b, int32_t c) A32: VQDMLAL.S32 Qd, Dn, Dm[0] A64: SQDMLAL Vd.2D, Vn.2S, Vm.S[0] - - - - - - int32x4_t vqdmlsl_n_s16 (int32x4_t a, int16x4_t b, int16_t c) A32: VQDMLSL.S16 Qd, Dn, Dm[0] A64: SQDMLSL Vd.4S, Vn.4H, Vm.H[0] - - - - - - int64x2_t vqdmlsl_n_s32 (int64x2_t a, int32x2_t b, int32_t c) A32: VQDMLSL.S32 Qd, Dn, Dm[0] A64: SQDMLSL Vd.2D, Vn.2S, Vm.S[0] - - - - - - int32x4_t vqdmlal_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t v, const int lane) A32: VQDMLAL.S16 Qd, Dn, Dm[lane] A64: SQDMLAL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - int32x4_t vqdmlal_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t v, const int lane) A32: VQDMLAL.S16 Qd, Dn, Dm[lane] A64: SQDMLAL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - int64x2_t vqdmlal_laneq_s32 (int64x2_t a, int32x2_t b, int32x4_t v, const int lane) A32: VQDMLAL.S32 Qd, Dn, Dm[lane] A64: SQDMLAL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - int64x2_t vqdmlal_lane_s32 (int64x2_t a, int32x2_t b, int32x2_t v, const int lane) A32: VQDMLAL.S32 Qd, Dn, Dm[lane] A64: SQDMLAL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - int32x4_t vqdmlsl_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t v, const int lane) A32: VQDMLSL.S16 Qd, Dn, Dm[lane] A64: SQDMLSL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - int32x4_t vqdmlsl_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t v, const int lane) A32: VQDMLSL.S16 Qd, Dn, Dm[lane] A64: SQDMLSL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - - int64x2_t vqdmlsl_laneq_s32 (int64x2_t a, int32x2_t b, int32x4_t v, const int lane) A32: VQDMLSL.S32 Qd, Dn, Dm[lane] A64: SQDMLSL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - int64x2_t vqdmlsl_lane_s32 (int64x2_t a, int32x2_t b, int32x2_t v, const int lane) A32: VQDMLSL.S32 Qd, Dn, Dm[lane] A64: SQDMLSL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - - int32x4_t vqdmull_s16 (int16x4_t a, int16x4_t b) A32: VQDMULL.S16 Qd, Dn, Dm A64: SQDMULL Vd.4S, Vn.4H, Vm.4H - - - - - int64x2_t vqdmull_s32 (int32x2_t a, int32x2_t b) A32: VQDMULL.S32 Qd, Dn, Dm A64: SQDMULL Vd.2D, Vn.2S, Vm.2S - - - - - int32x4_t vqdmull_n_s16 (int16x4_t a, int16_t b) A32: VQDMULL.S16 Qd, Dn, Dm[0] A64: SQDMULL Vd.4S, Vn.4H, Vm.H[0] - - - - - int64x2_t vqdmull_n_s32 (int32x2_t a, int32_t b) A32: VQDMULL.S32 Qd, Dn, Dm[0] A64: SQDMULL Vd.2D, Vn.2S, Vm.S[0] - - - - - int32x4_t vqdmull_laneq_s16 (int16x4_t a, int16x8_t v, const int lane) A32: VQDMULL.S16 Qd, Dn, Dm[lane] A64: SQDMULL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - int32x4_t vqdmull_lane_s16 (int16x4_t a, int16x4_t v, const int lane) A32: VQDMULL.S16 Qd, Dn, Dm[lane] A64: SQDMULL Vd.4S, Vn.4H, Vm.H[lane] - - - - - - int64x2_t vqdmull_laneq_s32 (int32x2_t a, int32x4_t v, const int lane) A32: VQDMULL.S32 Qd, Dn, Dm[lane] A64: SQDMULL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - int64x2_t vqdmull_lane_s32 (int32x2_t a, int32x2_t v, const int lane) A32: VQDMULL.S32 Qd, Dn, Dm[lane] A64: SQDMULL Vd.2D, Vn.2S, Vm.S[lane] - - - - - - int32x4_t vqdmull_high_s16 (int16x8_t a, int16x8_t b) A32: VQDMULL.S16 Qd, Dn+1, Dm+1 A64: SQDMULL2 Vd.4S, Vn.8H, Vm.8H - - - - - int64x2_t vqdmull_high_s32 (int32x4_t a, int32x4_t b) A32: VQDMULL.S32 Qd, Dn+1, Dm+1 A64: SQDMULL2 Vd.2D, Vn.4S, Vm.4S - - - - - int32x4_t vqdmull_high_n_s16 (int16x8_t a, int16_t b) A32: VQDMULL.S16 Qd, Dn+1, Dm[0] A64: SQDMULL2 Vd.4S, Vn.8H, Vm.H[0] - - - - - int64x2_t vqdmull_high_n_s32 (int32x4_t a, int32_t b) A32: VQDMULL.S32 Qd, Dn+1, Dm[0] A64: SQDMULL2 Vd.2D, Vn.4S, Vm.S[0] - - - - - int32x4_t vqdmull_high_laneq_s16 (int16x8_t a, int16x8_t v, const int lane) A32: VQDMULL.S16 Qd, Dn+1, Dm[lane] A64: SQDMULL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - int32x4_t vqdmull_high_lane_s16 (int16x8_t a, int16x4_t v, const int lane) A32: VQDMULL.S16 Qd, Dn+1, Dm[lane] A64: SQDMULL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - int64x2_t vqdmull_high_laneq_s32 (int32x4_t a, int32x4_t v, const int lane) A32: VQDMULL.S32 Qd, Dn+1, Dm[lane] A64: SQDMULL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - int64x2_t vqdmull_high_lane_s32 (int32x4_t a, int32x2_t v, const int lane) A32: VQDMULL.S32 Qd, Dn+1, Dm[lane] A64: SQDMULL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - int32x4_t vqdmlal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) A32: VQDMLAL.S16 Qd, Dn+1, Dm+1 A64: SQDMLAL2 Vd.4S, Vn.8H, Vm.8H - - - - - - int64x2_t vqdmlal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) A32: VQDMLAL.S32 Qd, Dn+1, Dm+1 A64: SQDMLAL2 Vd.2D, Vn.4S, Vm.4S - - - - - - int32x4_t vqdmlsl_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) A32: VQDMLSL.S16 Qd, Dn+1, Dm+1 A64: SQDMLSL2 Vd.4S, Vn.8H, Vm.8H - - - - - - int64x2_t vqdmlsl_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) A32: VQDMLSL.S32 Qd, Dn+1, Dm+1 A64: SQDMLSL2 Vd.2D, Vn.4S, Vm.4S - - - - - - int32x4_t vqdmlal_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c) A32: VQDMLAL.S16 Qd, Dn+1, Dm[0] A64: SQDMLAL2 Vd.4S, Vn.8H, Vm.H[0] - - - - - - int64x2_t vqdmlal_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c) A32: VQDMLAL.S32 Qd, Dn+1, Dm[0] A64: SQDMLAL2 Vd.2D, Vn.4S, Vm.S[0] - - - - - - int32x4_t vqdmlsl_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c) A32: VQDMLSL.S16 Qd, Dn+1, Dm[0] A64: SQDMLSL2 Vd.4S, Vn.8H, Vm.H[0] - - - - - - int64x2_t vqdmlsl_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c) A32: VQDMLSL.S32 Qd, Dn+1, Dm[0] A64: SQDMLSL2 Vd.2D, Vn.4S, Vm.S[0] - - - - - - int32x4_t vqdmlal_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t v, const int lane) A32: VQDMLAL.S16 Qd, Dn+1, Dm[lane] A64: SQDMLAL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - int32x4_t vqdmlal_high_lane_s16 (int32x4_t a, int16x8_t b, int16x4_t v, const int lane) A32: VQDMLAL.S16 Qd, Dn+1, Dm[lane] A64: SQDMLAL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - int64x2_t vqdmlal_high_laneq_s32 (int64x2_t a, int32x4_t b, int32x4_t v, const int lane) A32: VQDMLAL.S32 Qd, Dn+1, Dm[lane] A64: SQDMLAL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - int64x2_t vqdmlal_high_lane_s32 (int64x2_t a, int32x4_t b, int32x2_t v, const int lane) A32: VQDMLAL.S32 Qd, Dn+1, Dm[lane] A64: SQDMLAL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - int32x4_t vqdmlsl_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t v, const int lane) A32: VQDMLSL.S16 Qd, Dn+1, Dm[lane] A64: SQDMLSL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - int32x4_t vqdmlsl_high_lane_s16 (int32x4_t a, int16x8_t b, int16x4_t v, const int lane) A32: VQDMLSL.S16 Qd, Dn+1, Dm[lane] A64: SQDMLSL2 Vd.4S, Vn.8H, Vm.H[lane] - - - - - - - int64x2_t vqdmlsl_high_laneq_s32 (int64x2_t a, int32x4_t b, int32x4_t v, const int lane) A32: VQDMLSL.S32 Qd, Dn+1, Dm[lane] A64: SQDMLSL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - int64x2_t vqdmlsl_high_lane_s32 (int64x2_t a, int32x4_t b, int32x2_t v, const int lane) A32: VQDMLSL.S32 Qd, Dn+1, Dm[lane] A64: SQDMLSL2 Vd.2D, Vn.4S, Vm.S[lane] - - - - - - - int16x8_t vqrdmulhq_n_s16 (int16x8_t a, int16_t b) A32: VQRDMULH.S16 Qd, Qn, Dm[0] A64: SQRDMULH Vd.8H, Vn.8H, Vm.H[0] - - - - - int32x4_t vqrdmulhq_n_s32 (int32x4_t a, int32_t b) A32: VQRDMULH.S32 Qd, Qn, Dm[0] A64: SQRDMULH Vd.4S, Vn.4S, Vm.S[0] - - - - - int16x4_t vqrdmulh_n_s16 (int16x4_t a, int16_t b) A32: VQRDMULH.S16 Dd, Dn, Dm[0] A64: SQRDMULH Vd.4H, Vn.4H, Vm.H[0] - - - - - int32x2_t vqrdmulh_n_s32 (int32x2_t a, int32_t b) A32: VQRDMULH.S32 Dd, Dn, Dm[0] A64: SQRDMULH Vd.2S, Vn.2S, Vm.S[0] - - - - - int16x8_t vqrdmulhq_laneq_s16 (int16x8_t a, int16x8_t v, const int lane) A32: VQRDMULH.S16 Qd, Qn, Dm[lane] A64: SQRDMULH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - int16x8_t vqrdmulhq_lane_s16 (int16x8_t a, int16x4_t v, const int lane) A32: VQRDMULH.S16 Qd, Qn, Dm[lane] A64: SQRDMULH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - int32x4_t vqrdmulhq_laneq_s32 (int32x4_t a, int32x4_t v, const int lane) A32: VQRDMULH.S32 Qd, Qn, Dm[lane] A64: SQRDMULH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - int32x4_t vqrdmulhq_lane_s32 (int32x4_t a, int32x2_t v, const int lane) A32: VQRDMULH.S32 Qd, Qn, Dm[lane] A64: SQRDMULH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - int16x4_t vqrdmulh_laneq_s16 (int16x4_t a, int16x8_t v, const int lane) A32: VQRDMULH.S16 Dd, Dn, Dm[lane] A64: SQRDMULH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - int16x4_t vqrdmulh_lane_s16 (int16x4_t a, int16x4_t v, const int lane) A32: VQRDMULH.S16 Dd, Dn, Dm[lane] A64: SQRDMULH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - int32x2_t vqrdmulh_laneq_s32 (int32x2_t a, int32x4_t v, const int lane) A32: VQRDMULH.S32 Dd, Dn, Dm[lane] A64: SQRDMULH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - int32x2_t vqrdmulh_lane_s32 (int32x2_t a, int32x2_t v, const int lane) A32: VQRDMULH.S32 Dd, Dn, Dm[lane] A64: SQRDMULH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - int16x8_t vqrdmulhq_s16 (int16x8_t a, int16x8_t b) A32: VQRDMULH.S16 Qd, Qn, Qm A64: SQRDMULH Vd.8H, Vn.8H, Vm.8H - - - - - int32x4_t vqrdmulhq_s32 (int32x4_t a, int32x4_t b) A32: VQRDMULH.S32 Qd, Qn, Qm A64: SQRDMULH Vd.4S, Vn.4S, Vm.4S - - - - - int16x4_t vqrdmulh_s16 (int16x4_t a, int16x4_t b) A32: VQRDMULH.S16 Dd, Dn, Dm A64: SQRDMULH Vd.4H, Vn.4H, Vm.4H - - - - - int32x2_t vqrdmulh_s32 (int32x2_t a, int32x2_t b) A32: VQRDMULH.S32 Dd, Dn, Dm A64: SQRDMULH Vd.2S, Vn.2S, Vm.2S - - - - - - float64x1_t vmul_f64 (float64x1_t a, float64x1_t b) - A32: VMUL.F64 Dd, Dn, Dm - A64: FMUL Dd, Dn, Dm - - - - - - - float32_t vmuls_f32 (float32_t a, float32_t b) - A32: VMUL.F32 Sd, Sn, Sm - A64: FMUL Sd, Sn, Sm The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - float32_t vmuls_laneq_f32 (float32_t a, float32x4_t v, const int lane) - A32: VMUL.F32 Sd, Sn, Dm[lane] - A64: FMUL Sd, Sn, Vm.S[lane] - - - - - - - - float32_t vmuls_lane_f32 (float32_t a, float32x2_t v, const int lane) - A32: VMUL.F32 Sd, Sn, Dm[lane] - A64: FMUL Sd, Sn, Vm.S[lane] - - - - - - - - uint8x16_t vmlsq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) - A32: VMLS.I8 Qd, Qn, Qm - A64: MLS Vd.16B, Vn.16B, Vm.16B - - - - - - - - int16x8_t vmlsq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) - A32: VMLS.I16 Qd, Qn, Qm - A64: MLS Vd.8H, Vn.8H, Vm.8H - - - - - - - - int32x4_t vmlsq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) - A32: VMLS.I32 Qd, Qn, Qm - A64: MLS Vd.4S, Vn.4S, Vm.4S - - - - - - - - int8x16_t vmlsq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) - A32: VMLS.I8 Qd, Qn, Qm - A64: MLS Vd.16B, Vn.16B, Vm.16B - - - - - - - - uint16x8_t vmlsq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) - A32: VMLS.I16 Qd, Qn, Qm - A64: MLS Vd.8H, Vn.8H, Vm.8H - - - - - - - - uint32x4_t vmlsq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) - A32: VMLS.I32 Qd, Qn, Qm - A64: MLS Vd.4S, Vn.4S, Vm.4S - - - - - - - - uint8x8_t vmls_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) - A32: VMLS.I8 Dd, Dn, Dm - A64: MLS Vd.8B, Vn.8B, Vm.8B - - - - - - - - int16x4_t vmls_s16 (int16x4_t a, int16x4_t b, int16x4_t c) - A32: VMLS.I16 Dd, Dn, Dm - A64: MLS Vd.4H, Vn.4H, Vm.4H - - - - - - - - int32x2_t vmls_s32 (int32x2_t a, int32x2_t b, int32x2_t c) - A32: VMLS.I32 Dd, Dn, Dm - A64: MLS Vd.2S, Vn.2S, Vm.2S - - - - - - - - int8x8_t vmls_s8 (int8x8_t a, int8x8_t b, int8x8_t c) - A32: VMLS.I8 Dd, Dn, Dm - A64: MLS Vd.8B, Vn.8B, Vm.8B - - - - - - - - uint16x4_t vmls_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) - A32: VMLS.I16 Dd, Dn, Dm - A64: MLS Vd.4H, Vn.4H, Vm.4H - - - - - - - - uint32x2_t vmls_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) - A32: VMLS.I32 Dd, Dn, Dm - A64: MLS Vd.2S, Vn.2S, Vm.2S - - - - - - - - int16x8_t vmlsq_n_s16 (int16x8_t a, int16x8_t b, int16_t c) - A32: VMLS.I16 Qd, Qn, Dm[0] - A64: MLS Vd.8H, Vn.8H, Vm.H[0] - - - - - - - - int32x4_t vmlsq_n_s32 (int32x4_t a, int32x4_t b, int32_t c) - A32: VMLS.I32 Qd, Qn, Dm[0] - A64: MLS Vd.4S, Vn.4S, Vm.S[0] - - - - - - - - uint16x8_t vmlsq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c) - A32: VMLS.I16 Qd, Qn, Dm[0] - A64: MLS Vd.8H, Vn.8H, Vm.H[0] - - - - - - - - uint32x4_t vmlsq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c) - A32: VMLS.I32 Qd, Qn, Dm[0] - A64: MLS Vd.4S, Vn.4S, Vm.S[0] - - - - - - - - int16x4_t vmls_n_s16 (int16x4_t a, int16x4_t b, int16_t c) - A32: VMLS.I16 Dd, Dn, Dm[0] - A64: MLS Vd.4H, Vn.4H, Vm.H[0] - - - - - - - - int32x2_t vmls_n_s32 (int32x2_t a, int32x2_t b, int32_t c) - A32: VMLS.I32 Dd, Dn, Dm[0] - A64: MLS Vd.2S, Vn.2S, Vm.S[0] - - - - - - - - uint16x4_t vmls_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c) - A32: VMLS.I16 Dd, Dn, Dm[0] - A64: MLS Vd.4H, Vn.4H, Vm.H[0] - - - - - - - - uint32x2_t vmls_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c) - A32: VMLS.I32 Dd, Dn, Dm[0] - A64: MLS Vd.2S, Vn.2S, Vm.S[0] - - - - - - - - int16x8_t vmlsq_laneq_s16 (int16x8_t a, int16x8_t b, int16x8_t v, const int lane) - A32: VMLS.I16 Qd, Qn, Dm[lane] - A64: MLS Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - int16x8_t vmlsq_lane_s16 (int16x8_t a, int16x8_t b, int16x4_t v, const int lane) - A32: VMLS.I16 Qd, Qn, Dm[lane] - A64: MLS Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - int32x4_t vmlsq_laneq_s32 (int32x4_t a, int32x4_t b, int32x4_t v, const int lane) - A32: VMLS.I32 Qd, Qn, Dm[lane] - A64: MLS Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - int32x4_t vmlsq_lane_s32 (int32x4_t a, int32x4_t b, int32x2_t v, const int lane) - A32: VMLS.I32 Qd, Qn, Dm[lane] - A64: MLS Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - uint16x8_t vmlsq_laneq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t v, const int lane) - A32: VMLS.I16 Qd, Qn, Dm[lane] - A64: MLS Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - uint16x8_t vmlsq_lane_u16 (uint16x8_t a, uint16x8_t b, uint16x4_t v, const int lane) - A32: VMLS.I16 Qd, Qn, Dm[lane] - A64: MLS Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - - - uint32x4_t vmlsq_laneq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t v, const int lane) - A32: VMLS.I32 Qd, Qn, Dm[lane] - A64: MLS Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - uint32x4_t vmlsq_lane_u32 (uint32x4_t a, uint32x4_t b, uint32x2_t v, const int lane) - A32: VMLS.I32 Qd, Qn, Dm[lane] - A64: MLS Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - int16x4_t vmls_laneq_s16 (int16x4_t a, int16x4_t b, int16x8_t v, const int lane) - A32: VMLS.I16 Dd, Dn, Dm[lane] - A64: MLS Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - int16x4_t vmls_lane_s16 (int16x4_t a, int16x4_t b, int16x4_t v, const int lane) - A32: VMLS.I16 Dd, Dn, Dm[lane] - A64: MLS Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - int32x2_t vmls_laneq_s32 (int32x2_t a, int32x2_t b, int32x4_t v, const int lane) - A32: VMLS.I32 Dd, Dn, Dm[lane] - A64: MLS Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - int32x2_t vmls_lane_s32 (int32x2_t a, int32x2_t b, int32x2_t v, const int lane) - A32: VMLS.I32 Dd, Dn, Dm[lane] - A64: MLS Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - uint16x4_t vmls_laneq_u16 (uint16x4_t a, uint16x4_t b, uint16x8_t v, const int lane) - A32: VMLS.I16 Dd, Dn, Dm[lane] - A64: MLS Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - uint16x4_t vmls_lane_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t v, const int lane) - A32: VMLS.I16 Dd, Dn, Dm[lane] - A64: MLS Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - - - uint32x2_t vmls_laneq_u32 (uint32x2_t a, uint32x2_t b, uint32x4_t v, const int lane) - A32: VMLS.I32 Dd, Dn, Dm[lane] - A64: MLS Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - uint32x2_t vmls_lane_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t v, const int lane) - A32: VMLS.I32 Dd, Dn, Dm[lane] - A64: MLS Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - uint16x8_t vmull_u8 (uint8x8_t a, uint8x8_t b) - A32: VMULL.U8 Qd, Dn, Dm - A64: UMULL Vd.8H, Vn.8B, Vm.8B - - - - - - - int32x4_t vmull_s16 (int16x4_t a, int16x4_t b) - A32: VMULL.S16 Qd, Dn, Dm - A64: SMULL Vd.4S, Vn.4H, Vm.4H - - - - - - - int64x2_t vmull_s32 (int32x2_t a, int32x2_t b) - A32: VMULL.S32 Qd, Dn, Dm - A64: SMULL Vd.2D, Vn.2S, Vm.2S - - - - - - - int16x8_t vmull_s8 (int8x8_t a, int8x8_t b) - A32: VMULL.S8 Qd, Dn, Dm - A64: SMULL Vd.8H, Vn.8B, Vm.8B - - - - - - - uint32x4_t vmull_u16 (uint16x4_t a, uint16x4_t b) - A32: VMULL.U16 Qd, Dn, Dm - A64: UMULL Vd.4S, Vn.4H, Vm.4H - - - - - - - uint64x2_t vmull_u32 (uint32x2_t a, uint32x2_t b) - A32: VMULL.U32 Qd, Dn, Dm - A64: UMULL Vd.2D, Vn.2S, Vm.2S - - - - - - - int16x8_t vmlal_s8 (int16x8_t a, int8x8_t b, int8x8_t c) - A32: VMLAL.S8 Qd, Dn, Dm - A64: SMLAL Vd.8H, Vn.8B, Vm.8B - - - - - - - - int32x4_t vmlal_s16 (int32x4_t a, int16x4_t b, int16x4_t c) - A32: VMLAL.S16 Qd, Dn, Dm - A64: SMLAL Vd.4S, Vn.4H, Vm.4H - - - - - - - - int64x2_t vmlal_s32 (int64x2_t a, int32x2_t b, int32x2_t c) - A32: VMLAL.S32 Qd, Dn, Dm - A64: SMLAL Vd.2D, Vn.2S, Vm.2S - - - - - - - - uint16x8_t vmlal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) - A32: VMLAL.U8 Qd, Dn, Dm - A64: UMLAL Vd.8H, Vn.8B, Vm.8B - - - - - - - - uint32x4_t vmlal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) - A32: VMLAL.U16 Qd, Dn, Dm - A64: UMLAL Vd.4S, Vn.4H, Vm.4H - - - - - - - - uint64x2_t vmlal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) - A32: VMLAL.U32 Qd, Dn, Dm - A64: UMLAL Vd.2D, Vn.2S, Vm.2S - - - - - - - - int16x8_t vmlsl_s8 (int16x8_t a, int8x8_t b, int8x8_t c) - A32: VMLSL.S8 Qd, Dn, Dm - A64: SMLSL Vd.8H, Vn.8B, Vm.8B - - - - - - - - int32x4_t vmlsl_s16 (int32x4_t a, int16x4_t b, int16x4_t c) - A32: VMLSL.S16 Qd, Dn, Dm - A64: SMLSL Vd.4S, Vn.4H, Vm.4H - - - - - - - - int64x2_t vmlsl_s32 (int64x2_t a, int32x2_t b, int32x2_t c) - A32: VMLSL.S32 Qd, Dn, Dm - A64: SMLSL Vd.2D, Vn.2S, Vm.2S - - - - - - - - uint16x8_t vmlsl_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) - A32: VMLSL.U8 Qd, Dn, Dm - A64: UMLSL Vd.8H, Vn.8B, Vm.8B - - - - - - - - uint32x4_t vmlsl_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) - A32: VMLSL.U16 Qd, Dn, Dm - A64: UMLSL Vd.4S, Vn.4H, Vm.4H - - - - - - - - uint64x2_t vmlsl_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) - A32: VMLSL.U32 Qd, Dn, Dm - A64: UMLSL Vd.2D, Vn.2S, Vm.2S - - - - - - - - uint16x8_t vmull_high_u8 (uint8x16_t a, uint8x16_t b) - A32: VMULL.U8 Qd, Dn+1, Dm+1 - A64: UMULL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - int32x4_t vmull_high_s16 (int16x8_t a, int16x8_t b) - A32: VMULL.S16 Qd, Dn+1, Dm+1 - A64: SMULL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - int64x2_t vmull_high_s32 (int32x4_t a, int32x4_t b) - A32: VMULL.S32 Qd, Dn+1, Dm+1 - A64: SMULL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - int16x8_t vmull_high_s8 (int8x16_t a, int8x16_t b) - A32: VMULL.S8 Qd, Dn+1, Dm+1 - A64: SMULL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - uint32x4_t vmull_high_u16 (uint16x8_t a, uint16x8_t b) - A32: VMULL.U16 Qd, Dn+1, Dm+1 - A64: UMULL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - uint64x2_t vmull_high_u32 (uint32x4_t a, uint32x4_t b) - A32: VMULL.U32 Qd, Dn+1, Dm+1 - A64: UMULL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - int16x8_t vmlal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) - A32: VMLAL.S8 Qd, Dn+1, Dm+1 - A64: SMLAL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - - int32x4_t vmlal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) - A32: VMLAL.S16 Qd, Dn+1, Dm+1 - A64: SMLAL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - - int64x2_t vmlal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) - A32: VMLAL.S32 Qd, Dn+1, Dm+1 - A64: SMLAL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - - uint16x8_t vmlal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) - A32: VMLAL.U8 Qd, Dn+1, Dm+1 - A64: UMLAL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - - uint32x4_t vmlal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) - A32: VMLAL.U16 Qd, Dn+1, Dm+1 - A64: UMLAL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - - uint64x2_t vmlal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) - A32: VMLAL.U32 Qd, Dn+1, Dm+1 - A64: UMLAL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - - int16x8_t vmlsl_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) - A32: VMLSL.S8 Qd, Dn+1, Dm+1 - A64: SMLSL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - - int32x4_t vmlsl_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) - A32: VMLSL.S16 Qd, Dn+1, Dm+1 - A64: SMLSL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - - int64x2_t vmlsl_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) - A32: VMLSL.S32 Qd, Dn+1, Dm+1 - A64: SMLSL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - - uint16x8_t vmlsl_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) - A32: VMLSL.U8 Qd, Dn+1, Dm+1 - A64: UMLSL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - - uint32x4_t vmlsl_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) - A32: VMLSL.U16 Qd, Dn+1, Dm+1 - A64: UMLSL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - - uint64x2_t vmlsl_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) - A32: VMLSL.U32 Qd, Dn+1, Dm+1 - A64: UMLSL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - - int16x8_t vnegq_s16 (int16x8_t a) - A32: VNEG.S16 Qd, Qm - A64: NEG Vd.8H, Vn.8H - - - - - - int32x4_t vnegq_s32 (int32x4_t a) - A32: VNEG.S32 Qd, Qm - A64: NEG Vd.4S, Vn.4S - - - - - - int8x16_t vnegq_s8 (int8x16_t a) - A32: VNEG.S8 Qd, Qm - A64: NEG Vd.16B, Vn.16B - - - - - - float32x4_t vnegq_f32 (float32x4_t a) - A32: VNEG.F32 Qd, Qm - A64: FNEG Vd.4S, Vn.4S - - - - - - int16x4_t vneg_s16 (int16x4_t a) - A32: VNEG.S16 Dd, Dm - A64: NEG Vd.4H, Vn.4H - - - - - - int32x2_t vneg_s32 (int32x2_t a) - A32: VNEG.S32 Dd, Dm - A64: NEG Vd.2S, Vn.2S - - - - - - int8x8_t vneg_s8 (int8x8_t a) - A32: VNEG.S8 Dd, Dm - A64: NEG Vd.8B, Vn.8B - - - - - - float32x2_t vneg_f32 (float32x2_t a) - A32: VNEG.F32 Dd, Dm - A64: FNEG Vd.2S, Vn.2S - - - - - - int16x8_t vqnegq_s16 (int16x8_t a) - A32: VQNEG.S16 Qd, Qm - A64: SQNEG Vd.8H, Vn.8H - - - - - - int32x4_t vqnegq_s32 (int32x4_t a) - A32: VQNEG.S32 Qd, Qm - A64: SQNEG Vd.4S, Vn.4S - - - - - - int8x16_t vqnegq_s8 (int8x16_t a) - A32: VQNEG.S8 Qd, Qm - A64: SQNEG Vd.16B, Vn.16B - - - - - - int16x4_t vqneg_s16 (int16x4_t a) - A32: VQNEG.S16 Dd, Dm - A64: SQNEG Vd.4H, Vn.4H - - - - - - int32x2_t vqneg_s32 (int32x2_t a) - A32: VQNEG.S32 Dd, Dm - A64: SQNEG Vd.2S, Vn.2S - - - - - - int8x8_t vqneg_s8 (int8x8_t a) - A32: VQNEG.S8 Dd, Dm - A64: SQNEG Vd.8B, Vn.8B - - - - - - float64x1_t vneg_f64 (float64x1_t a) - A32: VNEG.F64 Dd, Dm - A64: FNEG Dd, Dn - - - - - - float32_t vnegs_f32 (float32_t a) - A32: VNEG.F32 Sd, Sm - A64: FNEG Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - uint8x16_t vmvnq_u8 (uint8x16_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - float64x2_t vmvnq_f64 (float64x2_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - int16x8_t vmvnq_s16 (int16x8_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - int32x4_t vmvnq_s32 (int32x4_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - int64x2_t vmvnq_s64 (int64x2_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - int8x16_t vmvnq_s8 (int8x16_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - float32x4_t vmvnq_f32 (float32x4_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - uint16x8_t vmvnq_u16 (uint16x8_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - uint32x4_t vmvnq_u32 (uint32x4_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - uint64x2_t vmvnq_u64 (uint64x2_t a) - A32: VMVN Qd, Qm - A64: MVN Vd.16B, Vn.16B - - - - - - uint8x8_t vmvn_u8 (uint8x8_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - float64x1_t vmvn_f64 (float64x1_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - int16x4_t vmvn_s16 (int16x4_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - int32x2_t vmvn_s32 (int32x2_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - int64x1_t vmvn_s64 (int64x1_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - int8x8_t vmvn_s8 (int8x8_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - float32x2_t vmvn_f32 (float32x2_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - uint16x4_t vmvn_u16 (uint16x4_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - uint32x2_t vmvn_u32 (uint32x2_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - uint64x1_t vmvn_u64 (uint64x1_t a) - A32: VMVN Dd, Dm - A64: MVN Vd.8B, Vn.8B - - - - - - uint8x16_t vorrq_u8 (uint8x16_t a, uint8x16_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vorrq_f64 (float64x2_t a, float64x2_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x8_t vorrq_s16 (int16x8_t a, int16x8_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - int32x4_t vorrq_s32 (int32x4_t a, int32x4_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - int64x2_t vorrq_s64 (int64x2_t a, int64x2_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - int8x16_t vorrq_s8 (int8x16_t a, int8x16_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vorrq_f32 (float32x4_t a, float32x4_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x8_t vorrq_u16 (uint16x8_t a, uint16x8_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vorrq_u32 (uint32x4_t a, uint32x4_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - uint64x2_t vorrq_u64 (uint64x2_t a, uint64x2_t b) - A32: VORR Qd, Qn, Qm - A64: ORR Vd.16B, Vn.16B, Vm.16B - - - - - - - uint8x8_t vorr_u8 (uint8x8_t a, uint8x8_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - float64x1_t vorr_f64 (float64x1_t a, float64x1_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x4_t vorr_s16 (int16x4_t a, int16x4_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - int32x2_t vorr_s32 (int32x2_t a, int32x2_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - int64x1_t vorr_s64 (int64x1_t a, int64x1_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - int8x8_t vorr_s8 (int8x8_t a, int8x8_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vorr_f32 (float32x2_t a, float32x2_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x4_t vorr_u16 (uint16x4_t a, uint16x4_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vorr_u32 (uint32x2_t a, uint32x2_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - uint64x1_t vorr_u64 (uint64x1_t a, uint64x1_t b) - A32: VORR Dd, Dn, Dm - A64: ORR Vd.8B, Vn.8B, Vm.8B - - - - - - - uint8x16_t vornq_u8 (uint8x16_t a, uint8x16_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vornq_f64 (float64x2_t a, float64x2_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x8_t vornq_s16 (int16x8_t a, int16x8_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - int32x4_t vornq_s32 (int32x4_t a, int32x4_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - int64x2_t vornq_s64 (int64x2_t a, int64x2_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - int8x16_t vornq_s8 (int8x16_t a, int8x16_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vornq_f32 (float32x4_t a, float32x4_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x8_t vornq_u16 (uint16x8_t a, uint16x8_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t vornq_u32 (uint32x4_t a, uint32x4_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - uint64x2_t vornq_u64 (uint64x2_t a, uint64x2_t b) - A32: VORN Qd, Qn, Qm - A64: ORN Vd.16B, Vn.16B, Vm.16B - - - - - - - uint8x8_t vorn_u8 (uint8x8_t a, uint8x8_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - float64x1_t vorn_f64 (float64x1_t a, float64x1_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x4_t vorn_s16 (int16x4_t a, int16x4_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - int32x2_t vorn_s32 (int32x2_t a, int32x2_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - int64x1_t vorn_s64 (int64x1_t a, int64x1_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - int8x8_t vorn_s8 (int8x8_t a, int8x8_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vorn_f32 (float32x2_t a, float32x2_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x4_t vorn_u16 (uint16x4_t a, uint16x4_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t vorn_u32 (uint32x2_t a, uint32x2_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - uint64x1_t vorn_u64 (uint64x1_t a, uint64x1_t b) - A32: VORN Dd, Dn, Dm - A64: ORN Vd.8B, Vn.8B, Vm.8B - - - - - - - poly8x16_t vmulq_p8 (poly8x16_t a, poly8x16_t b) - A32: VMUL.P8 Qd, Qn, Qm - A64: PMUL Vd.16B, Vn.16B, Vm.16B - - - - - - - poly8x16_t vmulq_p8 (poly8x16_t a, poly8x16_t b) - A32: VMUL.P8 Qd, Qn, Qm - A64: PMUL Vd.16B, Vn.16B, Vm.16B - - - - - - - poly8x8_t vmul_p8 (poly8x8_t a, poly8x8_t b) - A32: VMUL.P8 Dd, Dn, Dm - A64: PMUL Vd.8B, Vn.8B, Vm.8B - - - - - - - poly8x8_t vmul_p8 (poly8x8_t a, poly8x8_t b) - A32: VMUL.P8 Dd, Dn, Dm - A64: PMUL Vd.8B, Vn.8B, Vm.8B - - - - - - - poly16x8_t vmull_p8 (poly8x8_t a, poly8x8_t b) - A32: VMULL.P8 Qd, Dn, Dm - A64: PMULL Vd.16B, Vn.8B, Vm.8B - - - - - - - poly16x8_t vmull_p8 (poly8x8_t a, poly8x8_t b) - A32: VMULL.P8 Qd, Dn, Dm - A64: PMULL Vd.16B, Vn.8B, Vm.8B - - - - - - - poly16x8_t vmull_high_p8 (poly8x16_t a, poly8x16_t b) - A32: VMULL.P8 Qd, Dn+1, Dm+1 - A64: PMULL2 Vd.16B, Vn.16B, Vm.16B - - - - - - - poly16x8_t vmull_high_p8 (poly8x16_t a, poly8x16_t b) - A32: VMULL.P8 Qd, Dn+1, Dm+1 - A64: PMULL2 Vd.16B, Vn.16B, Vm.16B - - - - - - - uint8x16_t vcntq_u8 (uint8x16_t a) - A32: VCNT.I8 Qd, Qm - A64: CNT Vd.16B, Vn.16B - - - - - - int8x16_t vcntq_s8 (int8x16_t a) - A32: VCNT.I8 Qd, Qm - A64: CNT Vd.16B, Vn.16B - - - - - - uint8x8_t vcnt_u8 (uint8x8_t a) - A32: VCNT.I8 Dd, Dm - A64: CNT Vd.8B, Vn.8B - - - - - - int8x8_t vcnt_s8 (int8x8_t a) - A32: VCNT.I8 Dd, Dm - A64: CNT Vd.8B, Vn.8B - - - - - - float32x4_t vrecpeq_f32 (float32x4_t a) - A32: VRECPE.F32 Qd, Qm - A64: FRECPE Vd.4S, Vn.4S - - - - - - uint32x4_t vrecpeq_u32 (uint32x4_t a) - A32: VRECPE.U32 Qd, Qm - A64: URECPE Vd.4S, Vn.4S - - - - - - float32x2_t vrecpe_f32 (float32x2_t a) - A32: VRECPE.F32 Dd, Dm - A64: FRECPE Vd.2S, Vn.2S - - - - - - uint32x2_t vrecpe_u32 (uint32x2_t a) - A32: VRECPE.U32 Dd, Dm - A64: URECPE Vd.2S, Vn.2S - - - - - - float32x4_t vrsqrteq_f32 (float32x4_t a) - A32: VRSQRTE.F32 Qd, Qm - A64: FRSQRTE Vd.4S, Vn.4S - - - - - - uint32x4_t vrsqrteq_u32 (uint32x4_t a) - A32: VRSQRTE.U32 Qd, Qm - A64: URSQRTE Vd.4S, Vn.4S - - - - - - float32x2_t vrsqrte_f32 (float32x2_t a) - A32: VRSQRTE.F32 Dd, Dm - A64: FRSQRTE Vd.2S, Vn.2S - - - - - - uint32x2_t vrsqrte_u32 (uint32x2_t a) - A32: VRSQRTE.U32 Dd, Dm - A64: URSQRTE Vd.2S, Vn.2S - - - - - - float32x4_t vrsqrtsq_f32 (float32x4_t a, float32x4_t b) - A32: VRSQRTS.F32 Qd, Qn, Qm - A64: FRSQRTS Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vrsqrts_f32 (float32x2_t a, float32x2_t b) - A32: VRSQRTS.F32 Dd, Dn, Dm - A64: FRSQRTS Vd.2S, Vn.2S, Vm.2S - - - - - - - float32x4_t vrecpsq_f32 (float32x4_t a, float32x4_t b) - A32: VRECPS.F32 Qd, Qn, Qm - A64: FRECPS Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vrecps_f32 (float32x2_t a, float32x2_t b) - A32: VRECPS.F32 Dd, Dn, Dm - A64: FRECPS Vd.2S, Vn.2S, Vm.2S - - - - - - int16x8_t vrev32q_s16 (int16x8_t vec) A32: VREV32.16 Qd, Qm A64: REV32 Vd.8H, Vn.8H - - - - int16x8_t vrev64q_s16 (int16x8_t vec) A32: VREV64.16 Qd, Qm A64: REV64 Vd.8H, Vn.8H - - - - uint16x8_t vrev32q_u16 (uint16x8_t vec) A32: VREV32.16 Qd, Qm A64: REV32 Vd.8H, Vn.8H - - - - uint16x8_t vrev64q_u16 (uint16x8_t vec) A32: VREV64.16 Qd, Qm A64: REV64 Vd.8H, Vn.8H - - - - int16x4_t vrev32_s16 (int16x4_t vec) A32: VREV32.16 Dd, Dm A64: REV32 Vd.4H, Vn.4H - - - - int16x4_t vrev64_s16 (int16x4_t vec) A32: VREV64.16 Dd, Dm A64: REV64 Vd.4H, Vn.4H - - - - uint16x4_t vrev32_u16 (uint16x4_t vec) A32: VREV32.16 Dd, Dm A64: REV32 Vd.4H, Vn.4H - - - - uint16x4_t vrev64_u16 (uint16x4_t vec) A32: VREV64.16 Dd, Dm A64: REV64 Vd.4H, Vn.4H - - - - int32x4_t vrev64q_s32 (int32x4_t vec) A32: VREV64.32 Qd, Qm A64: REV64 Vd.4S, Vn.4S - - - - uint32x4_t vrev64q_u32 (uint32x4_t vec) A32: VREV64.32 Qd, Qm A64: REV64 Vd.4S, Vn.4S - - - - int32x2_t vrev64_s32 (int32x2_t vec) A32: VREV64.32 Dd, Dm A64: REV64 Vd.2S, Vn.2S - - - - uint32x2_t vrev64_u32 (uint32x2_t vec) A32: VREV64.32 Dd, Dm A64: REV64 Vd.2S, Vn.2S - - - - int8x16_t vrev16q_s8 (int8x16_t vec) A32: VREV16.8 Qd, Qm A64: REV16 Vd.16B, Vn.16B - - - - int8x16_t vrev32q_s8 (int8x16_t vec) A32: VREV32.8 Qd, Qm A64: REV32 Vd.16B, Vn.16B - - - - int8x16_t vrev64q_s8 (int8x16_t vec) A32: VREV64.8 Qd, Qm A64: REV64 Vd.16B, Vn.16B - - - - uint8x16_t vrev16q_u8 (uint8x16_t vec) A32: VREV16.8 Qd, Qm A64: REV16 Vd.16B, Vn.16B - - - - uint8x16_t vrev32q_u8 (uint8x16_t vec) A32: VREV32.8 Qd, Qm A64: REV32 Vd.16B, Vn.16B - - - - uint8x16_t vrev64q_u8 (uint8x16_t vec) A32: VREV64.8 Qd, Qm A64: REV64 Vd.16B, Vn.16B - - - - int8x8_t vrev16_s8 (int8x8_t vec) A32: VREV16.8 Dd, Dm A64: REV16 Vd.8B, Vn.8B - - - - int8x8_t vrev32_s8 (int8x8_t vec) A32: VREV32.8 Dd, Dm A64: REV32 Vd.8B, Vn.8B - - - - int8x8_t vrev64_s8 (int8x8_t vec) A32: VREV64.8 Dd, Dm A64: REV64 Vd.8B, Vn.8B - - - - uint8x8_t vrev16_u8 (uint8x8_t vec) A32: VREV16.8 Dd, Dm A64: REV16 Vd.8B, Vn.8B - - - - uint8x8_t vrev32_u8 (uint8x8_t vec) A32: VREV32.8 Dd, Dm A64: REV32 Vd.8B, Vn.8B - - - - uint8x8_t vrev64_u8 (uint8x8_t vec) A32: VREV64.8 Dd, Dm A64: REV64 Vd.8B, Vn.8B - - - - - float32x4_t vrndaq_f32 (float32x4_t a) - A32: VRINTA.F32 Qd, Qm - A64: FRINTA Vd.4S, Vn.4S - - - - - - float32x2_t vrnda_f32 (float32x2_t a) - A32: VRINTA.F32 Dd, Dm - A64: FRINTA Vd.2S, Vn.2S - - - - - - float64x1_t vrnda_f64 (float64x1_t a) - A32: VRINTA.F64 Dd, Dm - A64: FRINTA Dd, Dn - - - - - - float32_t vrndas_f32 (float32_t a) - A32: VRINTA.F32 Sd, Sm - A64: FRINTA Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - float32x4_t vrndnq_f32 (float32x4_t a) - A32: VRINTN.F32 Qd, Qm - A64: FRINTN Vd.4S, Vn.4S - - - - - - float32x2_t vrndn_f32 (float32x2_t a) - A32: VRINTN.F32 Dd, Dm - A64: FRINTN Vd.2S, Vn.2S - - - - - - float64x1_t vrndn_f64 (float64x1_t a) - A32: VRINTN.F64 Dd, Dm - A64: FRINTN Dd, Dn - - - - - - float32_t vrndns_f32 (float32_t a) - A32: VRINTN.F32 Sd, Sm - A64: FRINTN Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - float32x4_t vrndmq_f32 (float32x4_t a) - A32: VRINTM.F32 Qd, Qm - A64: FRINTM Vd.4S, Vn.4S - - - - - - float32x2_t vrndm_f32 (float32x2_t a) - A32: VRINTM.F32 Dd, Dm - A64: FRINTM Vd.2S, Vn.2S - - - - - - float64x1_t vrndm_f64 (float64x1_t a) - A32: VRINTM.F64 Dd, Dm - A64: FRINTM Dd, Dn - - - - - - float32_t vrndms_f32 (float32_t a) - A32: VRINTM.F32 Sd, Sm - A64: FRINTM Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - float32x4_t vrndpq_f32 (float32x4_t a) - A32: VRINTP.F32 Qd, Qm - A64: FRINTP Vd.4S, Vn.4S - - - - - - float32x2_t vrndp_f32 (float32x2_t a) - A32: VRINTP.F32 Dd, Dm - A64: FRINTP Vd.2S, Vn.2S - - - - - - float64x1_t vrndp_f64 (float64x1_t a) - A32: VRINTP.F64 Dd, Dm - A64: FRINTP Dd, Dn - - - - - - float32_t vrndps_f32 (float32_t a) - A32: VRINTP.F32 Sd, Sm - A64: FRINTP Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - float32x4_t vrndq_f32 (float32x4_t a) - A32: VRINTZ.F32 Qd, Qm - A64: FRINTZ Vd.4S, Vn.4S - - - - - - float32x2_t vrnd_f32 (float32x2_t a) - A32: VRINTZ.F32 Dd, Dm - A64: FRINTZ Vd.2S, Vn.2S - - - - - - float64x1_t vrnd_f64 (float64x1_t a) - A32: VRINTZ.F64 Dd, Dm - A64: FRINTZ Dd, Dn - - - - - - float32_t vrnds_f32 (float32_t a) - A32: VRINTZ.F32 Sd, Sm - A64: FRINTZ Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - int16x8_t vshlq_s16 (int16x8_t a, int16x8_t b) - A32: VSHL.S16 Qd, Qn, Qm - A64: SSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vshlq_s32 (int32x4_t a, int32x4_t b) - A32: VSHL.S32 Qd, Qn, Qm - A64: SSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vshlq_s64 (int64x2_t a, int64x2_t b) - A32: VSHL.S64 Qd, Qn, Qm - A64: SSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vshlq_s8 (int8x16_t a, int8x16_t b) - A32: VSHL.S8 Qd, Qn, Qm - A64: SSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x4_t vshl_s16 (int16x4_t a, int16x4_t b) - A32: VSHL.S16 Dd, Dn, Dm - A64: SSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vshl_s32 (int32x2_t a, int32x2_t b) - A32: VSHL.S32 Dd, Dn, Dm - A64: SSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vshl_s8 (int8x8_t a, int8x8_t b) - A32: VSHL.S8 Dd, Dn, Dm - A64: SSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x8_t vrshlq_s16 (int16x8_t a, int16x8_t b) - A32: VRSHL.S16 Qd, Qn, Qm - A64: SRSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vrshlq_s32 (int32x4_t a, int32x4_t b) - A32: VRSHL.S32 Qd, Qn, Qm - A64: SRSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vrshlq_s64 (int64x2_t a, int64x2_t b) - A32: VRSHL.S64 Qd, Qn, Qm - A64: SRSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vrshlq_s8 (int8x16_t a, int8x16_t b) - A32: VRSHL.S8 Qd, Qn, Qm - A64: SRSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x4_t vrshl_s16 (int16x4_t a, int16x4_t b) - A32: VRSHL.S16 Dd, Dn, Dm - A64: SRSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vrshl_s32 (int32x2_t a, int32x2_t b) - A32: VRSHL.S32 Dd, Dn, Dm - A64: SRSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vrshl_s8 (int8x8_t a, int8x8_t b) - A32: VRSHL.S8 Dd, Dn, Dm - A64: SRSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x8_t vqrshlq_s16 (int16x8_t a, int16x8_t b) - A32: VQRSHL.S16 Qd, Qn, Qm - A64: SQRSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vqrshlq_s32 (int32x4_t a, int32x4_t b) - A32: VQRSHL.S32 Qd, Qn, Qm - A64: SQRSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vqrshlq_s64 (int64x2_t a, int64x2_t b) - A32: VQRSHL.S64 Qd, Qn, Qm - A64: SQRSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vqrshlq_s8 (int8x16_t a, int8x16_t b) - A32: VQRSHL.S8 Qd, Qn, Qm - A64: SQRSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x4_t vqrshl_s16 (int16x4_t a, int16x4_t b) - A32: VQRSHL.S16 Dd, Dn, Dm - A64: SQRSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vqrshl_s32 (int32x2_t a, int32x2_t b) - A32: VQRSHL.S32 Dd, Dn, Dm - A64: SQRSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vqrshl_s8 (int8x8_t a, int8x8_t b) - A32: VQRSHL.S8 Dd, Dn, Dm - A64: SQRSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - int64x1_t vqrshl_s64 (int64x1_t a, int64x1_t b) - A32: VQRSHL.S64 Dd, Dn, Dm - A64: SQRSHL Dd, Dn, Dm - - - - - - - int64x1_t vrshl_s64 (int64x1_t a, int64x1_t b) - A32: VRSHL.S64 Dd, Dn, Dm - A64: SRSHL Dd, Dn, Dm - - - - - - - int16x8_t vqshlq_s16 (int16x8_t a, int16x8_t b) - A32: VQSHL.S16 Qd, Qn, Qm - A64: SQSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vqshlq_s32 (int32x4_t a, int32x4_t b) - A32: VQSHL.S32 Qd, Qn, Qm - A64: SQSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vqshlq_s64 (int64x2_t a, int64x2_t b) - A32: VQSHL.S64 Qd, Qn, Qm - A64: SQSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vqshlq_s8 (int8x16_t a, int8x16_t b) - A32: VQSHL.S8 Qd, Qn, Qm - A64: SQSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x4_t vqshl_s16 (int16x4_t a, int16x4_t b) - A32: VQSHL.S16 Dd, Dn, Dm - A64: SQSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vqshl_s32 (int32x2_t a, int32x2_t b) - A32: VQSHL.S32 Dd, Dn, Dm - A64: SQSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vqshl_s8 (int8x8_t a, int8x8_t b) - A32: VQSHL.S8 Dd, Dn, Dm - A64: SQSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - int64x1_t vqshl_s64 (int64x1_t a, int64x1_t b) - A32: VQSHL.S64 Dd, Dn, Dm - A64: SQSHL Dd, Dn, Dm - - - - - - - int64x1_t vshl_s64 (int64x1_t a, int64x1_t b) - A32: VSHL.S64 Dd, Dn, Dm - A64: SSHL Dd, Dn, Dm - - - - - - uint8x16_t vsliq_n_u8(uint8x16_t a, uint8x16_t b, __builtin_constant_p(n)) A32: VSLI.8 Qd, Qm, #n A64: SLI Vd.16B, Vn.16B, #n - - - - - - int16x8_t vsliq_n_s16(int16x8_t a, int16x8_t b, __builtin_constant_p(n)) A32: VSLI.16 Qd, Qm, #n A64: SLI Vd.8H, Vn.8H, #n - - - - - - int32x4_t vsliq_n_s32(int32x4_t a, int32x4_t b, __builtin_constant_p(n)) A32: VSLI.32 Qd, Qm, #n A64: SLI Vd.4S, Vn.4S, #n - - - - - - int64x2_t vsliq_n_s64(int64x2_t a, int64x2_t b, __builtin_constant_p(n)) A32: VSLI.64 Qd, Qm, #n A64: SLI Vd.2D, Vn.2D, #n - - - - - - int8x16_t vsliq_n_s8(int8x16_t a, int8x16_t b, __builtin_constant_p(n)) A32: VSLI.8 Qd, Qm, #n A64: SLI Vd.16B, Vn.16B, #n - - - - - - uint16x8_t vsliq_n_u16(uint16x8_t a, uint16x8_t b, __builtin_constant_p(n)) A32: VSLI.16 Qd, Qm, #n A64: SLI Vd.8H, Vn.8H, #n - - - - - - uint32x4_t vsliq_n_u32(uint32x4_t a, uint32x4_t b, __builtin_constant_p(n)) A32: VSLI.32 Qd, Qm, #n A64: SLI Vd.4S, Vn.4S, #n - - - - - - uint64x2_t vsliq_n_u64(uint64x2_t a, uint64x2_t b, __builtin_constant_p(n)) A32: VSLI.64 Qd, Qm, #n A64: SLI Vd.2D, Vn.2D, #n - - - - - - uint8x8_t vsli_n_u8(uint8x8_t a, uint8x8_t b, __builtin_constant_p(n)) A32: VSLI.8 Dd, Dm, #n A64: SLI Vd.8B, Vn.8B, #n - - - - - - int16x4_t vsli_n_s16(int16x4_t a, int16x4_t b, __builtin_constant_p(n)) A32: VSLI.16 Dd, Dm, #n A64: SLI Vd.4H, Vn.4H, #n - - - - - - int32x2_t vsli_n_s32(int32x2_t a, int32x2_t b, __builtin_constant_p(n)) A32: VSLI.32 Dd, Dm, #n A64: SLI Vd.2S, Vn.2S, #n - - - - - - int8x8_t vsli_n_s8(int8x8_t a, int8x8_t b, __builtin_constant_p(n)) A32: VSLI.8 Dd, Dm, #n A64: SLI Vd.8B, Vn.8B, #n - - - - - - uint16x4_t vsli_n_u16(uint16x4_t a, uint16x4_t b, __builtin_constant_p(n)) A32: VSLI.16 Dd, Dm, #n A64: SLI Vd.4H, Vn.4H, #n - - - - - - uint32x2_t vsli_n_u32(uint32x2_t a, uint32x2_t b, __builtin_constant_p(n)) A32: VSLI.32 Dd, Dm, #n A64: SLI Vd.2S, Vn.2S, #n - - - - - - int64_t vslid_n_s64(int64_t a, int64_t b, __builtin_constant_p(n)) A32: VSLI.64 Dd, Dm, #n A64: SLI Dd, Dn, #n - - - - - - uint64_t vslid_n_u64(uint64_t a, uint64_t b, __builtin_constant_p(n)) A32: VSLI.64 Dd, Dm, #n A64: SLI Dd, Dn, #n - - - - - - - uint8x16_t vshlq_n_u8 (uint8x16_t a, const int n) - A32: VSHL.I8 Qd, Qm, #n - A64: SHL Vd.16B, Vn.16B, #n - - - - - - - int16x8_t vshlq_n_s16 (int16x8_t a, const int n) - A32: VSHL.I16 Qd, Qm, #n - A64: SHL Vd.8H, Vn.8H, #n - - - - - - - int64x2_t vshlq_n_s64 (int64x2_t a, const int n) - A32: VSHL.I64 Qd, Qm, #n - A64: SHL Vd.2D, Vn.2D, #n - - - - - - - int8x16_t vshlq_n_s8 (int8x16_t a, const int n) - A32: VSHL.I8 Qd, Qm, #n - A64: SHL Vd.16B, Vn.16B, #n - - - - - - - uint16x8_t vshlq_n_u16 (uint16x8_t a, const int n) - A32: VSHL.I16 Qd, Qm, #n - A64: SHL Vd.8H, Vn.8H, #n - - - - - - - uint32x4_t vshlq_n_u32 (uint32x4_t a, const int n) - A32: VSHL.I32 Qd, Qm, #n - A64: SHL Vd.4S, Vn.4S, #n - - - - - - - uint64x2_t vshlq_n_u64 (uint64x2_t a, const int n) - A32: VSHL.I64 Qd, Qm, #n - A64: SHL Vd.2D, Vn.2D, #n - - - - - - - uint8x8_t vshl_n_u8 (uint8x8_t a, const int n) - A32: VSHL.I8 Dd, Dm, #n - A64: SHL Vd.8B, Vn.8B, #n - - - - - - - int16x4_t vshl_n_s16 (int16x4_t a, const int n) - A32: VSHL.I16 Dd, Dm, #n - A64: SHL Vd.4H, Vn.4H, #n - - - - - - - int32x2_t vshl_n_s32 (int32x2_t a, const int n) - A32: VSHL.I32 Dd, Dm, #n - A64: SHL Vd.2S, Vn.2S, #n - - - - - - - int8x8_t vshl_n_s8 (int8x8_t a, const int n) - A32: VSHL.I8 Dd, Dm, #n - A64: SHL Vd.8B, Vn.8B, #n - - - - - - - uint16x4_t vshl_n_u16 (uint16x4_t a, const int n) - A32: VSHL.I16 Dd, Dm, #n - A64: SHL Vd.4H, Vn.4H, #n - - - - - - - uint32x2_t vshl_n_u32 (uint32x2_t a, const int n) - A32: VSHL.I32 Dd, Dm, #n - A64: SHL Vd.2S, Vn.2S, #n - - - - - - - uint8x16_t vqshlq_n_u8 (uint8x16_t a, const int n) - A32: VQSHL.U8 Qd, Qm, #n - A64: UQSHL Vd.16B, Vn.16B, #n - - - - - - - int16x8_t vqshlq_n_s16 (int16x8_t a, const int n) - A32: VQSHL.S16 Qd, Qm, #n - A64: SQSHL Vd.8H, Vn.8H, #n - - - - - - - int32x4_t vqshlq_n_s32 (int32x4_t a, const int n) - A32: VQSHL.S32 Qd, Qm, #n - A64: SQSHL Vd.4S, Vn.4S, #n - - - - - - - int64x2_t vqshlq_n_s64 (int64x2_t a, const int n) - A32: VQSHL.S64 Qd, Qm, #n - A64: SQSHL Vd.2D, Vn.2D, #n - - - - - - - int8x16_t vqshlq_n_s8 (int8x16_t a, const int n) - A32: VQSHL.S8 Qd, Qm, #n - A64: SQSHL Vd.16B, Vn.16B, #n - - - - - - - uint16x8_t vqshlq_n_u16 (uint16x8_t a, const int n) - A32: VQSHL.U16 Qd, Qm, #n - A64: UQSHL Vd.8H, Vn.8H, #n - - - - - - - uint32x4_t vqshlq_n_u32 (uint32x4_t a, const int n) - A32: VQSHL.U32 Qd, Qm, #n - A64: UQSHL Vd.4S, Vn.4S, #n - - - - - - - uint64x2_t vqshlq_n_u64 (uint64x2_t a, const int n) - A32: VQSHL.U64 Qd, Qm, #n - A64: UQSHL Vd.2D, Vn.2D, #n - - - - - - - uint8x8_t vqshl_n_u8 (uint8x8_t a, const int n) - A32: VQSHL.U8 Dd, Dm, #n - A64: UQSHL Vd.8B, Vn.8B, #n - - - - - - - int16x4_t vqshl_n_s16 (int16x4_t a, const int n) - A32: VQSHL.S16 Dd, Dm, #n - A64: SQSHL Vd.4H, Vn.4H, #n - - - - - - - int32x2_t vqshl_n_s32 (int32x2_t a, const int n) - A32: VQSHL.S32 Dd, Dm, #n - A64: SQSHL Vd.2S, Vn.2S, #n - - - - - - - int8x8_t vqshl_n_s8 (int8x8_t a, const int n) - A32: VQSHL.S8 Dd, Dm, #n - A64: SQSHL Vd.8B, Vn.8B, #n - - - - - - - uint16x4_t vqshl_n_u16 (uint16x4_t a, const int n) - A32: VQSHL.U16 Dd, Dm, #n - A64: UQSHL Vd.4H, Vn.4H, #n - - - - - - - uint32x2_t vqshl_n_u32 (uint32x2_t a, const int n) - A32: VQSHL.U32 Dd, Dm, #n - A64: UQSHL Vd.2S, Vn.2S, #n - - - - - - - int64x1_t vqshl_n_s64 (int64x1_t a, const int n) - A32: VQSHL.S64 Dd, Dm, #n - A64: SQSHL Dd, Dn, #n - - - - - - - uint64x1_t vqshl_n_u64 (uint64x1_t a, const int n) - A32: VQSHL.U64 Dd, Dm, #n - A64: UQSHL Dd, Dn, #n - - - - - - - uint16x8_t vqshluq_n_s16 (int16x8_t a, const int n) - A32: VQSHLU.S16 Qd, Qm, #n - A64: SQSHLU Vd.8H, Vn.8H, #n - - - - - - - uint32x4_t vqshluq_n_s32 (int32x4_t a, const int n) - A32: VQSHLU.S32 Qd, Qm, #n - A64: SQSHLU Vd.4S, Vn.4S, #n - - - - - - - uint64x2_t vqshluq_n_s64 (int64x2_t a, const int n) - A32: VQSHLU.S64 Qd, Qm, #n - A64: SQSHLU Vd.2D, Vn.2D, #n - - - - - - - uint8x16_t vqshluq_n_s8 (int8x16_t a, const int n) - A32: VQSHLU.S8 Qd, Qm, #n - A64: SQSHLU Vd.16B, Vn.16B, #n - - - - - - - uint16x4_t vqshlu_n_s16 (int16x4_t a, const int n) - A32: VQSHLU.S16 Dd, Dm, #n - A64: SQSHLU Vd.4H, Vn.4H, #n - - - - - - - uint32x2_t vqshlu_n_s32 (int32x2_t a, const int n) - A32: VQSHLU.S32 Dd, Dm, #n - A64: SQSHLU Vd.2S, Vn.2S, #n - - - - - - - uint8x8_t vqshlu_n_s8 (int8x8_t a, const int n) - A32: VQSHLU.S8 Dd, Dm, #n - A64: SQSHLU Vd.8B, Vn.8B, #n - - - - - - - uint64x1_t vqshlu_n_s64 (int64x1_t a, const int n) - A32: VQSHLU.S64 Dd, Dm, #n - A64: SQSHLU Dd, Dn, #n - - - - - - - int64x1_t vshl_n_s64 (int64x1_t a, const int n) - A32: VSHL.I64 Dd, Dm, #n - A64: SHL Dd, Dn, #n - - - - - - - uint64x1_t vshl_n_u64 (uint64x1_t a, const int n) - A32: VSHL.I64 Dd, Dm, #n - A64: SHL Dd, Dn, #n - - - - - - - uint16x8_t vshll_n_u8 (uint8x8_t a, const int n) - A32: VSHLL.U8 Qd, Dm, #n - A64: USHLL Vd.8H, Vn.8B, #n - - - - - - - int32x4_t vshll_n_s16 (int16x4_t a, const int n) - A32: VSHLL.S16 Qd, Dm, #n - A64: SSHLL Vd.4S, Vn.4H, #n - - - - - - - int64x2_t vshll_n_s32 (int32x2_t a, const int n) - A32: VSHLL.S32 Qd, Dm, #n - A64: SSHLL Vd.2D, Vn.2S, #n - - - - - - - int16x8_t vshll_n_s8 (int8x8_t a, const int n) - A32: VSHLL.S8 Qd, Dm, #n - A64: SSHLL Vd.8H, Vn.8B, #n - - - - - - - uint32x4_t vshll_n_u16 (uint16x4_t a, const int n) - A32: VSHLL.U16 Qd, Dm, #n - A64: USHLL Vd.4S, Vn.4H, #n - - - - - - - uint64x2_t vshll_n_u32 (uint32x2_t a, const int n) - A32: VSHLL.U32 Qd, Dm, #n - A64: USHLL Vd.2D, Vn.2S, #n - - - - - - - uint16x8_t vshll_high_n_u8 (uint8x16_t a, const int n) - A32: VSHLL.U8 Qd, Dm+1, #n - A64: USHLL2 Vd.8H, Vn.16B, #n - - - - - - - int32x4_t vshll_high_n_s16 (int16x8_t a, const int n) - A32: VSHLL.S16 Qd, Dm+1, #n - A64: SSHLL2 Vd.4S, Vn.8H, #n - - - - - - - int64x2_t vshll_high_n_s32 (int32x4_t a, const int n) - A32: VSHLL.S32 Qd, Dm+1, #n - A64: SSHLL2 Vd.2D, Vn.4S, #n - - - - - - - int16x8_t vshll_high_n_s8 (int8x16_t a, const int n) - A32: VSHLL.S8 Qd, Dm+1, #n - A64: SSHLL2 Vd.8H, Vn.16B, #n - - - - - - - uint32x4_t vshll_high_n_u16 (uint16x8_t a, const int n) - A32: VSHLL.U16 Qd, Dm+1, #n - A64: USHLL2 Vd.4S, Vn.8H, #n - - - - - - - uint64x2_t vshll_high_n_u32 (uint32x4_t a, const int n) - A32: VSHLL.U32 Qd, Dm+1, #n - A64: USHLL2 Vd.2D, Vn.4S, #n - - - - - - - uint8x16_t vshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VSHL.U8 Qd, Qn, Qm - A64: USHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VSHL.U16 Qd, Qn, Qm - A64: USHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VSHL.U32 Qd, Qn, Qm - A64: USHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VSHL.U64 Qd, Qn, Qm - A64: USHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x16_t vshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VSHL.U8 Qd, Qn, Qm - A64: USHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VSHL.U16 Qd, Qn, Qm - A64: USHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VSHL.U32 Qd, Qn, Qm - A64: USHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VSHL.U64 Qd, Qn, Qm - A64: USHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vshl_u8 (uint8x8_t a, int8x8_t b) - A32: VSHL.U8 Dd, Dn, Dm - A64: USHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vshl_u16 (uint16x4_t a, int16x4_t b) - A32: VSHL.U16 Dd, Dn, Dm - A64: USHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vshl_u32 (uint32x2_t a, int32x2_t b) - A32: VSHL.U32 Dd, Dn, Dm - A64: USHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vshl_u8 (uint8x8_t a, int8x8_t b) - A32: VSHL.U8 Dd, Dn, Dm - A64: USHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vshl_u16 (uint16x4_t a, int16x4_t b) - A32: VSHL.U16 Dd, Dn, Dm - A64: USHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vshl_u32 (uint32x2_t a, int32x2_t b) - A32: VSHL.U32 Dd, Dn, Dm - A64: USHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vrshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VRSHL.U8 Qd, Qn, Qm - A64: URSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vrshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VRSHL.U16 Qd, Qn, Qm - A64: URSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vrshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VRSHL.U32 Qd, Qn, Qm - A64: URSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vrshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VRSHL.U64 Qd, Qn, Qm - A64: URSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x16_t vrshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VRSHL.U8 Qd, Qn, Qm - A64: URSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vrshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VRSHL.U16 Qd, Qn, Qm - A64: URSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vrshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VRSHL.U32 Qd, Qn, Qm - A64: URSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vrshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VRSHL.U64 Qd, Qn, Qm - A64: URSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vrshl_u8 (uint8x8_t a, int8x8_t b) - A32: VRSHL.U8 Dd, Dn, Dm - A64: URSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vrshl_u16 (uint16x4_t a, int16x4_t b) - A32: VRSHL.U16 Dd, Dn, Dm - A64: URSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vrshl_u32 (uint32x2_t a, int32x2_t b) - A32: VRSHL.U32 Dd, Dn, Dm - A64: URSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vrshl_u8 (uint8x8_t a, int8x8_t b) - A32: VRSHL.U8 Dd, Dn, Dm - A64: URSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vrshl_u16 (uint16x4_t a, int16x4_t b) - A32: VRSHL.U16 Dd, Dn, Dm - A64: URSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vrshl_u32 (uint32x2_t a, int32x2_t b) - A32: VRSHL.U32 Dd, Dn, Dm - A64: URSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vqrshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VQRSHL.U8 Qd, Qn, Qm - A64: UQRSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vqrshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VQRSHL.U16 Qd, Qn, Qm - A64: UQRSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vqrshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VQRSHL.U32 Qd, Qn, Qm - A64: UQRSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vqrshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VQRSHL.U64 Qd, Qn, Qm - A64: UQRSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x16_t vqrshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VQRSHL.U8 Qd, Qn, Qm - A64: UQRSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vqrshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VQRSHL.U16 Qd, Qn, Qm - A64: UQRSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vqrshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VQRSHL.U32 Qd, Qn, Qm - A64: UQRSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vqrshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VQRSHL.U64 Qd, Qn, Qm - A64: UQRSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vqrshl_u8 (uint8x8_t a, int8x8_t b) - A32: VQRSHL.U8 Dd, Dn, Dm - A64: UQRSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vqrshl_u16 (uint16x4_t a, int16x4_t b) - A32: VQRSHL.U16 Dd, Dn, Dm - A64: UQRSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vqrshl_u32 (uint32x2_t a, int32x2_t b) - A32: VQRSHL.U32 Dd, Dn, Dm - A64: UQRSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vqrshl_u8 (uint8x8_t a, int8x8_t b) - A32: VQRSHL.U8 Dd, Dn, Dm - A64: UQRSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vqrshl_u16 (uint16x4_t a, int16x4_t b) - A32: VQRSHL.U16 Dd, Dn, Dm - A64: UQRSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vqrshl_u32 (uint32x2_t a, int32x2_t b) - A32: VQRSHL.U32 Dd, Dn, Dm - A64: UQRSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint64x1_t vqrshl_u64 (uint64x1_t a, int64x1_t b) - A32: VQRSHL.U64 Dd, Dn, Dm - A64: UQRSHL Dd, Dn, Dm - - - - - - - uint64x1_t vqrshl_u64 (uint64x1_t a, int64x1_t b) - A32: VQRSHL.U64 Dd, Dn, Dm - A64: UQRSHL Dd, Dn, Dm - - - - - - - uint64x1_t vrshl_u64 (uint64x1_t a, int64x1_t b) - A32: VRSHL.U64 Dd, Dn, Dm - A64: URSHL Dd, Dn, Dm - - - - - - - uint64x1_t vrshl_u64 (uint64x1_t a, int64x1_t b) - A32: VRSHL.U64 Dd, Dn, Dm - A64: URSHL Dd, Dn, Dm - - - - - - - uint8x16_t vqshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VQSHL.U8 Qd, Qn, Qm - A64: UQSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vqshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VQSHL.U16 Qd, Qn, Qm - A64: UQSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vqshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VQSHL.U32 Qd, Qn, Qm - A64: UQSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vqshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VQSHL.U64 Qd, Qn, Qm - A64: UQSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x16_t vqshlq_u8 (uint8x16_t a, int8x16_t b) - A32: VQSHL.U8 Qd, Qn, Qm - A64: UQSHL Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vqshlq_u16 (uint16x8_t a, int16x8_t b) - A32: VQSHL.U16 Qd, Qn, Qm - A64: UQSHL Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vqshlq_u32 (uint32x4_t a, int32x4_t b) - A32: VQSHL.U32 Qd, Qn, Qm - A64: UQSHL Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vqshlq_u64 (uint64x2_t a, int64x2_t b) - A32: VQSHL.U64 Qd, Qn, Qm - A64: UQSHL Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vqshl_u8 (uint8x8_t a, int8x8_t b) - A32: VQSHL.U8 Dd, Dn, Dm - A64: UQSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vqshl_u16 (uint16x4_t a, int16x4_t b) - A32: VQSHL.U16 Dd, Dn, Dm - A64: UQSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vqshl_u32 (uint32x2_t a, int32x2_t b) - A32: VQSHL.U32 Dd, Dn, Dm - A64: UQSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x8_t vqshl_u8 (uint8x8_t a, int8x8_t b) - A32: VQSHL.U8 Dd, Dn, Dm - A64: UQSHL Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vqshl_u16 (uint16x4_t a, int16x4_t b) - A32: VQSHL.U16 Dd, Dn, Dm - A64: UQSHL Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vqshl_u32 (uint32x2_t a, int32x2_t b) - A32: VQSHL.U32 Dd, Dn, Dm - A64: UQSHL Vd.2S, Vn.2S, Vm.2S - - - - - - - uint64x1_t vqshl_u64 (uint64x1_t a, int64x1_t b) - A32: VQSHL.U64 Dd, Dn, Dm - A64: UQSHL Dd, Dn, Dm - - - - - - - uint64x1_t vqshl_u64 (uint64x1_t a, int64x1_t b) - A32: VQSHL.U64 Dd, Dn, Dm - A64: UQSHL Dd, Dn, Dm - - - - - - - uint64x1_t vshl_u64 (uint64x1_t a, int64x1_t b) - A32: VSHL.U64 Dd, Dn, Dm - A64: USHL Dd, Dn, Dm - - - - - - - uint64x1_t vshl_u64 (uint64x1_t a, int64x1_t b) - A32: VSHL.U64 Dd, Dn, Dm - A64: USHL Dd, Dn, Dm - - - - - - - uint8x16_t vsriq_n_u8(uint8x16_t a, uint8x16_t b, __builtin_constant_p(n)) - A32: VSRI.8 Qd, Qm, #n - A64: SRI Vd.16B, Vn.16B, #n - - - - - - - - int16x8_t vsriq_n_s16(int16x8_t a, int16x8_t b, __builtin_constant_p(n)) - A32: VSRI.16 Qd, Qm, #n - A64: SRI Vd.8H, Vn.8H, #n - - - - - - - - int32x4_t vsriq_n_s32(int32x4_t a, int32x4_t b, __builtin_constant_p(n)) - A32: VSRI.32 Qd, Qm, #n - A64: SRI Vd.4S, Vn.4S, #n - - - - - - - - int64x2_t vsriq_n_s64(int64x2_t a, int64x2_t b, __builtin_constant_p(n)) - A32: VSRI.64 Qd, Qm, #n - A64: SRI Vd.2D, Vn.2D, #n - - - - - - - - int8x16_t vsriq_n_s8(int8x16_t a, int8x16_t b, __builtin_constant_p(n)) - A32: VSRI.8 Qd, Qm, #n - A64: SRI Vd.16B, Vn.16B, #n - - - - - - - - uint16x8_t vsriq_n_u16(uint16x8_t a, uint16x8_t b, __builtin_constant_p(n)) - A32: VSRI.16 Qd, Qm, #n - A64: SRI Vd.8H, Vn.8H, #n - - - - - - - - uint32x4_t vsriq_n_u32(uint32x4_t a, uint32x4_t b, __builtin_constant_p(n)) - A32: VSRI.32 Qd, Qm, #n - A64: SRI Vd.4S, Vn.4S, #n - - - - - - - - uint64x2_t vsriq_n_u64(uint64x2_t a, uint64x2_t b, __builtin_constant_p(n)) - A32: VSRI.64 Qd, Qm, #n - A64: SRI Vd.2D, Vn.2D, #n - - - - - - - - uint8x8_t vsri_n_u8(uint8x8_t a, uint8x8_t b, __builtin_constant_p(n)) - A32: VSRI.8 Dd, Dm, #n - A64: SRI Vd.8B, Vn.8B, #n - - - - - - - - int16x4_t vsri_n_s16(int16x4_t a, int16x4_t b, __builtin_constant_p(n)) - A32: VSRI.16 Dd, Dm, #n - A64: SRI Vd.4H, Vn.4H, #n - - - - - - - - int32x2_t vsri_n_s32(int32x2_t a, int32x2_t b, __builtin_constant_p(n)) - A32: VSRI.32 Dd, Dm, #n - A64: SRI Vd.2S, Vn.2S, #n - - - - - - - - int8x8_t vsri_n_s8(int8x8_t a, int8x8_t b, __builtin_constant_p(n)) - A32: VSRI.8 Dd, Dm, #n - A64: SRI Vd.8B, Vn.8B, #n - - - - - - - - uint16x4_t vsri_n_u16(uint16x4_t a, uint16x4_t b, __builtin_constant_p(n)) - A32: VSRI.16 Dd, Dm, #n - A64: SRI Vd.4H, Vn.4H, #n - - - - - - - - uint32x2_t vsri_n_u32(uint32x2_t a, uint32x2_t b, __builtin_constant_p(n)) - A32: VSRI.32 Dd, Dm, #n - A64: SRI Vd.2S, Vn.2S, #n - - - - - - - int64_t vsrid_n_s64(int64_t a, int64_t b, __builtin_constant_p(n)) A32: VSRI.64 Dd, Dm, #n A64: SRI Dd, Dn, #n - - - - - - uint64_t vsrid_n_u64(uint64_t a, uint64_t b, __builtin_constant_p(n)) A32: VSRI.64 Dd, Dm, #n A64: SRI Dd, Dn, #n - - - - - - - int16x8_t vshrq_n_s16 (int16x8_t a, const int n) - A32: VSHR.S16 Qd, Qm, #n - A64: SSHR Vd.8H, Vn.8H, #n - - - - - - - int32x4_t vshrq_n_s32 (int32x4_t a, const int n) - A32: VSHR.S32 Qd, Qm, #n - A64: SSHR Vd.4S, Vn.4S, #n - - - - - - - int64x2_t vshrq_n_s64 (int64x2_t a, const int n) - A32: VSHR.S64 Qd, Qm, #n - A64: SSHR Vd.2D, Vn.2D, #n - - - - - - - int8x16_t vshrq_n_s8 (int8x16_t a, const int n) - A32: VSHR.S8 Qd, Qm, #n - A64: SSHR Vd.16B, Vn.16B, #n - - - - - - - int16x4_t vshr_n_s16 (int16x4_t a, const int n) - A32: VSHR.S16 Dd, Dm, #n - A64: SSHR Vd.4H, Vn.4H, #n - - - - - - - int32x2_t vshr_n_s32 (int32x2_t a, const int n) - A32: VSHR.S32 Dd, Dm, #n - A64: SSHR Vd.2S, Vn.2S, #n - - - - - - - int8x8_t vshr_n_s8 (int8x8_t a, const int n) - A32: VSHR.S8 Dd, Dm, #n - A64: SSHR Vd.8B, Vn.8B, #n - - - - - - - int16x8_t vsraq_n_s16 (int16x8_t a, int16x8_t b, const int n) - A32: VSRA.S16 Qd, Qm, #n - A64: SSRA Vd.8H, Vn.8H, #n - - - - - - - - int32x4_t vsraq_n_s32 (int32x4_t a, int32x4_t b, const int n) - A32: VSRA.S32 Qd, Qm, #n - A64: SSRA Vd.4S, Vn.4S, #n - - - - - - - - int64x2_t vsraq_n_s64 (int64x2_t a, int64x2_t b, const int n) - A32: VSRA.S64 Qd, Qm, #n - A64: SSRA Vd.2D, Vn.2D, #n - - - - - - - - int8x16_t vsraq_n_s8 (int8x16_t a, int8x16_t b, const int n) - A32: VSRA.S8 Qd, Qm, #n - A64: SSRA Vd.16B, Vn.16B, #n - - - - - - - - int16x4_t vsra_n_s16 (int16x4_t a, int16x4_t b, const int n) - A32: VSRA.S16 Dd, Dm, #n - A64: SSRA Vd.4H, Vn.4H, #n - - - - - - - - int32x2_t vsra_n_s32 (int32x2_t a, int32x2_t b, const int n) - A32: VSRA.S32 Dd, Dm, #n - A64: SSRA Vd.2S, Vn.2S, #n - - - - - - - - int8x8_t vsra_n_s8 (int8x8_t a, int8x8_t b, const int n) - A32: VSRA.S8 Dd, Dm, #n - A64: SSRA Vd.8B, Vn.8B, #n - - - - - - - - int64x1_t vsra_n_s64 (int64x1_t a, int64x1_t b, const int n) - A32: VSRA.S64 Dd, Dm, #n - A64: SSRA Dd, Dn, #n - - - - - - - - int8x8_t vqshrn_n_s16 (int16x8_t a, const int n) - A32: VQSHRN.S16 Dd, Qm, #n - A64: SQSHRN Vd.8B, Vn.8H, #n - - - - - - - int16x4_t vqshrn_n_s32 (int32x4_t a, const int n) - A32: VQSHRN.S32 Dd, Qm, #n - A64: SQSHRN Vd.4H, Vn.4S, #n - - - - - - - int32x2_t vqshrn_n_s64 (int64x2_t a, const int n) - A32: VQSHRN.S64 Dd, Qm, #n - A64: SQSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vqshrun_n_s16 (int16x8_t a, const int n) - A32: VQSHRUN.S16 Dd, Qm, #n - A64: SQSHRUN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vqshrun_n_s32 (int32x4_t a, const int n) - A32: VQSHRUN.S32 Dd, Qm, #n - A64: SQSHRUN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vqshrun_n_s64 (int64x2_t a, const int n) - A32: VQSHRUN.S64 Dd, Qm, #n - A64: SQSHRUN Vd.2S, Vn.2D, #n - - - - - - - uint8x16_t vqshrun_high_n_s16 (uint8x8_t r, int16x8_t a, const int n) - A32: VQSHRUN.S16 Dd+1, Dn, #n - A64: SQSHRUN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vqshrun_high_n_s32 (uint16x4_t r, int32x4_t a, const int n) - A32: VQSHRUN.S32 Dd+1, Dn, #n - A64: SQSHRUN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vqshrun_high_n_s64 (uint32x2_t r, int64x2_t a, const int n) - A32: VQSHRUN.S64 Dd+1, Dn, #n - A64: SQSHRUN2 Vd.4S, Vn.2D, #n - - - - - - - - int16x8_t vqshrn_high_n_s32 (int16x4_t r, int32x4_t a, const int n) - A32: VQSHRN.S32 Dd+1, Qm, #n - A64: SQSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - int32x4_t vqshrn_high_n_s64 (int32x2_t r, int64x2_t a, const int n) - A32: VQSHRN.S64 Dd+1, Qm, #n - A64: SQSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - int8x16_t vqshrn_high_n_s16 (int8x8_t r, int16x8_t a, const int n) - A32: VQSHRN.S16 Dd+1, Qm, #n - A64: SQSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - int16x8_t vrshrq_n_s16 (int16x8_t a, const int n) - A32: VRSHR.S16 Qd, Qm, #n - A64: SRSHR Vd.8H, Vn.8H, #n - - - - - - - int32x4_t vrshrq_n_s32 (int32x4_t a, const int n) - A32: VRSHR.S32 Qd, Qm, #n - A64: SRSHR Vd.4S, Vn.4S, #n - - - - - - - int64x2_t vrshrq_n_s64 (int64x2_t a, const int n) - A32: VRSHR.S64 Qd, Qm, #n - A64: SRSHR Vd.2D, Vn.2D, #n - - - - - - - int8x16_t vrshrq_n_s8 (int8x16_t a, const int n) - A32: VRSHR.S8 Qd, Qm, #n - A64: SRSHR Vd.16B, Vn.16B, #n - - - - - - - int16x4_t vrshr_n_s16 (int16x4_t a, const int n) - A32: VRSHR.S16 Dd, Dm, #n - A64: SRSHR Vd.4H, Vn.4H, #n - - - - - - - int32x2_t vrshr_n_s32 (int32x2_t a, const int n) - A32: VRSHR.S32 Dd, Dm, #n - A64: SRSHR Vd.2S, Vn.2S, #n - - - - - - - int8x8_t vrshr_n_s8 (int8x8_t a, const int n) - A32: VRSHR.S8 Dd, Dm, #n - A64: SRSHR Vd.8B, Vn.8B, #n - - - - - - - int16x8_t vrsraq_n_s16 (int16x8_t a, int16x8_t b, const int n) - A32: VRSRA.S16 Qd, Qm, #n - A64: SRSRA Vd.8H, Vn.8H, #n - - - - - - - - int32x4_t vrsraq_n_s32 (int32x4_t a, int32x4_t b, const int n) - A32: VRSRA.S32 Qd, Qm, #n - A64: SRSRA Vd.4S, Vn.4S, #n - - - - - - - - int64x2_t vrsraq_n_s64 (int64x2_t a, int64x2_t b, const int n) - A32: VRSRA.S64 Qd, Qm, #n - A64: SRSRA Vd.2D, Vn.2D, #n - - - - - - - - int8x16_t vrsraq_n_s8 (int8x16_t a, int8x16_t b, const int n) - A32: VRSRA.S8 Qd, Qm, #n - A64: SRSRA Vd.16B, Vn.16B, #n - - - - - - - - int16x4_t vrsra_n_s16 (int16x4_t a, int16x4_t b, const int n) - A32: VRSRA.S16 Dd, Dm, #n - A64: SRSRA Vd.4H, Vn.4H, #n - - - - - - - - int32x2_t vrsra_n_s32 (int32x2_t a, int32x2_t b, const int n) - A32: VRSRA.S32 Dd, Dm, #n - A64: SRSRA Vd.2S, Vn.2S, #n - - - - - - - - int8x8_t vrsra_n_s8 (int8x8_t a, int8x8_t b, const int n) - A32: VRSRA.S8 Dd, Dm, #n - A64: SRSRA Vd.8B, Vn.8B, #n - - - - - - - - int64x1_t vrsra_n_s64 (int64x1_t a, int64x1_t b, const int n) - A32: VRSRA.S64 Dd, Dm, #n - A64: SRSRA Dd, Dn, #n - - - - - - - - int8x8_t vqrshrn_n_s16 (int16x8_t a, const int n) - A32: VQRSHRN.S16 Dd, Qm, #n - A64: SQRSHRN Vd.8B, Vn.8H, #n - - - - - - - int16x4_t vqrshrn_n_s32 (int32x4_t a, const int n) - A32: VQRSHRN.S32 Dd, Qm, #n - A64: SQRSHRN Vd.4H, Vn.4S, #n - - - - - - - int32x2_t vqrshrn_n_s64 (int64x2_t a, const int n) - A32: VQRSHRN.S64 Dd, Qm, #n - A64: SQRSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vqrshrun_n_s16 (int16x8_t a, const int n) - A32: VQRSHRUN.S16 Dd, Qm, #n - A64: SQRSHRUN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vqrshrun_n_s32 (int32x4_t a, const int n) - A32: VQRSHRUN.S32 Dd, Qm, #n - A64: SQRSHRUN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vqrshrun_n_s64 (int64x2_t a, const int n) - A32: VQRSHRUN.S64 Dd, Qm, #n - A64: SQRSHRUN Vd.2S, Vn.2D, #n - - - - - - - uint8x16_t vqrshrun_high_n_s16 (uint8x8_t r, int16x8_t a, const int n) - A32: VQRSHRUN.S16 Dd+1, Dn, #n - A64: SQRSHRUN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vqrshrun_high_n_s32 (uint16x4_t r, int32x4_t a, const int n) - A32: VQRSHRUN.S32 Dd+1, Dn, #n - A64: SQRSHRUN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vqrshrun_high_n_s64 (uint32x2_t r, int64x2_t a, const int n) - A32: VQRSHRUN.S64 Dd+1, Dn, #n - A64: SQRSHRUN2 Vd.4S, Vn.2D, #n - - - - - - - - int16x8_t vqrshrn_high_n_s32 (int16x4_t r, int32x4_t a, const int n) - A32: VQRSHRN.S32 Dd+1, Dn, #n - A64: SQRSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - int32x4_t vqrshrn_high_n_s64 (int32x2_t r, int64x2_t a, const int n) - A32: VQRSHRN.S64 Dd+1, Dn, #n - A64: SQRSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - int8x16_t vqrshrn_high_n_s16 (int8x8_t r, int16x8_t a, const int n) - A32: VQRSHRN.S16 Dd+1, Dn, #n - A64: SQRSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - int64x1_t vrshr_n_s64 (int64x1_t a, const int n) - A32: VRSHR.S64 Dd, Dm, #n - A64: SRSHR Dd, Dn, #n - - - - - - - int64x1_t vshr_n_s64 (int64x1_t a, const int n) - A32: VSHR.S64 Dd, Dm, #n - A64: SSHR Dd, Dn, #n - - - - - - - uint8x16_t vshrq_n_u8 (uint8x16_t a, const int n) - A32: VSHR.U8 Qd, Qm, #n - A64: USHR Vd.16B, Vn.16B, #n - - - - - - - uint16x8_t vshrq_n_u16 (uint16x8_t a, const int n) - A32: VSHR.U16 Qd, Qm, #n - A64: USHR Vd.8H, Vn.8H, #n - - - - - - - uint32x4_t vshrq_n_u32 (uint32x4_t a, const int n) - A32: VSHR.U32 Qd, Qm, #n - A64: USHR Vd.4S, Vn.4S, #n - - - - - - - uint64x2_t vshrq_n_u64 (uint64x2_t a, const int n) - A32: VSHR.U64 Qd, Qm, #n - A64: USHR Vd.2D, Vn.2D, #n - - - - - - - uint8x16_t vshrq_n_u8 (uint8x16_t a, const int n) - A32: VSHR.U8 Qd, Qm, #n - A64: USHR Vd.16B, Vn.16B, #n - - - - - - - uint16x8_t vshrq_n_u16 (uint16x8_t a, const int n) - A32: VSHR.U16 Qd, Qm, #n - A64: USHR Vd.8H, Vn.8H, #n - - - - - - - uint32x4_t vshrq_n_u32 (uint32x4_t a, const int n) - A32: VSHR.U32 Qd, Qm, #n - A64: USHR Vd.4S, Vn.4S, #n - - - - - - - uint64x2_t vshrq_n_u64 (uint64x2_t a, const int n) - A32: VSHR.U64 Qd, Qm, #n - A64: USHR Vd.2D, Vn.2D, #n - - - - - - - uint8x8_t vshr_n_u8 (uint8x8_t a, const int n) - A32: VSHR.U8 Dd, Dm, #n - A64: USHR Vd.8B, Vn.8B, #n - - - - - - - uint16x4_t vshr_n_u16 (uint16x4_t a, const int n) - A32: VSHR.U16 Dd, Dm, #n - A64: USHR Vd.4H, Vn.4H, #n - - - - - - - uint32x2_t vshr_n_u32 (uint32x2_t a, const int n) - A32: VSHR.U32 Dd, Dm, #n - A64: USHR Vd.2S, Vn.2S, #n - - - - - - - uint8x8_t vshr_n_u8 (uint8x8_t a, const int n) - A32: VSHR.U8 Dd, Dm, #n - A64: USHR Vd.8B, Vn.8B, #n - - - - - - - uint16x4_t vshr_n_u16 (uint16x4_t a, const int n) - A32: VSHR.U16 Dd, Dm, #n - A64: USHR Vd.4H, Vn.4H, #n - - - - - - - uint32x2_t vshr_n_u32 (uint32x2_t a, const int n) - A32: VSHR.U32 Dd, Dm, #n - A64: USHR Vd.2S, Vn.2S, #n - - - - - - - uint8x16_t vsraq_n_u8 (uint8x16_t a, uint8x16_t b, const int n) - A32: VSRA.U8 Qd, Qm, #n - A64: USRA Vd.16B, Vn.16B, #n - - - - - - - - uint16x8_t vsraq_n_u16 (uint16x8_t a, uint16x8_t b, const int n) - A32: VSRA.U16 Qd, Qm, #n - A64: USRA Vd.8H, Vn.8H, #n - - - - - - - - uint32x4_t vsraq_n_u32 (uint32x4_t a, uint32x4_t b, const int n) - A32: VSRA.U32 Qd, Qm, #n - A64: USRA Vd.4S, Vn.4S, #n - - - - - - - - uint64x2_t vsraq_n_u64 (uint64x2_t a, uint64x2_t b, const int n) - A32: VSRA.U64 Qd, Qm, #n - A64: USRA Vd.2D, Vn.2D, #n - - - - - - - - uint8x16_t vsraq_n_u8 (uint8x16_t a, uint8x16_t b, const int n) - A32: VSRA.U8 Qd, Qm, #n - A64: USRA Vd.16B, Vn.16B, #n - - - - - - - - uint16x8_t vsraq_n_u16 (uint16x8_t a, uint16x8_t b, const int n) - A32: VSRA.U16 Qd, Qm, #n - A64: USRA Vd.8H, Vn.8H, #n - - - - - - - - uint32x4_t vsraq_n_u32 (uint32x4_t a, uint32x4_t b, const int n) - A32: VSRA.U32 Qd, Qm, #n - A64: USRA Vd.4S, Vn.4S, #n - - - - - - - - uint64x2_t vsraq_n_u64 (uint64x2_t a, uint64x2_t b, const int n) - A32: VSRA.U64 Qd, Qm, #n - A64: USRA Vd.2D, Vn.2D, #n - - - - - - - - uint8x8_t vsra_n_u8 (uint8x8_t a, uint8x8_t b, const int n) - A32: VSRA.U8 Dd, Dm, #n - A64: USRA Vd.8B, Vn.8B, #n - - - - - - - - uint16x4_t vsra_n_u16 (uint16x4_t a, uint16x4_t b, const int n) - A32: VSRA.U16 Dd, Dm, #n - A64: USRA Vd.4H, Vn.4H, #n - - - - - - - - uint32x2_t vsra_n_u32 (uint32x2_t a, uint32x2_t b, const int n) - A32: VSRA.U32 Dd, Dm, #n - A64: USRA Vd.2S, Vn.2S, #n - - - - - - - - uint8x8_t vsra_n_u8 (uint8x8_t a, uint8x8_t b, const int n) - A32: VSRA.U8 Dd, Dm, #n - A64: USRA Vd.8B, Vn.8B, #n - - - - - - - - uint16x4_t vsra_n_u16 (uint16x4_t a, uint16x4_t b, const int n) - A32: VSRA.U16 Dd, Dm, #n - A64: USRA Vd.4H, Vn.4H, #n - - - - - - - - uint32x2_t vsra_n_u32 (uint32x2_t a, uint32x2_t b, const int n) - A32: VSRA.U32 Dd, Dm, #n - A64: USRA Vd.2S, Vn.2S, #n - - - - - - - - uint64x1_t vsra_n_u64 (uint64x1_t a, uint64x1_t b, const int n) - A32: VSRA.U64 Dd, Dm, #n - A64: USRA Dd, Dn, #n - - - - - - - - uint64x1_t vsra_n_u64 (uint64x1_t a, uint64x1_t b, const int n) - A32: VSRA.U64 Dd, Dm, #n - A64: USRA Dd, Dn, #n - - - - - - - - int8x8_t vshrn_n_s16 (int16x8_t a, const int n) - A32: VSHRN.I16 Dd, Qm, #n - A64: SHRN Vd.8B, Vn.8H, #n - - - - - - - int16x4_t vshrn_n_s32 (int32x4_t a, const int n) - A32: VSHRN.I32 Dd, Qm, #n - A64: SHRN Vd.4H, Vn.4S, #n - - - - - - - int32x2_t vshrn_n_s64 (int64x2_t a, const int n) - A32: VSHRN.I64 Dd, Qm, #n - A64: SHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vshrn_n_u16 (uint16x8_t a, const int n) - A32: VSHRN.I16 Dd, Qm, #n - A64: SHRN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vshrn_n_u32 (uint32x4_t a, const int n) - A32: VSHRN.I32 Dd, Qm, #n - A64: SHRN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vshrn_n_u64 (uint64x2_t a, const int n) - A32: VSHRN.I64 Dd, Qm, #n - A64: SHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vqshrn_n_u16 (uint16x8_t a, const int n) - A32: VQSHRN.U16 Dd, Qm, #n - A64: UQSHRN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vqshrn_n_u32 (uint32x4_t a, const int n) - A32: VQSHRN.U32 Dd, Qm, #n - A64: UQSHRN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vqshrn_n_u64 (uint64x2_t a, const int n) - A32: VQSHRN.U64 Dd, Qm, #n - A64: UQSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vqshrn_n_u16 (uint16x8_t a, const int n) - A32: VQSHRN.U16 Dd, Qm, #n - A64: UQSHRN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vqshrn_n_u32 (uint32x4_t a, const int n) - A32: VQSHRN.U32 Dd, Qm, #n - A64: UQSHRN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vqshrn_n_u64 (uint64x2_t a, const int n) - A32: VQSHRN.U64 Dd, Qm, #n - A64: UQSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x16_t vqshrn_high_n_u16 (uint8x8_t r, uint16x8_t a, const int n) - A32: VQSHRN.U16 Dd+1, Qm, #n - A64: UQSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vqshrn_high_n_u32 (uint16x4_t r, uint32x4_t a, const int n) - A32: VQSHRN.U32 Dd+1, Qm, #n - A64: UQSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vqshrn_high_n_u64 (uint32x2_t r, uint64x2_t a, const int n) - A32: VQSHRN.U64 Dd+1, Qm, #n - A64: UQSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - uint8x16_t vqshrn_high_n_u16 (uint8x8_t r, uint16x8_t a, const int n) - A32: VQSHRN.U16 Dd+1, Qm, #n - A64: UQSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vqshrn_high_n_u32 (uint16x4_t r, uint32x4_t a, const int n) - A32: VQSHRN.U32 Dd+1, Qm, #n - A64: UQSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vqshrn_high_n_u64 (uint32x2_t r, uint64x2_t a, const int n) - A32: VQSHRN.U64 Dd+1, Qm, #n - A64: UQSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - uint8x16_t vshrn_high_n_u16 (uint8x8_t r, uint16x8_t a, const int n) - A32: VSHRN.I16 Dd+1, Qm, #n - A64: SHRN2 Vd.16B, Vn.8H, #n - - - - - - - - int16x8_t vshrn_high_n_s32 (int16x4_t r, int32x4_t a, const int n) - A32: VSHRN.I32 Dd+1, Qm, #n - A64: SHRN2 Vd.8H, Vn.4S, #n - - - - - - - - int32x4_t vshrn_high_n_s64 (int32x2_t r, int64x2_t a, const int n) - A32: VSHRN.I64 Dd+1, Qm, #n - A64: SHRN2 Vd.4S, Vn.2D, #n - - - - - - - - int8x16_t vshrn_high_n_s16 (int8x8_t r, int16x8_t a, const int n) - A32: VSHRN.I16 Dd+1, Qm, #n - A64: SHRN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vshrn_high_n_u32 (uint16x4_t r, uint32x4_t a, const int n) - A32: VSHRN.I32 Dd+1, Qm, #n - A64: SHRN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vshrn_high_n_u64 (uint32x2_t r, uint64x2_t a, const int n) - A32: VSHRN.I64 Dd+1, Qm, #n - A64: SHRN2 Vd.4S, Vn.2D, #n - - - - - - - - uint8x16_t vrshrq_n_u8 (uint8x16_t a, const int n) - A32: VRSHR.U8 Qd, Qm, #n - A64: URSHR Vd.16B, Vn.16B, #n - - - - - - - uint16x8_t vrshrq_n_u16 (uint16x8_t a, const int n) - A32: VRSHR.U16 Qd, Qm, #n - A64: URSHR Vd.8H, Vn.8H, #n - - - - - - - uint32x4_t vrshrq_n_u32 (uint32x4_t a, const int n) - A32: VRSHR.U32 Qd, Qm, #n - A64: URSHR Vd.4S, Vn.4S, #n - - - - - - - uint64x2_t vrshrq_n_u64 (uint64x2_t a, const int n) - A32: VRSHR.U64 Qd, Qm, #n - A64: URSHR Vd.2D, Vn.2D, #n - - - - - - - uint8x16_t vrshrq_n_u8 (uint8x16_t a, const int n) - A32: VRSHR.U8 Qd, Qm, #n - A64: URSHR Vd.16B, Vn.16B, #n - - - - - - - uint16x8_t vrshrq_n_u16 (uint16x8_t a, const int n) - A32: VRSHR.U16 Qd, Qm, #n - A64: URSHR Vd.8H, Vn.8H, #n - - - - - - - uint32x4_t vrshrq_n_u32 (uint32x4_t a, const int n) - A32: VRSHR.U32 Qd, Qm, #n - A64: URSHR Vd.4S, Vn.4S, #n - - - - - - - uint64x2_t vrshrq_n_u64 (uint64x2_t a, const int n) - A32: VRSHR.U64 Qd, Qm, #n - A64: URSHR Vd.2D, Vn.2D, #n - - - - - - - uint8x8_t vrshr_n_u8 (uint8x8_t a, const int n) - A32: VRSHR.U8 Dd, Dm, #n - A64: URSHR Vd.8B, Vn.8B, #n - - - - - - - uint16x4_t vrshr_n_u16 (uint16x4_t a, const int n) - A32: VRSHR.U16 Dd, Dm, #n - A64: URSHR Vd.4H, Vn.4H, #n - - - - - - - uint32x2_t vrshr_n_u32 (uint32x2_t a, const int n) - A32: VRSHR.U32 Dd, Dm, #n - A64: URSHR Vd.2S, Vn.2S, #n - - - - - - - uint8x8_t vrshr_n_u8 (uint8x8_t a, const int n) - A32: VRSHR.U8 Dd, Dm, #n - A64: URSHR Vd.8B, Vn.8B, #n - - - - - - - uint16x4_t vrshr_n_u16 (uint16x4_t a, const int n) - A32: VRSHR.U16 Dd, Dm, #n - A64: URSHR Vd.4H, Vn.4H, #n - - - - - - - uint32x2_t vrshr_n_u32 (uint32x2_t a, const int n) - A32: VRSHR.U32 Dd, Dm, #n - A64: URSHR Vd.2S, Vn.2S, #n - - - - - - - uint8x16_t vrsraq_n_u8 (uint8x16_t a, uint8x16_t b, const int n) - A32: VRSRA.U8 Qd, Qm, #n - A64: URSRA Vd.16B, Vn.16B, #n - - - - - - - - uint16x8_t vrsraq_n_u16 (uint16x8_t a, uint16x8_t b, const int n) - A32: VRSRA.U16 Qd, Qm, #n - A64: URSRA Vd.8H, Vn.8H, #n - - - - - - - - uint32x4_t vrsraq_n_u32 (uint32x4_t a, uint32x4_t b, const int n) - A32: VRSRA.U32 Qd, Qm, #n - A64: URSRA Vd.4S, Vn.4S, #n - - - - - - - - uint64x2_t vrsraq_n_u64 (uint64x2_t a, uint64x2_t b, const int n) - A32: VRSRA.U64 Qd, Qm, #n - A64: URSRA Vd.2D, Vn.2D, #n - - - - - - - - uint8x16_t vrsraq_n_u8 (uint8x16_t a, uint8x16_t b, const int n) - A32: VRSRA.U8 Qd, Qm, #n - A64: URSRA Vd.16B, Vn.16B, #n - - - - - - - - uint16x8_t vrsraq_n_u16 (uint16x8_t a, uint16x8_t b, const int n) - A32: VRSRA.U16 Qd, Qm, #n - A64: URSRA Vd.8H, Vn.8H, #n - - - - - - - - uint32x4_t vrsraq_n_u32 (uint32x4_t a, uint32x4_t b, const int n) - A32: VRSRA.U32 Qd, Qm, #n - A64: URSRA Vd.4S, Vn.4S, #n - - - - - - - - uint64x2_t vrsraq_n_u64 (uint64x2_t a, uint64x2_t b, const int n) - A32: VRSRA.U64 Qd, Qm, #n - A64: URSRA Vd.2D, Vn.2D, #n - - - - - - - - uint8x8_t vrsra_n_u8 (uint8x8_t a, uint8x8_t b, const int n) - A32: VRSRA.U8 Dd, Dm, #n - A64: URSRA Vd.8B, Vn.8B, #n - - - - - - - - uint16x4_t vrsra_n_u16 (uint16x4_t a, uint16x4_t b, const int n) - A32: VRSRA.U16 Dd, Dm, #n - A64: URSRA Vd.4H, Vn.4H, #n - - - - - - - - uint32x2_t vrsra_n_u32 (uint32x2_t a, uint32x2_t b, const int n) - A32: VRSRA.U32 Dd, Dm, #n - A64: URSRA Vd.2S, Vn.2S, #n - - - - - - - - uint8x8_t vrsra_n_u8 (uint8x8_t a, uint8x8_t b, const int n) - A32: VRSRA.U8 Dd, Dm, #n - A64: URSRA Vd.8B, Vn.8B, #n - - - - - - - - uint16x4_t vrsra_n_u16 (uint16x4_t a, uint16x4_t b, const int n) - A32: VRSRA.U16 Dd, Dm, #n - A64: URSRA Vd.4H, Vn.4H, #n - - - - - - - - uint32x2_t vrsra_n_u32 (uint32x2_t a, uint32x2_t b, const int n) - A32: VRSRA.U32 Dd, Dm, #n - A64: URSRA Vd.2S, Vn.2S, #n - - - - - - - - uint64x1_t vrsra_n_u64 (uint64x1_t a, uint64x1_t b, const int n) - A32: VRSRA.U64 Dd, Dm, #n - A64: URSRA Dd, Dn, #n - - - - - - - - uint64x1_t vrsra_n_u64 (uint64x1_t a, uint64x1_t b, const int n) - A32: VRSRA.U64 Dd, Dm, #n - A64: URSRA Dd, Dn, #n - - - - - - - - int8x8_t vrshrn_n_s16 (int16x8_t a, const int n) - A32: VRSHRN.I16 Dd, Qm, #n - A64: RSHRN Vd.8B, Vn.8H, #n - - - - - - - int16x4_t vrshrn_n_s32 (int32x4_t a, const int n) - A32: VRSHRN.I32 Dd, Qm, #n - A64: RSHRN Vd.4H, Vn.4S, #n - - - - - - - int32x2_t vrshrn_n_s64 (int64x2_t a, const int n) - A32: VRSHRN.I64 Dd, Qm, #n - A64: RSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vrshrn_n_u16 (uint16x8_t a, const int n) - A32: VRSHRN.I16 Dd, Qm, #n - A64: RSHRN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vrshrn_n_u32 (uint32x4_t a, const int n) - A32: VRSHRN.I32 Dd, Qm, #n - A64: RSHRN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vrshrn_n_u64 (uint64x2_t a, const int n) - A32: VRSHRN.I64 Dd, Qm, #n - A64: RSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vqrshrn_n_u16 (uint16x8_t a, const int n) - A32: VQRSHRN.U16 Dd, Qm, #n - A64: UQRSHRN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vqrshrn_n_u32 (uint32x4_t a, const int n) - A32: VQRSHRN.U32 Dd, Qm, #n - A64: UQRSHRN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vqrshrn_n_u64 (uint64x2_t a, const int n) - A32: VQRSHRN.U64 Dd, Qm, #n - A64: UQRSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x8_t vqrshrn_n_u16 (uint16x8_t a, const int n) - A32: VQRSHRN.U16 Dd, Qm, #n - A64: UQRSHRN Vd.8B, Vn.8H, #n - - - - - - - uint16x4_t vqrshrn_n_u32 (uint32x4_t a, const int n) - A32: VQRSHRN.U32 Dd, Qm, #n - A64: UQRSHRN Vd.4H, Vn.4S, #n - - - - - - - uint32x2_t vqrshrn_n_u64 (uint64x2_t a, const int n) - A32: VQRSHRN.U64 Dd, Qm, #n - A64: UQRSHRN Vd.2S, Vn.2D, #n - - - - - - - uint8x16_t vqrshrn_high_n_u16 (uint8x8_t r, uint16x8_t a, const int n) - A32: VQRSHRN.U16 Dd+1, Dn, #n - A64: UQRSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vqrshrn_high_n_u32 (uint16x4_t r, uint32x4_t a, const int n) - A32: VQRSHRN.U32 Dd+1, Dn, #n - A64: UQRSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vqrshrn_high_n_u64 (uint32x2_t r, uint64x2_t a, const int n) - A32: VQRSHRN.U64 Dd+1, Dn, #n - A64: UQRSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - uint8x16_t vqrshrn_high_n_u16 (uint8x8_t r, uint16x8_t a, const int n) - A32: VQRSHRN.U16 Dd+1, Dn, #n - A64: UQRSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vqrshrn_high_n_u32 (uint16x4_t r, uint32x4_t a, const int n) - A32: VQRSHRN.U32 Dd+1, Dn, #n - A64: UQRSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vqrshrn_high_n_u64 (uint32x2_t r, uint64x2_t a, const int n) - A32: VQRSHRN.U64 Dd+1, Dn, #n - A64: UQRSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - uint8x16_t vrshrn_high_n_u16 (uint8x8_t r, uint16x8_t a, const int n) - A32: VRSHRN.I16 Dd+1, Qm, #n - A64: RSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - int16x8_t vrshrn_high_n_s32 (int16x4_t r, int32x4_t a, const int n) - A32: VRSHRN.I32 Dd+1, Qm, #n - A64: RSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - int32x4_t vrshrn_high_n_s64 (int32x2_t r, int64x2_t a, const int n) - A32: VRSHRN.I64 Dd+1, Qm, #n - A64: RSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - int8x16_t vrshrn_high_n_s16 (int8x8_t r, int16x8_t a, const int n) - A32: VRSHRN.I16 Dd+1, Qm, #n - A64: RSHRN2 Vd.16B, Vn.8H, #n - - - - - - - - uint16x8_t vrshrn_high_n_u32 (uint16x4_t r, uint32x4_t a, const int n) - A32: VRSHRN.I32 Dd+1, Qm, #n - A64: RSHRN2 Vd.8H, Vn.4S, #n - - - - - - - - uint32x4_t vrshrn_high_n_u64 (uint32x2_t r, uint64x2_t a, const int n) - A32: VRSHRN.I64 Dd+1, Qm, #n - A64: RSHRN2 Vd.4S, Vn.2D, #n - - - - - - - - uint64x1_t vrshr_n_u64 (uint64x1_t a, const int n) - A32: VRSHR.U64 Dd, Dm, #n - A64: URSHR Dd, Dn, #n - - - - - - - uint64x1_t vrshr_n_u64 (uint64x1_t a, const int n) - A32: VRSHR.U64 Dd, Dm, #n - A64: URSHR Dd, Dn, #n - - - - - - - uint64x1_t vshr_n_u64 (uint64x1_t a, const int n) - A32: VSHR.U64 Dd, Dm, #n - A64: USHR Dd, Dn, #n - - - - - - - uint64x1_t vshr_n_u64 (uint64x1_t a, const int n) - A32: VSHR.U64 Dd, Dm, #n - A64: USHR Dd, Dn, #n - - - - - - - int32x4_t vmovl_s16 (int16x4_t a) - A32: VMOVL.S16 Qd, Dm - A64: SXTL Vd.4S, Vn.4H - - - - - - int64x2_t vmovl_s32 (int32x2_t a) - A32: VMOVL.S32 Qd, Dm - A64: SXTL Vd.2D, Vn.2S - - - - - - int16x8_t vmovl_s8 (int8x8_t a) - A32: VMOVL.S8 Qd, Dm - A64: SXTL Vd.8H, Vn.8B - - - - - - int32x4_t vmovl_high_s16 (int16x8_t a) - A32: VMOVL.S16 Qd, Dm+1 - A64: SXTL2 Vd.4S, Vn.8H - - - - - - int64x2_t vmovl_high_s32 (int32x4_t a) - A32: VMOVL.S32 Qd, Dm+1 - A64: SXTL2 Vd.2D, Vn.4S - - - - - - int16x8_t vmovl_high_s8 (int8x16_t a) - A32: VMOVL.S8 Qd, Dm+1 - A64: SXTL2 Vd.8H, Vn.16B - - - - - - float64x1_t vsqrt_f64 (float64x1_t a) - A32: VSQRT.F64 Dd, Dm - A64: FSQRT Dd, Dn - - - - - - float32_t vsqrts_f32 (float32_t a) - A32: VSQRT.F32 Sd, Sm - A64: FSQRT Sd, Sn The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - void vst1q_u8 (uint8_t * ptr, uint8x16_t val) - A32: VST1.8 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.16B }, [Xn] - - - - - - - void vst1_u8 (uint8_t * ptr, uint8x8_t val) - A32: VST1.8 { Dd }, [Rn] - A64: ST1 { Vt.8B }, [Xn] - - - - - - - void vst1q_f64 (float64_t * ptr, float64x2_t val) - A32: VST1.64 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.2D }, [Xn] - - - - - - - void vst1_f64 (float64_t * ptr, float64x1_t val) - A32: VST1.64 { Dd }, [Rn] - A64: ST1 { Vt.1D }, [Xn] - - - - - - - void vst1q_s16 (int16_t * ptr, int16x8_t val) - A32: VST1.16 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.8H }, [Xn] - - - - - - - void vst1_s16 (int16_t * ptr, int16x4_t val) - A32: VST1.16 { Dd }, [Rn] - A64: ST1 {Vt.4H }, [Xn] - - - - - - - void vst1q_s32 (int32_t * ptr, int32x4_t val) - A32: VST1.32 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.4S }, [Xn] - - - - - - - void vst1_s32 (int32_t * ptr, int32x2_t val) - A32: VST1.32 { Dd }, [Rn] - A64: ST1 { Vt.2S }, [Xn] - - - - - - - void vst1q_s64 (int64_t * ptr, int64x2_t val) - A32: VST1.64 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.2D }, [Xn] - - - - - - - void vst1_s64 (int64_t * ptr, int64x1_t val) - A32: VST1.64 { Dd }, [Rn] - A64: ST1 { Vt.1D }, [Xn] - - - - - - - void vst1q_s8 (int8_t * ptr, int8x16_t val) - A32: VST1.8 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.16B }, [Xn] - - - - - - - void vst1_s8 (int8_t * ptr, int8x8_t val) - A32: VST1.8 { Dd }, [Rn] - A64: ST1 { Vt.8B }, [Xn] - - - - - - - void vst1q_f32 (float32_t * ptr, float32x4_t val) - A32: VST1.32 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.4S }, [Xn] - - - - - - - void vst1_f32 (float32_t * ptr, float32x2_t val) - A32: VST1.32 { Dd }, [Rn] - A64: ST1 { Vt.2S }, [Xn] - - - - - - - void vst1q_u16 (uint16_t * ptr, uint16x8_t val) - A32: VST1.16 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.8H }, [Xn] - - - - - - - void vst1_u16 (uint16_t * ptr, uint16x4_t val) - A32: VST1.16 { Dd }, [Rn] - A64: ST1 { Vt.4H }, [Xn] - - - - - - - void vst1q_u32 (uint32_t * ptr, uint32x4_t val) - A32: VST1.32 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.4S }, [Xn] - - - - - - - void vst1_u32 (uint32_t * ptr, uint32x2_t val) - A32: VST1.32 { Dd }, [Rn] - A64: ST1 { Vt.2S }, [Xn] - - - - - - - void vst1q_u64 (uint64_t * ptr, uint64x2_t val) - A32: VST1.64 { Dd, Dd+1 }, [Rn] - A64: ST1 { Vt.2D }, [Xn] - - - - - - - void vst1_u64 (uint64_t * ptr, uint64x1_t val) - A32: VST1.64 { Dd }, [Rn] - A64: ST1 { Vt.1D }, [Xn] - - - - - - - void vst1q_lane_u8 (uint8_t * ptr, uint8x16_t val, const int lane) - A32: VST1.8 { Dd[index] }, [Rn] - A64: ST1 { Vt.B }[index], [Xn] - - - - - - - - void vst1_lane_u8 (uint8_t * ptr, uint8x8_t val, const int lane) - A32: VST1.8 { Dd[index] }, [Rn] - A64: ST1 { Vt.B }[index], [Xn] - - - - - - - - void vst1q_lane_f64 (float64_t * ptr, float64x2_t val, const int lane) - A32: VSTR.64 Dd, [Rn] - A64: ST1 { Vt.D }[index], [Xn] - - - - - - - - void vst1q_lane_s16 (int16_t * ptr, int16x8_t val, const int lane) - A32: VST1.16 { Dd[index] }, [Rn] - A64: ST1 { Vt.H }[index], [Xn] - - - - - - - - void vst1_lane_s16 (int16_t * ptr, int16x4_t val, const int lane) - A32: VST1.16 { Dd[index] }, [Rn] - A64: ST1 { Vt.H }[index], [Xn] - - - - - - - - void vst1q_lane_s32 (int32_t * ptr, int32x4_t val, const int lane) - A32: VST1.32 { Dd[index] }, [Rn] - A64: ST1 { Vt.S }[index], [Xn] - - - - - - - - void vst1_lane_s32 (int32_t * ptr, int32x2_t val, const int lane) - A32: VST1.32 { Dd[index] }, [Rn] - A64: ST1 { Vt.S }[index], [Xn] - - - - - - - - void vst1q_lane_s64 (int64_t * ptr, int64x2_t val, const int lane) - A32: VSTR.64 Dd, [Rn] - A64: ST1 { Vt.D }[index], [Xn] - - - - - - - - void vst1q_lane_s8 (int8_t * ptr, int8x16_t val, const int lane) - A32: VST1.8 { Dd[index] }, [Rn] - A64: ST1 { Vt.B }[index], [Xn] - - - - - - - - void vst1_lane_s8 (int8_t * ptr, int8x8_t val, const int lane) - A32: VST1.8 { Dd[index] }, [Rn] - A64: ST1 { Vt.B }[index], [Xn] - - - - - - - - void vst1q_lane_f32 (float32_t * ptr, float32x4_t val, const int lane) - A32: VST1.32 { Dd[index] }, [Rn] - A64: ST1 { Vt.S }[index], [Xn] - - - - - - - - void vst1_lane_f32 (float32_t * ptr, float32x2_t val, const int lane) - A32: VST1.32 { Dd[index] }, [Rn] - A64: ST1 { Vt.S }[index], [Xn] - - - - - - - - void vst1q_lane_u16 (uint16_t * ptr, uint16x8_t val, const int lane) - A32: VST1.16 { Dd[index] }, [Rn] - A64: ST1 { Vt.H }[index], [Xn] - - - - - - - - void vst1_lane_u16 (uint16_t * ptr, uint16x4_t val, const int lane) - A32: VST1.16 { Dd[index] }, [Rn] - A64: ST1 { Vt.H }[index], [Xn] - - - - - - - - void vst1q_lane_u32 (uint32_t * ptr, uint32x4_t val, const int lane) - A32: VST1.32 { Dd[index] }, [Rn] - A64: ST1 { Vt.S }[index], [Xn] - - - - - - - - void vst1_lane_u32 (uint32_t * ptr, uint32x2_t val, const int lane) - A32: VST1.32 { Dd[index] }, [Rn] - A64: ST1 { Vt.S }[index], [Xn] - - - - - - - - void vst1q_lane_u64 (uint64_t * ptr, uint64x2_t val, const int lane) - A32: VSTR.64 Dd, [Rn] - A64: ST1 { Vt.D }[index], [Xn] - - - - - - - - uint8x16_t vsubq_u8 (uint8x16_t a, uint8x16_t b) - A32: VSUB.I8 Qd, Qn, Qm - A64: SUB Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vsubq_s16 (int16x8_t a, int16x8_t b) - A32: VSUB.I16 Qd, Qn, Qm - A64: SUB Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vsubq_s32 (int32x4_t a, int32x4_t b) - A32: VSUB.I32 Qd, Qn, Qm - A64: SUB Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vsubq_s64 (int64x2_t a, int64x2_t b) - A32: VSUB.I64 Qd, Qn, Qm - A64: SUB Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vsubq_s8 (int8x16_t a, int8x16_t b) - A32: VSUB.I8 Qd, Qn, Qm - A64: SUB Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vsubq_f32 (float32x4_t a, float32x4_t b) - A32: VSUB.F32 Qd, Qn, Qm - A64: FSUB Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vsubq_u16 (uint16x8_t a, uint16x8_t b) - A32: VSUB.I16 Qd, Qn, Qm - A64: SUB Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vsubq_u32 (uint32x4_t a, uint32x4_t b) - A32: VSUB.I32 Qd, Qn, Qm - A64: SUB Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vsubq_u64 (uint64x2_t a, uint64x2_t b) - A32: VSUB.I64 Qd, Qn, Qm - A64: SUB Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vsub_u8 (uint8x8_t a, uint8x8_t b) - A32: VSUB.I8 Dd, Dn, Dm - A64: SUB Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vsub_s16 (int16x4_t a, int16x4_t b) - A32: VSUB.I16 Dd, Dn, Dm - A64: SUB Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vsub_s32 (int32x2_t a, int32x2_t b) - A32: VSUB.I32 Dd, Dn, Dm - A64: SUB Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vsub_s8 (int8x8_t a, int8x8_t b) - A32: VSUB.I8 Dd, Dn, Dm - A64: SUB Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vsub_f32 (float32x2_t a, float32x2_t b) - A32: VSUB.F32 Dd, Dn, Dm - A64: FSUB Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vsub_u16 (uint16x4_t a, uint16x4_t b) - A32: VSUB.I16 Dd, Dn, Dm - A64: SUB Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vsub_u32 (uint32x2_t a, uint32x2_t b) - A32: VSUB.I32 Dd, Dn, Dm - A64: SUB Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vsubhn_s16 (int16x8_t a, int16x8_t b) - A32: VSUBHN.I16 Dd, Qn, Qm - A64: SUBHN Vd.8B, Vn.8H, Vm.8H - - - - - - - int16x4_t vsubhn_s32 (int32x4_t a, int32x4_t b) - A32: VSUBHN.I32 Dd, Qn, Qm - A64: SUBHN Vd.4H, Vn.4S, Vm.4S - - - - - - - int32x2_t vsubhn_s64 (int64x2_t a, int64x2_t b) - A32: VSUBHN.I64 Dd, Qn, Qm - A64: SUBHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x8_t vsubhn_u16 (uint16x8_t a, uint16x8_t b) - A32: VSUBHN.I16 Dd, Qn, Qm - A64: SUBHN Vd.8B, Vn.8H, Vm.8H - - - - - - - uint16x4_t vsubhn_u32 (uint32x4_t a, uint32x4_t b) - A32: VSUBHN.I32 Dd, Qn, Qm - A64: SUBHN Vd.4H, Vn.4S, Vm.4S - - - - - - - uint32x2_t vsubhn_u64 (uint64x2_t a, uint64x2_t b) - A32: VSUBHN.I64 Dd, Qn, Qm - A64: SUBHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x16_t vsubhn_high_u16 (uint8x8_t r, uint16x8_t a, uint16x8_t b) - A32: VSUBHN.I16 Dd+1, Qn, Qm - A64: SUBHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - int16x8_t vsubhn_high_s32 (int16x4_t r, int32x4_t a, int32x4_t b) - A32: VSUBHN.I32 Dd+1, Qn, Qm - A64: SUBHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - int32x4_t vsubhn_high_s64 (int32x2_t r, int64x2_t a, int64x2_t b) - A32: VSUBHN.I64 Dd+1, Qn, Qm - A64: SUBHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - int8x16_t vsubhn_high_s16 (int8x8_t r, int16x8_t a, int16x8_t b) - A32: VSUBHN.I16 Dd+1, Qn, Qm - A64: SUBHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - uint16x8_t vsubhn_high_u32 (uint16x4_t r, uint32x4_t a, uint32x4_t b) - A32: VSUBHN.I32 Dd+1, Qn, Qm - A64: SUBHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - uint32x4_t vsubhn_high_u64 (uint32x2_t r, uint64x2_t a, uint64x2_t b) - A32: VSUBHN.I64 Dd+1, Qn, Qm - A64: SUBHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - int8x8_t vrsubhn_s16 (int16x8_t a, int16x8_t b) - A32: VRSUBHN.I16 Dd, Qn, Qm - A64: RSUBHN Vd.8B, Vn.8H, Vm.8H - - - - - - - int16x4_t vrsubhn_s32 (int32x4_t a, int32x4_t b) - A32: VRSUBHN.I32 Dd, Qn, Qm - A64: RSUBHN Vd.4H, Vn.4S, Vm.4S - - - - - - - int32x2_t vrsubhn_s64 (int64x2_t a, int64x2_t b) - A32: VRSUBHN.I64 Dd, Qn, Qm - A64: RSUBHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x8_t vrsubhn_u16 (uint16x8_t a, uint16x8_t b) - A32: VRSUBHN.I16 Dd, Qn, Qm - A64: RSUBHN Vd.8B, Vn.8H, Vm.8H - - - - - - - uint16x4_t vrsubhn_u32 (uint32x4_t a, uint32x4_t b) - A32: VRSUBHN.I32 Dd, Qn, Qm - A64: RSUBHN Vd.4H, Vn.4S, Vm.4S - - - - - - - uint32x2_t vrsubhn_u64 (uint64x2_t a, uint64x2_t b) - A32: VRSUBHN.I64 Dd, Qn, Qm - A64: RSUBHN Vd.2S, Vn.2D, Vm.2D - - - - - - - uint8x16_t vrsubhn_high_u16 (uint8x8_t r, uint16x8_t a, uint16x8_t b) - A32: VRSUBHN.I16 Dd+1, Qn, Qm - A64: RSUBHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - int16x8_t vrsubhn_high_s32 (int16x4_t r, int32x4_t a, int32x4_t b) - A32: VRSUBHN.I32 Dd+1, Qn, Qm - A64: RSUBHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - int32x4_t vrsubhn_high_s64 (int32x2_t r, int64x2_t a, int64x2_t b) - A32: VRSUBHN.I64 Dd+1, Qn, Qm - A64: RSUBHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - int8x16_t vrsubhn_high_s16 (int8x8_t r, int16x8_t a, int16x8_t b) - A32: VRSUBHN.I16 Dd+1, Qn, Qm - A64: RSUBHN2 Vd.16B, Vn.8H, Vm.8H - - - - - - - - uint16x8_t vrsubhn_high_u32 (uint16x4_t r, uint32x4_t a, uint32x4_t b) - A32: VRSUBHN.I32 Dd+1, Qn, Qm - A64: RSUBHN2 Vd.8H, Vn.4S, Vm.4S - - - - - - - - uint32x4_t vrsubhn_high_u64 (uint32x2_t r, uint64x2_t a, uint64x2_t b) - A32: VRSUBHN.I64 Dd+1, Qn, Qm - A64: RSUBHN2 Vd.4S, Vn.2D, Vm.2D - - - - - - - - uint8x16_t vqsubq_u8 (uint8x16_t a, uint8x16_t b) - A32: VQSUB.U8 Qd, Qn, Qm - A64: UQSUB Vd.16B, Vn.16B, Vm.16B - - - - - - - int16x8_t vqsubq_s16 (int16x8_t a, int16x8_t b) - A32: VQSUB.S16 Qd, Qn, Qm - A64: SQSUB Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vqsubq_s32 (int32x4_t a, int32x4_t b) - A32: VQSUB.S32 Qd, Qn, Qm - A64: SQSUB Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vqsubq_s64 (int64x2_t a, int64x2_t b) - A32: VQSUB.S64 Qd, Qn, Qm - A64: SQSUB Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vqsubq_s8 (int8x16_t a, int8x16_t b) - A32: VQSUB.S8 Qd, Qn, Qm - A64: SQSUB Vd.16B, Vn.16B, Vm.16B - - - - - - - uint16x8_t vqsubq_u16 (uint16x8_t a, uint16x8_t b) - A32: VQSUB.U16 Qd, Qn, Qm - A64: UQSUB Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vqsubq_u32 (uint32x4_t a, uint32x4_t b) - A32: VQSUB.U32 Qd, Qn, Qm - A64: UQSUB Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vqsubq_u64 (uint64x2_t a, uint64x2_t b) - A32: VQSUB.U64 Qd, Qn, Qm - A64: UQSUB Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vqsub_u8 (uint8x8_t a, uint8x8_t b) - A32: VQSUB.U8 Dd, Dn, Dm - A64: UQSUB Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vqsub_s16 (int16x4_t a, int16x4_t b) - A32: VQSUB.S16 Dd, Dn, Dm - A64: SQSUB Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vqsub_s32 (int32x2_t a, int32x2_t b) - A32: VQSUB.S32 Dd, Dn, Dm - A64: SQSUB Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vqsub_s8 (int8x8_t a, int8x8_t b) - A32: VQSUB.S8 Dd, Dn, Dm - A64: SQSUB Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x4_t vqsub_u16 (uint16x4_t a, uint16x4_t b) - A32: VQSUB.U16 Dd, Dn, Dm - A64: UQSUB Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vqsub_u32 (uint32x2_t a, uint32x2_t b) - A32: VQSUB.U32 Dd, Dn, Dm - A64: UQSUB Vd.2S, Vn.2S, Vm.2S - - - - - - - int64x1_t vqsub_s64 (int64x1_t a, int64x1_t b) - A32: VQSUB.S64 Dd, Dn, Dm - A64: SQSUB Dd, Dn, Dm - - - - - - - uint64x1_t vqsub_u64 (uint64x1_t a, uint64x1_t b) - A32: VQSUB.U64 Dd, Dn, Dm - A64: UQSUB Dd, Dn, Dm - - - - - - - float64x1_t vsub_f64 (float64x1_t a, float64x1_t b) - A32: VSUB.F64 Dd, Dn, Dm - A64: FSUB Dd, Dn, Dm - - - - - - - int64x1_t vsub_s64 (int64x1_t a, int64x1_t b) - A32: VSUB.I64 Dd, Dn, Dm - A64: SUB Dd, Dn, Dm - - - - - - - float32_t vsubs_f32 (float32_t a, float32_t b) - A32: VSUB.F32 Sd, Sn, Sm - A64: FSUB Sd, Sn, Sm The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint64x1_t vsub_u64 (uint64x1_t a, uint64x1_t b) - A32: VSUB.I64 Dd, Dn, Dm - A64: SUB Dd, Dn, Dm - - - - - - - int16x8_t vsubw_s8 (int16x8_t a, int8x8_t b) - A32: VSUBW.S8 Qd, Qn, Dm - A64: SSUBW Vd.8H, Vn.8H, Vm.8B - - - - - - - int32x4_t vsubw_s16 (int32x4_t a, int16x4_t b) - A32: VSUBW.S16 Qd, Qn, Dm - A64: SSUBW Vd.4S, Vn.4S, Vm.4H - - - - - - - int64x2_t vsubw_s32 (int64x2_t a, int32x2_t b) - A32: VSUBW.S32 Qd, Qn, Dm - A64: SSUBW Vd.2D, Vn.2D, Vm.2S - - - - - - - uint16x8_t vsubw_u8 (uint16x8_t a, uint8x8_t b) - A32: VSUBW.U8 Qd, Qn, Dm - A64: USUBW Vd.8H, Vn.8H, Vm.8B - - - - - - - uint32x4_t vsubw_u16 (uint32x4_t a, uint16x4_t b) - A32: VSUBW.U16 Qd, Qn, Dm - A64: USUBW Vd.4S, Vn.4S, Vm.4H - - - - - - - uint64x2_t vsubw_u32 (uint64x2_t a, uint32x2_t b) - A32: VSUBW.U32 Qd, Qn, Dm - A64: USUBW Vd.2D, Vn.2D, Vm.2S - - - - - - - uint16x8_t vsubl_u8 (uint8x8_t a, uint8x8_t b) - A32: VSUBL.U8 Qd, Dn, Dm - A64: USUBL Vd.8H, Vn.8B, Vm.8B - - - - - - - int32x4_t vsubl_s16 (int16x4_t a, int16x4_t b) - A32: VSUBL.S16 Qd, Dn, Dm - A64: SSUBL Vd.4S, Vn.4H, Vm.4H - - - - - - - int64x2_t vsubl_s32 (int32x2_t a, int32x2_t b) - A32: VSUBL.S32 Qd, Dn, Dm - A64: SSUBL Vd.2D, Vn.2S, Vm.2S - - - - - - - int16x8_t vsubl_s8 (int8x8_t a, int8x8_t b) - A32: VSUBL.S8 Qd, Dn, Dm - A64: SSUBL Vd.8H, Vn.8B, Vm.8B - - - - - - - uint32x4_t vsubl_u16 (uint16x4_t a, uint16x4_t b) - A32: VSUBL.U16 Qd, Dn, Dm - A64: USUBL Vd.4S, Vn.4H, Vm.4H - - - - - - - uint64x2_t vsubl_u32 (uint32x2_t a, uint32x2_t b) - A32: VSUBL.U32 Qd, Dn, Dm - A64: USUBL Vd.2D, Vn.2S, Vm.2S - - - - - - - uint16x8_t vsubl_high_u8 (uint8x16_t a, uint8x16_t b) - A32: VSUBL.U8 Qd, Dn+1, Dm+1 - A64: USUBL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - int32x4_t vsubl_high_s16 (int16x8_t a, int16x8_t b) - A32: VSUBL.S16 Qd, Dn+1, Dm+1 - A64: SSUBL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - int16x8_t vsubw_high_s8 (int16x8_t a, int8x16_t b) - A32: VSUBW.S8 Qd, Qn, Dm+1 - A64: SSUBW2 Vd.8H, Vn.8H, Vm.16B - - - - - - - int32x4_t vsubw_high_s16 (int32x4_t a, int16x8_t b) - A32: VSUBW.S16 Qd, Qn, Dm+1 - A64: SSUBW2 Vd.4S, Vn.4S, Vm.8H - - - - - - - int64x2_t vsubl_high_s32 (int32x4_t a, int32x4_t b) - A32: VSUBL.S32 Qd, Dn+1, Dm+1 - A64: SSUBL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - int64x2_t vsubw_high_s32 (int64x2_t a, int32x4_t b) - A32: VSUBW.S32 Qd, Qn, Dm+1 - A64: SSUBW2 Vd.2D, Vn.2D, Vm.4S - - - - - - - int16x8_t vsubl_high_s8 (int8x16_t a, int8x16_t b) - A32: VSUBL.S8 Qd, Dn+1, Dm+1 - A64: SSUBL2 Vd.8H, Vn.16B, Vm.16B - - - - - - - uint16x8_t vsubw_high_u8 (uint16x8_t a, uint8x16_t b) - A32: VSUBW.U8 Qd, Qn, Dm+1 - A64: USUBW2 Vd.8H, Vn.8H, Vm.16B - - - - - - - uint32x4_t vsubl_high_u16 (uint16x8_t a, uint16x8_t b) - A32: VSUBL.U16 Qd, Dn+1, Dm+1 - A64: USUBL2 Vd.4S, Vn.8H, Vm.8H - - - - - - - uint32x4_t vsubw_high_u16 (uint32x4_t a, uint16x8_t b) - A32: VSUBW.U16 Qd, Qn, Dm+1 - A64: USUBW2 Vd.4S, Vn.4S, Vm.8H - - - - - - - uint64x2_t vsubl_high_u32 (uint32x4_t a, uint32x4_t b) - A32: VSUBL.U32 Qd, Dn+1, Dm+1 - A64: USUBL2 Vd.2D, Vn.4S, Vm.4S - - - - - - - uint64x2_t vsubw_high_u32 (uint64x2_t a, uint32x4_t b) - A32: VSUBW.U32 Qd, Qn, Dm+1 - A64: USUBW2 Vd.2D, Vn.2D, Vm.4S - - - - - - - uint8x8_t vqvtbl1_u8(uint8x16_t t, uint8x8_t idx) - A32: VTBL Dd, {Dn, Dn+1}, Dm - A64: TBL Vd.8B, {Vn.16B}, Vm.8B - - - - - - - int8x8_t vqvtbl1_s8(int8x16_t t, uint8x8_t idx) - A32: VTBL Dd, {Dn, Dn+1}, Dm - A64: TBL Vd.8B, {Vn.16B}, Vm.8B - - - - - - - uint8x8_t vqvtbx1_u8(uint8x8_t r, uint8x16_t t, uint8x8_t idx) - A32: VTBX Dd, {Dn, Dn+1}, Dm - A64: TBX Vd.8B, {Vn.16B}, Vm.8B - - - - - - - - int8x8_t vqvtbx1_s8(int8x8_t r, int8x16_t t, uint8x8_t idx) - A32: VTBX Dd, {Dn, Dn+1}, Dm - A64: TBX Vd.8B, {Vn.16B}, Vm.8B - - - - - - - - uint8x16_t veorq_u8 (uint8x16_t a, uint8x16_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t veorq_f64 (float64x2_t a, float64x2_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x8_t veorq_s16 (int16x8_t a, int16x8_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - int32x4_t veorq_s32 (int32x4_t a, int32x4_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - int64x2_t veorq_s64 (int64x2_t a, int64x2_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - int8x16_t veorq_s8 (int8x16_t a, int8x16_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t veorq_f32 (float32x4_t a, float32x4_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x8_t veorq_u16 (uint16x8_t a, uint16x8_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - uint32x4_t veorq_u32 (uint32x4_t a, uint32x4_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - uint64x2_t veorq_u64 (uint64x2_t a, uint64x2_t b) - A32: VEOR Qd, Qn, Qm - A64: EOR Vd.16B, Vn.16B, Vm.16B - - - - - - - uint8x8_t veor_u8 (uint8x8_t a, uint8x8_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - float64x1_t veor_f64 (float64x1_t a, float64x1_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - int16x4_t veor_s16 (int16x4_t a, int16x4_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - int32x2_t veor_s32 (int32x2_t a, int32x2_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - int64x1_t veor_s64 (int64x1_t a, int64x1_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - int8x8_t veor_s8 (int8x8_t a, int8x8_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t veor_f32 (float32x2_t a, float32x2_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint16x4_t veor_u16 (uint16x4_t a, uint16x4_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - uint32x2_t veor_u32 (uint32x2_t a, uint32x2_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - uint64x1_t veor_u64 (uint64x1_t a, uint64x1_t b) - A32: VEOR Dd, Dn, Dm - A64: EOR Vd.8B, Vn.8B, Vm.8B - - - - - - - uint16x8_t vmovl_u8 (uint8x8_t a) - A32: VMOVL.U8 Qd, Dm - A64: UXTL Vd.8H, Vn.8B - - - - - - uint32x4_t vmovl_u16 (uint16x4_t a) - A32: VMOVL.U16 Qd, Dm - A64: UXTL Vd.4S, Vn.4H - - - - - - uint64x2_t vmovl_u32 (uint32x2_t a) - A32: VMOVL.U32 Qd, Dm - A64: UXTL Vd.2D, Vn.2S - - - - - - uint16x8_t vmovl_u8 (uint8x8_t a) - A32: VMOVL.U8 Qd, Dm - A64: UXTL Vd.8H, Vn.8B - - - - - - uint32x4_t vmovl_u16 (uint16x4_t a) - A32: VMOVL.U16 Qd, Dm - A64: UXTL Vd.4S, Vn.4H - - - - - - uint64x2_t vmovl_u32 (uint32x2_t a) - A32: VMOVL.U32 Qd, Dm - A64: UXTL Vd.2D, Vn.2S - - - - - - uint16x8_t vmovl_high_u8 (uint8x16_t a) - A32: VMOVL.U8 Qd, Dm+1 - A64: UXTL2 Vd.8H, Vn.16B - - - - - - uint32x4_t vmovl_high_u16 (uint16x8_t a) - A32: VMOVL.U16 Qd, Dm+1 - A64: UXTL2 Vd.4S, Vn.8H - - - - - - uint64x2_t vmovl_high_u32 (uint32x4_t a) - A32: VMOVL.U32 Qd, Dm+1 - A64: UXTL2 Vd.2D, Vn.4S - - - - - - uint16x8_t vmovl_high_u8 (uint8x16_t a) - A32: VMOVL.U8 Qd, Dm+1 - A64: UXTL2 Vd.8H, Vn.16B - - - - - - uint32x4_t vmovl_high_u16 (uint16x8_t a) - A32: VMOVL.U16 Qd, Dm+1 - A64: UXTL2 Vd.4S, Vn.8H - - - - - - uint64x2_t vmovl_high_u32 (uint32x4_t a) - A32: VMOVL.U32 Qd, Dm+1 - A64: UXTL2 Vd.2D, Vn.4S - - - - - - - - float64x2_t vabsq_f64 (float64x2_t a) - A64: FABS Vd.2D, Vn.2D - - - - - - int64x2_t vabsq_s64 (int64x2_t a) - A64: ABS Vd.2D, Vn.2D - - - - - - uint64x2_t vcagtq_f64 (float64x2_t a, float64x2_t b) - A64: FACGT Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcageq_f64 (float64x2_t a, float64x2_t b) - A64: FACGE Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x1_t vcage_f64 (float64x1_t a, float64x1_t b) - A64: FACGE Dd, Dn, Dm - - - - - - - uint32_t vcages_f32 (float32_t a, float32_t b) - A64: FACGE Sd, Sn, Sm - - - - - - - uint64x1_t vcagt_f64 (float64x1_t a, float64x1_t b) - A64: FACGT Dd, Dn, Dm - - - - - - - uint32_t vcagts_f32 (float32_t a, float32_t b) - A64: FACGT Sd, Sn, Sm - - - - - - - uint64x2_t vcaltq_f64 (float64x2_t a, float64x2_t b) - A64: FACGT Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcaleq_f64 (float64x2_t a, float64x2_t b) - A64: FACGE Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x1_t vcale_f64 (float64x1_t a, float64x1_t b) - A64: FACGE Dd, Dn, Dm - - - - - - - uint32_t vcales_f32 (float32_t a, float32_t b) - A64: FACGE Sd, Sn, Sm - - - - - - - uint64x1_t vcalt_f64 (float64x1_t a, float64x1_t b) - A64: FACGT Dd, Dn, Dm - - - - - - - uint32_t vcalts_f32 (float32_t a, float32_t b) - A64: FACGT Sd, Sn, Sm - - - - - - - float64x2_t vabdq_f64 (float64x2_t a, float64x2_t b) - A64: FABD Vd.2D, Vn.2D, Vm.2D - - - - - - - float64x1_t vabd_f64 (float64x1_t a, float64x1_t b) - A64: FABD Dd, Dn, Dm - - - - - - - float32_t vabds_f32 (float32_t a, float32_t b) - A64: FABD Sd, Sn, Sm - - - - - - - int64x2_t vqabsq_s64 (int64x2_t a) - A64: SQABS Vd.2D, Vn.2D - - - - - - int16_t vqabsh_s16 (int16_t a) - A64: SQABS Hd, Hn - - - - - - int32_t vqabss_s32 (int32_t a) - A64: SQABS Sd, Sn - - - - - - int64_t vqabsd_s64 (int64_t a) - A64: SQABS Dd, Dn - - - - - - int8_t vqabsb_s8 (int8_t a) - A64: SQABS Bd, Bn - - - - - - int64x1_t vabs_s64 (int64x1_t a) - A64: ABS Dd, Dn - - - - - - float64x2_t vaddq_f64 (float64x2_t a, float64x2_t b) - A64: FADD Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8_t vaddvq_u8 (uint8x16_t a) - A64: ADDV Bd, Vn.16B - - - - - - int16_t vaddvq_s16 (int16x8_t a) - A64: ADDV Hd, Vn.8H - - - - - - int32_t vaddvq_s32 (int32x4_t a) - A64: ADDV Sd, Vn.4S - - - - - - int8_t vaddvq_s8 (int8x16_t a) - A64: ADDV Bd, Vn.16B - - - - - - uint16_t vaddvq_u16 (uint16x8_t a) - A64: ADDV Hd, Vn.8H - - - - - - uint32_t vaddvq_u32 (uint32x4_t a) - A64: ADDV Sd, Vn.4S - - - - - - uint8_t vaddv_u8 (uint8x8_t a) - A64: ADDV Bd, Vn.8B - - - - - - int16_t vaddv_s16 (int16x4_t a) - A64: ADDV Hd, Vn.4H - - - - - - int8_t vaddv_s8 (int8x8_t a) - A64: ADDV Bd, Vn.8B - - - - - - uint16_t vaddv_u16 (uint16x4_t a) - A64: ADDV Hd, Vn.4H - - - - - - uint16_t vaddlvq_u8 (uint8x16_t a) - A64: UADDLV Hd, Vn.16B - - - - - - int32_t vaddlvq_s16 (int16x8_t a) - A64: SADDLV Sd, Vn.8H - - - - - - int64_t vaddlvq_s32 (int32x4_t a) - A64: SADDLV Dd, Vn.4S - - - - - - int16_t vaddlvq_s8 (int8x16_t a) - A64: SADDLV Hd, Vn.16B - - - - - - uint32_t vaddlvq_u16 (uint16x8_t a) - A64: UADDLV Sd, Vn.8H - - - - - - uint64_t vaddlvq_u32 (uint32x4_t a) - A64: UADDLV Dd, Vn.4S - - - - - - uint16_t vaddlv_u8 (uint8x8_t a) - A64: UADDLV Hd, Vn.8B - - - - - - int32_t vaddlv_s16 (int16x4_t a) - A64: SADDLV Sd, Vn.4H - - - - - - int16_t vaddlv_s8 (int8x8_t a) - A64: SADDLV Hd, Vn.8B - - - - - - uint32_t vaddlv_u16 (uint16x4_t a) - A64: UADDLV Sd, Vn.4H - - - - - - uint8x16_t vpaddq_u8 (uint8x16_t a, uint8x16_t b) - A64: ADDP Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vpaddq_f64 (float64x2_t a, float64x2_t b) - A64: FADDP Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vpaddq_s16 (int16x8_t a, int16x8_t b) - A64: ADDP Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vpaddq_s32 (int32x4_t a, int32x4_t b) - A64: ADDP Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vpaddq_s64 (int64x2_t a, int64x2_t b) - A64: ADDP Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vpaddq_s8 (int8x16_t a, int8x16_t b) - A64: ADDP Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vpaddq_f32 (float32x4_t a, float32x4_t b) - A64: FADDP Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vpaddq_u16 (uint16x8_t a, uint16x8_t b) - A64: ADDP Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vpaddq_u32 (uint32x4_t a, uint32x4_t b) - A64: ADDP Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vpaddq_u64 (uint64x2_t a, uint64x2_t b) - A64: ADDP Vd.2D, Vn.2D, Vm.2D - - - - - - - float64_t vpaddd_f64 (float64x2_t a) - A64: FADDP Dd, Vn.2D - - - - - - int64_t vpaddd_s64 (int64x2_t a) - A64: ADDP Dd, Vn.2D - - - - - - uint64_t vpaddd_u64 (uint64x2_t a) - A64: ADDP Dd, Vn.2D - - - - - - float32_t vpadds_f32 (float32x2_t a) - A64: FADDP Sd, Vn.2S - - - - - - uint8x16_t vsqaddq_u8 (uint8x16_t a, int8x16_t b) - A64: USQADD Vd.16B, Vn.16B - - - - - - - int16x8_t vuqaddq_s16 (int16x8_t a, uint16x8_t b) - A64: SUQADD Vd.8H, Vn.8H - - - - - - - int32x4_t vuqaddq_s32 (int32x4_t a, uint32x4_t b) - A64: SUQADD Vd.4S, Vn.4S - - - - - - - int64x2_t vuqaddq_s64 (int64x2_t a, uint64x2_t b) - A64: SUQADD Vd.2D, Vn.2D - - - - - - - int8x16_t vuqaddq_s8 (int8x16_t a, uint8x16_t b) - A64: SUQADD Vd.16B, Vn.16B - - - - - - - uint16x8_t vsqaddq_u16 (uint16x8_t a, int16x8_t b) - A64: USQADD Vd.8H, Vn.8H - - - - - - - uint32x4_t vsqaddq_u32 (uint32x4_t a, int32x4_t b) - A64: USQADD Vd.4S, Vn.4S - - - - - - - uint64x2_t vsqaddq_u64 (uint64x2_t a, int64x2_t b) - A64: USQADD Vd.2D, Vn.2D - - - - - - - uint8x8_t vsqadd_u8 (uint8x8_t a, int8x8_t b) - A64: USQADD Vd.8B, Vn.8B - - - - - - - int16x4_t vuqadd_s16 (int16x4_t a, uint16x4_t b) - A64: SUQADD Vd.4H, Vn.4H - - - - - - - int32x2_t vuqadd_s32 (int32x2_t a, uint32x2_t b) - A64: SUQADD Vd.2S, Vn.2S - - - - - - - int8x8_t vuqadd_s8 (int8x8_t a, uint8x8_t b) - A64: SUQADD Vd.8B, Vn.8B - - - - - - - uint16x4_t vsqadd_u16 (uint16x4_t a, int16x4_t b) - A64: USQADD Vd.4H, Vn.4H - - - - - - - uint32x2_t vsqadd_u32 (uint32x2_t a, int32x2_t b) - A64: USQADD Vd.2S, Vn.2S - - - - - - - uint8_t vqaddb_u8 (uint8_t a, uint8_t b) - A64: UQADD Bd, Bn, Bm - - - - - - - uint8_t vsqaddb_u8 (uint8_t a, int8_t b) - A64: USQADD Bd, Bn - - - - - - - int16_t vqaddh_s16 (int16_t a, int16_t b) - A64: SQADD Hd, Hn, Hm - - - - - - - int16_t vuqaddh_s16 (int16_t a, uint16_t b) - A64: SUQADD Hd, Hn - - - - - - - int32_t vqadds_s32 (int32_t a, int32_t b) - A64: SQADD Sd, Sn, Sm - - - - - - - int32_t vuqadds_s32 (int32_t a, uint32_t b) - A64: SUQADD Sd, Sn - - - - - - - int64x1_t vuqadd_s64 (int64x1_t a, uint64x1_t b) - A64: SUQADD Dd, Dn - - - - - - - int8_t vuqaddb_s8 (int8_t a, uint8_t b) - A64: SUQADD Bd, Bn - - - - - - - int8_t vqaddb_s8 (int8_t a, int8_t b) - A64: SQADD Bd, Bn, Bm - - - - - - - uint16_t vsqaddh_u16 (uint16_t a, int16_t b) - A64: USQADD Hd, Hn - - - - - - - uint16_t vqaddh_u16 (uint16_t a, uint16_t b) - A64: UQADD Hd, Hn, Hm - - - - - - - uint32_t vsqadds_u32 (uint32_t a, int32_t b) - A64: USQADD Sd, Sn - - - - - - - uint32_t vqadds_u32 (uint32_t a, uint32_t b) - A64: UQADD Sd, Sn, Sm - - - - - - - uint64x1_t vsqadd_u64 (uint64x1_t a, int64x1_t b) - A64: USQADD Dd, Dn - - - - - - - float64x2_t vrndpq_f64 (float64x2_t a) - A64: FRINTP Vd.2D, Vn.2D - - - - - - uint64x2_t vceqq_f64 (float64x2_t a, float64x2_t b) - A64: FCMEQ Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vceqq_s64 (int64x2_t a, int64x2_t b) - A64: CMEQ Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vceqq_u64 (uint64x2_t a, uint64x2_t b) - A64: CMEQ Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x1_t vceq_f64 (float64x1_t a, float64x1_t b) - A64: FCMEQ Dd, Dn, Dm - - - - - - - uint64x1_t vceq_s64 (int64x1_t a, int64x1_t b) - A64: CMEQ Dd, Dn, Dm - - - - - - - uint32_t vceqs_f32 (float32_t a, float32_t b) - A64: FCMEQ Sd, Sn, Sm - - - - - - - uint64x1_t vceq_u64 (uint64x1_t a, uint64x1_t b) - A64: CMEQ Dd, Dn, Dm - - - - - - - uint64x2_t vcgtq_f64 (float64x2_t a, float64x2_t b) - A64: FCMGT Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcgtq_s64 (int64x2_t a, int64x2_t b) - A64: CMGT Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcgtq_u64 (uint64x2_t a, uint64x2_t b) - A64: CMHI Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcgeq_f64 (float64x2_t a, float64x2_t b) - A64: FCMGE Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcgeq_s64 (int64x2_t a, int64x2_t b) - A64: CMGE Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcgeq_u64 (uint64x2_t a, uint64x2_t b) - A64: CMHS Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x1_t vcge_f64 (float64x1_t a, float64x1_t b) - A64: FCMGE Dd, Dn, Dm - - - - - - - uint64x1_t vcge_s64 (int64x1_t a, int64x1_t b) - A64: CMGE Dd, Dn, Dm - - - - - - - uint32_t vcges_f32 (float32_t a, float32_t b) - A64: FCMGE Sd, Sn, Sm - - - - - - - uint64x1_t vcge_u64 (uint64x1_t a, uint64x1_t b) - A64: CMHS Dd, Dn, Dm - - - - - - - uint64x1_t vcgt_f64 (float64x1_t a, float64x1_t b) - A64: FCMGT Dd, Dn, Dm - - - - - - - uint64x1_t vcgt_s64 (int64x1_t a, int64x1_t b) - A64: CMGT Dd, Dn, Dm - - - - - - - uint32_t vcgts_f32 (float32_t a, float32_t b) - A64: FCMGT Sd, Sn, Sm - - - - - - - uint64x1_t vcgt_u64 (uint64x1_t a, uint64x1_t b) - A64: CMHI Dd, Dn, Dm - - - - - - - uint64x2_t vcltq_f64 (float64x2_t a, float64x2_t b) - A64: FCMGT Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcltq_s64 (int64x2_t a, int64x2_t b) - A64: CMGT Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcltq_u64 (uint64x2_t a, uint64x2_t b) - A64: CMHI Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcleq_f64 (float64x2_t a, float64x2_t b) - A64: FCMGE Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcleq_s64 (int64x2_t a, int64x2_t b) - A64: CMGE Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vcleq_u64 (uint64x2_t a, uint64x2_t b) - A64: CMHS Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x1_t vcle_f64 (float64x1_t a, float64x1_t b) - A64: FCMGE Dd, Dn, Dm - - - - - - - uint64x1_t vcle_s64 (int64x1_t a, int64x1_t b) - A64: CMGE Dd, Dn, Dm - - - - - - - uint32_t vcles_f32 (float32_t a, float32_t b) - A64: FCMGE Sd, Sn, Sm - - - - - - - uint64x1_t vcle_u64 (uint64x1_t a, uint64x1_t b) - A64: CMHS Dd, Dn, Dm - - - - - - - uint64x1_t vclt_f64 (float64x1_t a, float64x1_t b) - A64: FCMGT Dd, Dn, Dm - - - - - - - uint64x1_t vclt_s64 (int64x1_t a, int64x1_t b) - A64: CMGT Dd, Dn, Dm - - - - - - - uint32_t vclts_f32 (float32_t a, float32_t b) - A64: FCMGT Sd, Sn, Sm - - - - - - - uint64x1_t vclt_u64 (uint64x1_t a, uint64x1_t b) - A64: CMHI Dd, Dn, Dm - - - - - - - uint64x2_t vtstq_f64 (float64x2_t a, float64x2_t b) - A64: CMTST Vd.2D, Vn.2D, Vm.2D The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint64x2_t vtstq_s64 (int64x2_t a, int64x2_t b) - A64: CMTST Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x2_t vtstq_u64 (uint64x2_t a, uint64x2_t b) - A64: CMTST Vd.2D, Vn.2D, Vm.2D - - - - - - - uint64x1_t vtst_f64 (float64x1_t a, float64x1_t b) - A64: CMTST Dd, Dn, Dm The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - uint64x1_t vtst_s64 (int64x1_t a, int64x1_t b) - A64: CMTST Dd, Dn, Dm - - - - - - - uint64x1_t vtst_u64 (uint64x1_t a, uint64x1_t b) - A64: CMTST Dd, Dn, Dm - - - - - - - float64x2_t vcvtq_f64_s64 (int64x2_t a) - A64: SCVTF Vd.2D, Vn.2D - - - - - - float64x2_t vcvtq_f64_u64 (uint64x2_t a) - A64: UCVTF Vd.2D, Vn.2D - - - - - - float64x2_t vcvt_f64_f32 (float32x2_t a) - A64: FCVTL Vd.2D, Vn.2S - - - - - - float64x1_t vcvt_f64_s64 (int64x1_t a) - A64: SCVTF Dd, Dn - - - - - - float64x1_t vcvt_f64_u64 (uint64x1_t a) - A64: UCVTF Dd, Dn - - - - - - float64x2_t vcvt_high_f64_f32 (float32x4_t a) - A64: FCVTL2 Vd.2D, Vn.4S - - - - - - int64x2_t vcvtaq_s64_f64 (float64x2_t a) - A64: FCVTAS Vd.2D, Vn.2D - - - - - - int64x1_t vcvta_s64_f64 (float64x1_t a) - A64: FCVTAS Dd, Dn - - - - - - int64x2_t vcvtnq_s64_f64 (float64x2_t a) - A64: FCVTNS Vd.2D, Vn.2D - - - - - - int64x1_t vcvtn_s64_f64 (float64x1_t a) - A64: FCVTNS Dd, Dn - - - - - - int64x2_t vcvtmq_s64_f64 (float64x2_t a) - A64: FCVTMS Vd.2D, Vn.2D - - - - - - int64x1_t vcvtm_s64_f64 (float64x1_t a) - A64: FCVTMS Dd, Dn - - - - - - int64x2_t vcvtpq_s64_f64 (float64x2_t a) - A64: FCVTPS Vd.2D, Vn.2D - - - - - - int64x1_t vcvtp_s64_f64 (float64x1_t a) - A64: FCVTPS Dd, Dn - - - - - - int64x2_t vcvtq_s64_f64 (float64x2_t a) - A64: FCVTZS Vd.2D, Vn.2D - - - - - - int64x1_t vcvt_s64_f64 (float64x1_t a) - A64: FCVTZS Dd, Dn - - - - - - float32x2_t vcvt_f32_f64 (float64x2_t a) - A64: FCVTN Vd.2S, Vn.2D - - - - - - float32x2_t vcvtx_f32_f64 (float64x2_t a) - A64: FCVTXN Vd.2S, Vn.2D - - - - - - float32x4_t vcvtx_high_f32_f64 (float32x2_t r, float64x2_t a) - A64: FCVTXN2 Vd.4S, Vn.2D - - - - - - - float32x4_t vcvt_high_f32_f64 (float32x2_t r, float64x2_t a) - A64: FCVTN2 Vd.4S, Vn.2D - - - - - - - uint64x2_t vcvtaq_u64_f64 (float64x2_t a) - A64: FCVTAU Vd.2D, Vn.2D - - - - - - uint64x1_t vcvta_u64_f64 (float64x1_t a) - A64: FCVTAU Dd, Dn - - - - - - uint64x2_t vcvtnq_u64_f64 (float64x2_t a) - A64: FCVTNU Vd.2D, Vn.2D - - - - - - uint64x1_t vcvtn_u64_f64 (float64x1_t a) - A64: FCVTNU Dd, Dn - - - - - - uint64x2_t vcvtmq_u64_f64 (float64x2_t a) - A64: FCVTMU Vd.2D, Vn.2D - - - - - - uint64x1_t vcvtm_u64_f64 (float64x1_t a) - A64: FCVTMU Dd, Dn - - - - - - uint64x2_t vcvtpq_u64_f64 (float64x2_t a) - A64: FCVTPU Vd.2D, Vn.2D - - - - - - uint64x1_t vcvtp_u64_f64 (float64x1_t a) - A64: FCVTPU Dd, Dn - - - - - - uint64x2_t vcvtq_u64_f64 (float64x2_t a) - A64: FCVTZU Vd.2D, Vn.2D - - - - - - uint64x1_t vcvt_u64_f64 (float64x1_t a) - A64: FCVTZU Dd, Dn - - - - - - float64x2_t vdivq_f64 (float64x2_t a, float64x2_t b) - A64: FDIV Vd.2D, Vn.2D, Vm.2D - - - - - - - float32x4_t vdivq_f32 (float32x4_t a, float32x4_t b) - A64: FDIV Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vdiv_f32 (float32x2_t a, float32x2_t b) - A64: FDIV Vd.2S, Vn.2S, Vm.2S - - - - - - - float64x2_t vdupq_laneq_f64 (float64x2_t vec, const int lane) - A64: DUP Vd.2D, Vn.D[index] - - - - - - - int64x2_t vdupq_laneq_s64 (int64x2_t vec, const int lane) - A64: DUP Vd.2D, Vn.D[index] - - - - - - - uint64x2_t vdupq_laneq_u64 (uint64x2_t vec, const int lane) - A64: DUP Vd.2D, Vn.D[index] - - - - - - - float64x2_t vdupq_n_f64 (float64_t value) - A64: DUP Vd.2D, Vn.D[0] - - - - - - int64x2_t vdupq_n_s64 (int64_t value) - A64: DUP Vd.2D, Rn - - - - - - uint64x2_t vdupq_n_s64 (uint64_t value) - A64: DUP Vd.2D, Rn - - - - - int8_t vqmovnh_s16 (int16_t a) A64: SQXTN Bd, Hn - - - - int16_t vqmovns_s32 (int32_t a) A64: SQXTN Hd, Sn - - - - int32_t vqmovnd_s64 (int64_t a) A64: SQXTN Sd, Dn - - - - uint8_t vqmovnh_u16 (uint16_t a) A64: UQXTN Bd, Hn - - - - uint16_t vqmovns_u32 (uint32_t a) A64: UQXTN Hd, Sn - - - - uint32_t vqmovnd_u64 (uint64_t a) A64: UQXTN Sd, Dn - - - - uint8_t vqmovunh_s16 (int16_t a) A64: SQXTUN Bd, Hn - - - - uint16_t vqmovuns_s32 (int32_t a) A64: SQXTUN Hd, Sn - - - - uint32_t vqmovund_s64 (int64_t a) A64: SQXTUN Sd, Dn - - - - - float64x2_t vrndmq_f64 (float64x2_t a) - A64: FRINTM Vd.2D, Vn.2D - - - - - - float64x2_t vfmaq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) - A64: FMLA Vd.2D, Vn.2D, Vm.2D - - - - - - - - float64x2_t vfmaq_n_f64 (float64x2_t a, float64x2_t b, float64_t n) - A64: FMLA Vd.2D, Vn.2D, Vm.D[0] - - - - - - - - float32x4_t vfmaq_n_f32 (float32x4_t a, float32x4_t b, float32_t n) - A64: FMLA Vd.4S, Vn.4S, Vm.S[0] - - - - - - - - float32x2_t vfma_n_f32 (float32x2_t a, float32x2_t b, float32_t n) - A64: FMLA Vd.2S, Vn.2S, Vm.S[0] - - - - - - - - float64x2_t vfmaq_laneq_f64 (float64x2_t a, float64x2_t b, float64x2_t v, const int lane) - A64: FMLA Vd.2D, Vn.2D, Vm.D[lane] - - - - - - - - - float32x4_t vfmaq_laneq_f32 (float32x4_t a, float32x4_t b, float32x4_t v, const int lane) - A64: FMLA Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - float32x4_t vfmaq_lane_f32 (float32x4_t a, float32x4_t b, float32x2_t v, const int lane) - A64: FMLA Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - float32x2_t vfma_laneq_f32 (float32x2_t a, float32x2_t b, float32x4_t v, const int lane) - A64: FMLA Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - float32x2_t vfma_lane_f32 (float32x2_t a, float32x2_t b, float32x2_t v, const int lane) - A64: FMLA Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - float64_t vfmad_laneq_f64 (float64_t a, float64_t b, float64x2_t v, const int lane) - A64: FMLA Dd, Dn, Vm.D[lane] - - - - - - - - - float32_t vfmas_laneq_f32 (float32_t a, float32_t b, float32x4_t v, const int lane) - A64: FMLA Sd, Sn, Vm.S[lane] - - - - - - - - - float32_t vfmas_lane_f32 (float32_t a, float32_t b, float32x2_t v, const int lane) - A64: FMLA Sd, Sn, Vm.S[lane] - - - - - - - - - float64x2_t vfmsq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) - A64: FMLS Vd.2D, Vn.2D, Vm.2D - - - - - - - - float64x2_t vfmsq_n_f64 (float64x2_t a, float64x2_t b, float64_t n) - A64: FMLS Vd.2D, Vn.2D, Vm.D[0] - - - - - - - - float32x4_t vfmsq_n_f32 (float32x4_t a, float32x4_t b, float32_t n) - A64: FMLS Vd.4S, Vn.4S, Vm.S[0] - - - - - - - - float32x2_t vfms_n_f32 (float32x2_t a, float32x2_t b, float32_t n) - A64: FMLS Vd.2S, Vn.2S, Vm.S[0] - - - - - - - - float64x2_t vfmsq_laneq_f64 (float64x2_t a, float64x2_t b, float64x2_t v, const int lane) - A64: FMLS Vd.2D, Vn.2D, Vm.D[lane] - - - - - - - - - float32x4_t vfmsq_laneq_f32 (float32x4_t a, float32x4_t b, float32x4_t v, const int lane) - A64: FMLS Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - float32x4_t vfmsq_lane_f32 (float32x4_t a, float32x4_t b, float32x2_t v, const int lane) - A64: FMLS Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - - float32x2_t vfms_laneq_f32 (float32x2_t a, float32x2_t b, float32x4_t v, const int lane) - A64: FMLS Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - float32x2_t vfms_lane_f32 (float32x2_t a, float32x2_t b, float32x2_t v, const int lane) - A64: FMLS Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - float64_t vfmsd_laneq_f64 (float64_t a, float64_t b, float64x2_t v, const int lane) - A64: FMLS Dd, Dn, Vm.D[lane] - - - - - - - - - float32_t vfmss_laneq_f32 (float32_t a, float32_t b, float32x4_t v, const int lane) - A64: FMLS Sd, Sn, Vm.S[lane] - - - - - - - - - float32_t vfmss_lane_f32 (float32_t a, float32_t b, float32x2_t v, const int lane) - A64: FMLS Sd, Sn, Vm.S[lane] - - - - - - - - - uint8x16_t vcopyq_laneq_u8 (uint8x16_t a, const int lane1, uint8x16_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - uint8x16_t vcopyq_lane_u8 (uint8x16_t a, const int lane1, uint8x8_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - float64x2_t vcopyq_laneq_f64 (float64x2_t a, const int lane1, float64x2_t b, const int lane2) - A64: INS Vd.D[lane1], Vn.D[lane2] - - - - - - - - - int16x8_t vcopyq_laneq_s16 (int16x8_t a, const int lane1, int16x8_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - int16x8_t vcopyq_lane_s16 (int16x8_t a, const int lane1, int16x4_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - int32x4_t vcopyq_laneq_s32 (int32x4_t a, const int lane1, int32x4_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - int32x4_t vcopyq_lane_s32 (int32x4_t a, const int lane1, int32x2_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - int64x2_t vcopyq_laneq_s64 (int64x2_t a, const int lane1, int64x2_t b, const int lane2) - A64: INS Vd.D[lane1], Vn.D[lane2] - - - - - - - - - int8x16_t vcopyq_laneq_s8 (int8x16_t a, const int lane1, int8x16_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - int8x16_t vcopyq_lane_s8 (int8x16_t a, const int lane1, int8x8_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - float32x4_t vcopyq_laneq_f32 (float32x4_t a, const int lane1, float32x4_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - float32x4_t vcopyq_lane_f32 (float32x4_t a, const int lane1, float32x2_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - uint16x8_t vcopyq_laneq_u16 (uint16x8_t a, const int lane1, uint16x8_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - uint16x8_t vcopyq_lane_u16 (uint16x8_t a, const int lane1, uint16x4_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - uint32x4_t vcopyq_laneq_u32 (uint32x4_t a, const int lane1, uint32x4_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - uint32x4_t vcopyq_lane_u32 (uint32x4_t a, const int lane1, uint32x2_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - uint64x2_t vcopyq_laneq_u64 (uint64x2_t a, const int lane1, uint64x2_t b, const int lane2) - A64: INS Vd.D[lane1], Vn.D[lane2] - - - - - - - - - uint8x8_t vcopy_laneq_u8 (uint8x8_t a, const int lane1, uint8x16_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - uint8x8_t vcopy_lane_u8 (uint8x8_t a, const int lane1, uint8x8_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - int16x4_t vcopy_laneq_s16 (int16x4_t a, const int lane1, int16x8_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - int16x4_t vcopy_lane_s16 (int16x4_t a, const int lane1, int16x4_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - int32x2_t vcopy_laneq_s32 (int32x2_t a, const int lane1, int32x4_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - int32x2_t vcopy_lane_s32 (int32x2_t a, const int lane1, int32x2_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - int8x8_t vcopy_laneq_s8 (int8x8_t a, const int lane1, int8x16_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - int8x8_t vcopy_lane_s8 (int8x8_t a, const int lane1, int8x8_t b, const int lane2) - A64: INS Vd.B[lane1], Vn.B[lane2] - - - - - - - - - float32x2_t vcopy_laneq_f32 (float32x2_t a, const int lane1, float32x4_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - float32x2_t vcopy_lane_f32 (float32x2_t a, const int lane1, float32x2_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - uint16x4_t vcopy_laneq_u16 (uint16x4_t a, const int lane1, uint16x8_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - uint16x4_t vcopy_lane_u16 (uint16x4_t a, const int lane1, uint16x4_t b, const int lane2) - A64: INS Vd.H[lane1], Vn.H[lane2] - - - - - - - - - uint32x2_t vcopy_laneq_u32 (uint32x2_t a, const int lane1, uint32x4_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - uint32x2_t vcopy_lane_u32 (uint32x2_t a, const int lane1, uint32x2_t b, const int lane2) - A64: INS Vd.S[lane1], Vn.S[lane2] - - - - - - - - - float64x2_t vld1q_dup_f64 (float64_t const * ptr) - A64: LD1R { Vt.2D }, [Xn] - - - - - - int64x2_t vld1q_dup_s64 (int64_t const * ptr) - A64: LD1R { Vt.2D }, [Xn] - - - - - - uint64x2_t vld1q_dup_u64 (uint64_t const * ptr) - A64: LD1R { Vt.2D }, [Xn] - - - - - - float64x2_t vmaxq_f64 (float64x2_t a, float64x2_t b) - A64: FMAX Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8_t vmaxvq_u8 (uint8x16_t a) - A64: UMAXV Bd, Vn.16B - - - - - - int16_t vmaxvq_s16 (int16x8_t a) - A64: SMAXV Hd, Vn.8H - - - - - - int32_t vmaxvq_s32 (int32x4_t a) - A64: SMAXV Sd, Vn.4S - - - - - - int8_t vmaxvq_s8 (int8x16_t a) - A64: SMAXV Bd, Vn.16B - - - - - - float32_t vmaxvq_f32 (float32x4_t a) - A64: FMAXV Sd, Vn.4S - - - - - - uint16_t vmaxvq_u16 (uint16x8_t a) - A64: UMAXV Hd, Vn.8H - - - - - - uint32_t vmaxvq_u32 (uint32x4_t a) - A64: UMAXV Sd, Vn.4S - - - - - - uint8_t vmaxv_u8 (uint8x8_t a) - A64: UMAXV Bd, Vn.8B - - - - - - int16_t vmaxv_s16 (int16x4_t a) - A64: SMAXV Hd, Vn.4H - - - - - - int8_t vmaxv_s8 (int8x8_t a) - A64: SMAXV Bd, Vn.8B - - - - - - uint16_t vmaxv_u16 (uint16x4_t a) - A64: UMAXV Hd, Vn.4H - - - - - - float64x2_t vmaxnmq_f64 (float64x2_t a, float64x2_t b) - A64: FMAXNM Vd.2D, Vn.2D, Vm.2D - - - - - - - float32_t vmaxnmvq_f32 (float32x4_t a) - A64: FMAXNMV Sd, Vn.4S - - - - - - float64x2_t vpmaxnmq_f64 (float64x2_t a, float64x2_t b) - A64: FMAXNMP Vd.2D, Vn.2D, Vm.2D - - - - - - - float32x4_t vpmaxnmq_f32 (float32x4_t a, float32x4_t b) - A64: FMAXNMP Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vpmaxnm_f32 (float32x2_t a, float32x2_t b) - A64: FMAXNMP Vd.2S, Vn.2S, Vm.2S - - - - - - - float64_t vpmaxnmqd_f64 (float64x2_t a) - A64: FMAXNMP Dd, Vn.2D - - - - - - float32_t vpmaxnms_f32 (float32x2_t a) - A64: FMAXNMP Sd, Vn.2S - - - - - - uint8x16_t vpmaxq_u8 (uint8x16_t a, uint8x16_t b) - A64: UMAXP Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vpmaxq_f64 (float64x2_t a, float64x2_t b) - A64: FMAXP Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vpmaxq_s16 (int16x8_t a, int16x8_t b) - A64: SMAXP Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vpmaxq_s32 (int32x4_t a, int32x4_t b) - A64: SMAXP Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vpmaxq_s8 (int8x16_t a, int8x16_t b) - A64: SMAXP Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vpmaxq_f32 (float32x4_t a, float32x4_t b) - A64: FMAXP Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vpmaxq_u16 (uint16x8_t a, uint16x8_t b) - A64: UMAXP Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vpmaxq_u32 (uint32x4_t a, uint32x4_t b) - A64: UMAXP Vd.4S, Vn.4S, Vm.4S - - - - - - - float64_t vpmaxqd_f64 (float64x2_t a) - A64: FMAXP Dd, Vn.2D - - - - - - float32_t vpmaxs_f32 (float32x2_t a) - A64: FMAXP Sd, Vn.2S - - - - - - float64x1_t vmax_f64 (float64x1_t a, float64x1_t b) - A64: FMAX Dd, Dn, Dm - - - - - - - float32_t vmaxs_f32 (float32_t a, float32_t b) - A64: FMAX Sd, Sn, Sm The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - float64x2_t vminq_f64 (float64x2_t a, float64x2_t b) - A64: FMIN Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8_t vminvq_u8 (uint8x16_t a) - A64: UMINV Bd, Vn.16B - - - - - - int16_t vminvq_s16 (int16x8_t a) - A64: SMINV Hd, Vn.8H - - - - - - int32_t vaddvq_s32 (int32x4_t a) - A64: SMINV Sd, Vn.4S - - - - - - int8_t vminvq_s8 (int8x16_t a) - A64: SMINV Bd, Vn.16B - - - - - - float32_t vminvq_f32 (float32x4_t a) - A64: FMINV Sd, Vn.4S - - - - - - uint16_t vminvq_u16 (uint16x8_t a) - A64: UMINV Hd, Vn.8H - - - - - - uint32_t vminvq_u32 (uint32x4_t a) - A64: UMINV Sd, Vn.4S - - - - - - uint8_t vminv_u8 (uint8x8_t a) - A64: UMINV Bd, Vn.8B - - - - - - int16_t vminv_s16 (int16x4_t a) - A64: SMINV Hd, Vn.4H - - - - - - int8_t vminv_s8 (int8x8_t a) - A64: SMINV Bd, Vn.8B - - - - - - uint16_t vminv_u16 (uint16x4_t a) - A64: UMINV Hd, Vn.4H - - - - - - float64x2_t vminnmq_f64 (float64x2_t a, float64x2_t b) - A64: FMINNM Vd.2D, Vn.2D, Vm.2D - - - - - - - float32_t vminnmvq_f32 (float32x4_t a) - A64: FMINNMV Sd, Vn.4S - - - - - - float64x2_t vpminnmq_f64 (float64x2_t a, float64x2_t b) - A64: FMINNMP Vd.2D, Vn.2D, Vm.2D - - - - - - - float32x4_t vpminnmq_f32 (float32x4_t a, float32x4_t b) - A64: FMINNMP Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vpminnm_f32 (float32x2_t a, float32x2_t b) - A64: FMINNMP Vd.2S, Vn.2S, Vm.2S - - - - - - - float64_t vpminnmqd_f64 (float64x2_t a) - A64: FMINNMP Dd, Vn.2D - - - - - - float32_t vpminnms_f32 (float32x2_t a) - A64: FMINNMP Sd, Vn.2S - - - - - - uint8x16_t vpminq_u8 (uint8x16_t a, uint8x16_t b) - A64: UMINP Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vpminq_f64 (float64x2_t a, float64x2_t b) - A64: FMINP Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vpminq_s16 (int16x8_t a, int16x8_t b) - A64: SMINP Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vpminq_s32 (int32x4_t a, int32x4_t b) - A64: SMINP Vd.4S, Vn.4S, Vm.4S - - - - - - - int8x16_t vpminq_s8 (int8x16_t a, int8x16_t b) - A64: SMINP Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vpminq_f32 (float32x4_t a, float32x4_t b) - A64: FMINP Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vpminq_u16 (uint16x8_t a, uint16x8_t b) - A64: UMINP Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vpminq_u32 (uint32x4_t a, uint32x4_t b) - A64: UMINP Vd.4S, Vn.4S, Vm.4S - - - - - - - float64_t vpminqd_f64 (float64x2_t a) - A64: FMINP Dd, Vn.2D - - - - - - float32_t vpmins_f32 (float32x2_t a) - A64: FMINP Sd, Vn.2S - - - - - - float64x1_t vmin_f64 (float64x1_t a, float64x1_t b) - A64: FMIN Dd, Dn, Dm - - - - - - - float32_t vmins_f32 (float32_t a, float32_t b) - A64: FMIN Sd, Sn, Sm The above native signature does not exist. We provide this additional overload for consistency with the other scalar APIs. - - - - - - - float64x2_t vmulq_f64 (float64x2_t a, float64x2_t b) - A64: FMUL Vd.2D, Vn.2D, Vm.2D - - - - - - - float64x2_t vmulq_n_f64 (float64x2_t a, float64_t b) - A64: FMUL Vd.2D, Vn.2D, Vm.D[0] - - - - - - - float64x2_t vmulq_laneq_f64 (float64x2_t a, float64x2_t v, const int lane) - A64: FMUL Vd.2D, Vn.2D, Vm.D[lane] - - - - - - - int16_t vqdmulhh_s16 (int16_t a, int16_t b) A64: SQDMULH Hd, Hn, Hm - - - - - int32_t vqdmulhs_s32 (int32_t a, int32_t b) A64: SQDMULH Sd, Sn, Sm - - - - - int16_t vqdmulhh_laneq_s16 (int16_t a, int16x8_t v, const int lane) A64: SQDMULH Hd, Hn, Vm.H[lane] - - - - - - int16_t vqdmulhh_lane_s16 (int16_t a, int16x4_t v, const int lane) A64: SQDMULH Hd, Hn, Vm.H[lane] - - - - - - int32_t vqdmulhs_laneq_s32 (int32_t a, int32x4_t v, const int lane) A64: SQDMULH Sd, Sn, Vm.S[lane] - - - - - - int32_t vqdmulhs_lane_s32 (int32_t a, int32x2_t v, const int lane) A64: SQDMULH Sd, Sn, Vm.S[lane] - - - - - - int32_t vqdmlalh_s16 (int32_t a, int16_t b, int16_t c) A64: SQDMLAL Sd, Hn, Hm - - - - - - int64_t vqdmlals_s32 (int64_t a, int32_t b, int32_t c) A64: SQDMLAL Dd, Sn, Sm - - - - - - int32_t vqdmlslh_s16 (int32_t a, int16_t b, int16_t c) A64: SQDMLSL Sd, Hn, Hm - - - - - - int64_t vqdmlsls_s32 (int64_t a, int32_t b, int32_t c) A64: SQDMLSL Dd, Sn, Sm - - - - - - int32_t vqdmullh_s16 (int16_t a, int16_t b) A64: SQDMULL Sd, Hn, Hm - - - - - int64_t vqdmulls_s32 (int32_t a, int32_t b) A64: SQDMULL Dd, Sn, Sm - - - - - int32_t vqdmullh_laneq_s16 (int16_t a, int16x8_t v, const int lane) A64: SQDMULL Sd, Hn, Vm.H[lane] - - - - - - int32_t vqdmullh_lane_s16 (int16_t a, int16x4_t v, const int lane) A64: SQDMULL Sd, Hn, Vm.H[lane] - - - - - - int64_t vqdmulls_laneq_s32 (int32_t a, int32x4_t v, const int lane) A64: SQDMULL Dd, Sn, Vm.S[lane] - - - - - - int64_t vqdmulls_lane_s32 (int32_t a, int32x2_t v, const int lane) A64: SQDMULL Dd, Sn, Vm.S[lane] - - - - - - int32_t vqdmlalh_laneq_s16 (int32_t a, int16_t b, int16x8_t v, const int lane) A64: SQDMLAL Sd, Hn, Vm.H[lane] - - - - - - - int32_t vqdmlalh_lane_s16 (int32_t a, int16_t b, int16x4_t v, const int lane) A64: SQDMLAL Sd, Hn, Vm.H[lane] - - - - - - - int64_t vqdmlals_laneq_s32 (int64_t a, int32_t b, int32x4_t v, const int lane) A64: SQDMLAL Dd, Sn, Vm.S[lane] - - - - - - - int64_t vqdmlals_lane_s32 (int64_t a, int32_t b, int32x2_t v, const int lane) A64: SQDMLAL Dd, Sn, Vm.S[lane] - - - - - - - int32_t vqdmlslh_laneq_s16 (int32_t a, int16_t b, int16x8_t v, const int lane) A64: SQDMLSL Sd, Hn, Vm.H[lane] - - - - - - - int32_t vqdmlslh_lane_s16 (int32_t a, int16_t b, int16x4_t v, const int lane) A64: SQDMLSL Sd, Hn, Vm.H[lane] - - - - - - - int64_t vqdmlsls_laneq_s32 (int64_t a, int32_t b, int32x4_t v, const int lane) A64: SQDMLSL Dd, Sn, Vm.S[lane] - - - - - - - int64_t vqdmlsls_lane_s32 (int64_t a, int32_t b, int32x2_t v, const int lane) A64: SQDMLSL Dd, Sn, Vm.S[lane] - - - - - - - - float64x2_t vmulxq_f64 (float64x2_t a, float64x2_t b) - A64: FMULX Vd.2D, Vn.2D, Vm.2D - - - - - - - float32x4_t vmulxq_f32 (float32x4_t a, float32x4_t b) - A64: FMULX Vd.4S, Vn.4S, Vm.4S - - - - - - - float32x2_t vmulx_f32 (float32x2_t a, float32x2_t b) - A64: FMULX Vd.2S, Vn.2S, Vm.2S - - - - - - - float64x2_t vmulxq_lane_f64 (float64x2_t a, float64x1_t v, const int lane) - A64: FMULX Vd.2D, Vn.2D, Vm.D[0] - - - - - - - float64x2_t vmulxq_laneq_f64 (float64x2_t a, float64x2_t v, const int lane) - A64: FMULX Vd.2D, Vn.2D, Vm.D[lane] - - - - - - - - float32x4_t vmulxq_laneq_f32 (float32x4_t a, float32x4_t v, const int lane) - A64: FMULX Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - float32x4_t vmulxq_lane_f32 (float32x4_t a, float32x2_t v, const int lane) - A64: FMULX Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - - float32x2_t vmulx_laneq_f32 (float32x2_t a, float32x4_t v, const int lane) - A64: FMULX Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - float32x2_t vmulx_lane_f32 (float32x2_t a, float32x2_t v, const int lane) - A64: FMULX Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - float64x1_t vmulx_f64 (float64x1_t a, float64x1_t b) - A64: FMULX Dd, Dn, Dm - - - - - - - float32_t vmulxs_f32 (float32_t a, float32_t b) - A64: FMULX Sd, Sn, Sm - - - - - - - float64_t vmulxd_laneq_f64 (float64_t a, float64x2_t v, const int lane) - A64: FMULX Dd, Dn, Vm.D[lane] - - - - - - - - float32_t vmulxs_laneq_f32 (float32_t a, float32x4_t v, const int lane) - A64: FMULX Sd, Sn, Vm.S[lane] - - - - - - - - float32_t vmulxs_lane_f32 (float32_t a, float32x2_t v, const int lane) - A64: FMULX Sd, Sn, Vm.S[lane] - - - - - - - int16_t vqrdmulhh_s16 (int16_t a, int16_t b) A64: SQRDMULH Hd, Hn, Hm - - - - - int32_t vqrdmulhs_s32 (int32_t a, int32_t b) A64: SQRDMULH Sd, Sn, Sm - - - - - int16_t vqrdmulhh_laneq_s16 (int16_t a, int16x8_t v, const int lane) A64: SQRDMULH Hd, Hn, Vm.H[lane] - - - - - - int16_t vqrdmulhh_lane_s16 (int16_t a, int16x4_t v, const int lane) A64: SQRDMULH Hd, Hn, Vm.H[lane] - - - - - - int32_t vqrdmulhs_laneq_s32 (int32_t a, int32x4_t v, const int lane) A64: SQRDMULH Sd, Sn, Vm.S[lane] - - - - - - int32_t vqrdmulhs_lane_s32 (int32_t a, int32x2_t v, const int lane) A64: SQRDMULH Sd, Sn, Vm.S[lane] - - - - - - - float64_t vmuld_laneq_f64 (float64_t a, float64x2_t v, const int lane) - A64: FMUL Dd, Dn, Vm.D[lane] - - - - - - - - float64x2_t vnegq_f64 (float64x2_t a) - A64: FNEG Vd.2D, Vn.2D - - - - - - int64x2_t vnegq_s64 (int64x2_t a) - A64: NEG Vd.2D, Vn.2D - - - - - - int64x2_t vqnegq_s64 (int64x2_t a) - A64: SQNEG Vd.2D, Vn.2D - - - - - - int16_t vqnegh_s16 (int16_t a) - A64: SQNEG Hd, Hn - - - - - - int32_t vqnegs_s32 (int32_t a) - A64: SQNEG Sd, Sn - - - - - - int64_t vqnegd_s64 (int64_t a) - A64: SQNEG Dd, Dn - - - - - - int8_t vqnegb_s8 (int8_t a) - A64: SQNEG Bd, Bn - - - - - - int64x1_t vneg_s64 (int64x1_t a) - A64: NEG Dd, Dn - - - - - - float64x2_t vrecpeq_f64 (float64x2_t a) - A64: FRECPE Vd.2D, Vn.2D - - - - - - float64x1_t vrecpe_f64 (float64x1_t a) - A64: FRECPE Dd, Dn - - - - - - float32_t vrecpes_f32 (float32_t a) - A64: FRECPE Sd, Sn - - - - - - float64_t vrecpxd_f64 (float64_t a) - A64: FRECPX Dd, Dn - - - - - - float32_t vrecpxs_f32 (float32_t a) - A64: FRECPX Sd, Sn - - - - - - float64x2_t vrsqrteq_f64 (float64x2_t a) - A64: FRSQRTE Vd.2D, Vn.2D - - - - - - float64x1_t vrsqrte_f64 (float64x1_t a) - A64: FRSQRTE Dd, Dn - - - - - - float32_t vrsqrtes_f32 (float32_t a) - A64: FRSQRTE Sd, Sn - - - - - - float64x2_t vrsqrtsq_f64 (float64x2_t a, float64x2_t b) - A64: FRSQRTS Vd.2D, Vn.2D, Vm.2D - - - - - - - float64x1_t vrsqrts_f64 (float64x1_t a, float64x1_t b) - A64: FRSQRTS Dd, Dn, Dm - - - - - - - float32_t vrsqrtss_f32 (float32_t a, float32_t b) - A64: FRSQRTS Sd, Sn, Sm - - - - - - - float64x2_t vrecpsq_f64 (float64x2_t a, float64x2_t b) - A64: FRECPS Vd.2D, Vn.2D, Vm.2D - - - - - - - float64x1_t vrecps_f64 (float64x1_t a, float64x1_t b) - A64: FRECPS Dd, Dn, Dm - - - - - - - float32_t vrecpss_f32 (float32_t a, float32_t b) - A64: FRECPS Sd, Sn, Sm - - - - - - - uint8x16_t vrbitq_u8 (uint8x16_t a) - A64: RBIT Vd.16B, Vn.16B - - - - - - int8x16_t vrbitq_s8 (int8x16_t a) - A64: RBIT Vd.16B, Vn.16B - - - - - - uint8x8_t vrbit_u8 (uint8x8_t a) - A64: RBIT Vd.8B, Vn.8B - - - - - - int8x8_t vrbit_s8 (int8x8_t a) - A64: RBIT Vd.8B, Vn.8B - - - - - - float64x2_t vrndaq_f64 (float64x2_t a) - A64: FRINTA Vd.2D, Vn.2D - - - - - - float64x2_t vrndnq_f64 (float64x2_t a) - A64: FRINTN Vd.2D, Vn.2D - - - - - - float64x2_t vrndmq_f64 (float64x2_t a) - A64: FRINTM Vd.2D, Vn.2D - - - - - - float64x2_t vrndpq_f64 (float64x2_t a) - A64: FRINTP Vd.2D, Vn.2D - - - - - - float64x2_t vrndq_f64 (float64x2_t a) - A64: FRINTZ Vd.2D, Vn.2D - - - - - - int16_t vqrshlh_s16 (int16_t a, int16_t b) - A64: SQRSHL Hd, Hn, Hm - - - - - - - int32_t vqrshls_s32 (int32_t a, int32_t b) - A64: SQRSHL Sd, Sn, Sm - - - - - - - int8_t vqrshlb_s8 (int8_t a, int8_t b) - A64: SQRSHL Bd, Bn, Bm - - - - - - - int16_t vqshlh_s16 (int16_t a, int16_t b) - A64: SQSHL Hd, Hn, Hm - - - - - - - int32_t vqshls_s32 (int32_t a, int32_t b) - A64: SQSHL Sd, Sn, Sm - - - - - - - int8_t vqshlb_s8 (int8_t a, int8_t b) - A64: SQSHL Bd, Bn, Bm - - - - - - - uint8_t vqshlb_n_u8 (uint8_t a, const int n) - A64: UQSHL Bd, Bn, #n - - - - - - - int16_t vqshlh_n_s16 (int16_t a, const int n) - A64: SQSHL Hd, Hn, #n - - - - - - - int32_t vqshls_n_s32 (int32_t a, const int n) - A64: SQSHL Sd, Sn, #n - - - - - - - int8_t vqshlb_n_s8 (int8_t a, const int n) - A64: SQSHL Bd, Bn, #n - - - - - - - uint16_t vqshlh_n_u16 (uint16_t a, const int n) - A64: UQSHL Hd, Hn, #n - - - - - - - uint32_t vqshls_n_u32 (uint32_t a, const int n) - A64: UQSHL Sd, Sn, #n - - - - - - - uint16_t vqshluh_n_s16 (int16_t a, const int n) - A64: SQSHLU Hd, Hn, #n - - - - - - - uint32_t vqshlus_n_s32 (int32_t a, const int n) - A64: SQSHLU Sd, Sn, #n - - - - - - - uint8_t vqshlub_n_s8 (int8_t a, const int n) - A64: SQSHLU Bd, Bn, #n - - - - - - - uint8_t vqrshlb_u8 (uint8_t a, int8_t b) - A64: UQRSHL Bd, Bn, Bm - - - - - - - uint16_t vqrshlh_u16 (uint16_t a, int16_t b) - A64: UQRSHL Hd, Hn, Hm - - - - - - - uint32_t vqrshls_u32 (uint32_t a, int32_t b) - A64: UQRSHL Sd, Sn, Sm - - - - - - - uint8_t vqrshlb_u8 (uint8_t a, int8_t b) - A64: UQRSHL Bd, Bn, Bm - - - - - - - uint16_t vqrshlh_u16 (uint16_t a, int16_t b) - A64: UQRSHL Hd, Hn, Hm - - - - - - - uint32_t vqrshls_u32 (uint32_t a, int32_t b) - A64: UQRSHL Sd, Sn, Sm - - - - - - - uint8_t vqshlb_u8 (uint8_t a, int8_t b) - A64: UQSHL Bd, Bn, Bm - - - - - - - uint16_t vqshlh_u16 (uint16_t a, int16_t b) - A64: UQSHL Hd, Hn, Hm - - - - - - - uint32_t vqshls_u32 (uint32_t a, int32_t b) - A64: UQSHL Sd, Sn, Sm - - - - - - - uint8_t vqshlb_u8 (uint8_t a, int8_t b) - A64: UQSHL Bd, Bn, Bm - - - - - - - uint16_t vqshlh_u16 (uint16_t a, int16_t b) - A64: UQSHL Hd, Hn, Hm - - - - - - - uint32_t vqshls_u32 (uint32_t a, int32_t b) - A64: UQSHL Sd, Sn, Sm - - - - - - - int8_t vqshrnh_n_s16 (int16_t a, const int n) - A64: SQSHRN Bd, Hn, #n - - - - - - - int16_t vqshrns_n_s32 (int32_t a, const int n) - A64: SQSHRN Hd, Sn, #n - - - - - - - int32_t vqshrnd_n_s64 (int64_t a, const int n) - A64: SQSHRN Sd, Dn, #n - - - - - - - uint8_t vqshrunh_n_s16 (int16_t a, const int n) - A64: SQSHRUN Bd, Hn, #n - - - - - - - uint16_t vqshruns_n_s32 (int32_t a, const int n) - A64: SQSHRUN Hd, Sn, #n - - - - - - - uint32_t vqshrund_n_s64 (int64_t a, const int n) - A64: SQSHRUN Sd, Dn, #n - - - - - - - int8_t vqrshrnh_n_s16 (int16_t a, const int n) - A64: SQRSHRN Bd, Hn, #n - - - - - - - int16_t vqrshrns_n_s32 (int32_t a, const int n) - A64: SQRSHRN Hd, Sn, #n - - - - - - - int32_t vqrshrnd_n_s64 (int64_t a, const int n) - A64: SQRSHRN Sd, Dn, #n - - - - - - - uint8_t vqrshrunh_n_s16 (int16_t a, const int n) - A64: SQRSHRUN Bd, Hn, #n - - - - - - - uint16_t vqrshruns_n_s32 (int32_t a, const int n) - A64: SQRSHRUN Hd, Sn, #n - - - - - - - uint32_t vqrshrund_n_s64 (int64_t a, const int n) - A64: SQRSHRUN Sd, Dn, #n - - - - - - - uint8_t vqshrnh_n_u16 (uint16_t a, const int n) - A64: UQSHRN Bd, Hn, #n - - - - - - - uint16_t vqshrns_n_u32 (uint32_t a, const int n) - A64: UQSHRN Hd, Sn, #n - - - - - - - uint32_t vqshrnd_n_u64 (uint64_t a, const int n) - A64: UQSHRN Sd, Dn, #n - - - - - - - uint8_t vqshrnh_n_u16 (uint16_t a, const int n) - A64: UQSHRN Bd, Hn, #n - - - - - - - uint16_t vqshrns_n_u32 (uint32_t a, const int n) - A64: UQSHRN Hd, Sn, #n - - - - - - - uint32_t vqshrnd_n_u64 (uint64_t a, const int n) - A64: UQSHRN Sd, Dn, #n - - - - - - - uint8_t vqrshrnh_n_u16 (uint16_t a, const int n) - A64: UQRSHRN Bd, Hn, #n - - - - - - - uint16_t vqrshrns_n_u32 (uint32_t a, const int n) - A64: UQRSHRN Hd, Sn, #n - - - - - - - uint32_t vqrshrnd_n_u64 (uint64_t a, const int n) - A64: UQRSHRN Sd, Dn, #n - - - - - - - uint8_t vqrshrnh_n_u16 (uint16_t a, const int n) - A64: UQRSHRN Bd, Hn, #n - - - - - - - uint16_t vqrshrns_n_u32 (uint32_t a, const int n) - A64: UQRSHRN Hd, Sn, #n - - - - - - - uint32_t vqrshrnd_n_u64 (uint64_t a, const int n) - A64: UQRSHRN Sd, Dn, #n - - - - - - - float64x2_t vsqrtq_f64 (float64x2_t a) - A64: FSQRT Vd.2D, Vn.2D - - - - - - float32x4_t vsqrtq_f32 (float32x4_t a) - A64: FSQRT Vd.4S, Vn.4S - - - - - - float32x2_t vsqrt_f32 (float32x2_t a) - A64: FSQRT Vd.2S, Vn.2S - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STP Qt1, Qt2, [Xn] - - - - - - A64: STP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STNP Qt1, Qt2, [Xn] - - - - - - A64: STNP Dt1, Dt2, [Xn] - - - - - - A64: STP St1, St2, [Xn] - - - - - - A64: STP St1, St2, [Xn] - - - - - - A64: STP St1, St2, [Xn] - - - - - - A64: STNP St1, St2, [Xn] - - - - - - A64: STNP St1, St2, [Xn] - - - - - - A64: STNP St1, St2, [Xn] - - - - - - - float64x2_t vsubq_f64 (float64x2_t a, float64x2_t b) - A64: FSUB Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8_t vqsubb_u8 (uint8_t a, uint8_t b) - A64: UQSUB Bd, Bn, Bm - - - - - - - int16_t vqsubh_s16 (int16_t a, int16_t b) - A64: SQSUB Hd, Hn, Hm - - - - - - - int32_t vqsubs_s32 (int32_t a, int32_t b) - A64: SQSUB Sd, Sn, Sm - - - - - - - int8_t vqsubb_s8 (int8_t a, int8_t b) - A64: SQSUB Bd, Bn, Bm - - - - - - - uint16_t vqsubh_u16 (uint16_t a, uint16_t b) - A64: UQSUB Hd, Hn, Hm - - - - - - - uint32_t vqsubs_u32 (uint32_t a, uint32_t b) - A64: UQSUB Sd, Sn, Sm - - - - - - - uint8x16_t vtrn1q_u8(uint8x16_t a, uint8x16_t b) - A64: TRN1 Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vtrn1q_f64(float64x2_t a, float64x2_t b) - A64: TRN1 Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vtrn1q_s16(int16x8_t a, int16x8_t b) - A64: TRN1 Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vtrn1q_s32(int32x4_t a, int32x4_t b) - A64: TRN1 Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vtrn1q_s64(int64x2_t a, int64x2_t b) - A64: TRN1 Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vtrn1q_u8(int8x16_t a, int8x16_t b) - A64: TRN1 Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vtrn1q_f32(float32x4_t a, float32x4_t b) - A64: TRN1 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vtrn1q_u16(uint16x8_t a, uint16x8_t b) - A64: TRN1 Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vtrn1q_u32(uint32x4_t a, uint32x4_t b) - A64: TRN1 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vtrn1q_u64(uint64x2_t a, uint64x2_t b) - A64: TRN1 Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vtrn1_u8(uint8x8_t a, uint8x8_t b) - A64: TRN1 Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vtrn1_s16(int16x4_t a, int16x4_t b) - A64: TRN1 Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vtrn1_s32(int32x2_t a, int32x2_t b) - A64: TRN1 Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vtrn1_s8(int8x8_t a, int8x8_t b) - A64: TRN1 Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vtrn1_f32(float32x2_t a, float32x2_t b) - A64: TRN1 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vtrn1_u16(uint16x4_t a, uint16x4_t b) - A64: TRN1 Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vtrn1_u32(uint32x2_t a, uint32x2_t b) - A64: TRN1 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vtrn2q_u8(uint8x16_t a, uint8x16_t b) - A64: TRN2 Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vtrn2q_f64(float64x2_t a, float64x2_t b) - A64: TRN2 Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vtrn2q_s16(int16x8_t a, int16x8_t b) - A64: TRN2 Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vtrn2q_s32(int32x4_t a, int32x4_t b) - A64: TRN2 Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vtrn2q_s64(int64x2_t a, int64x2_t b) - A64: TRN2 Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vtrn2q_u8(int8x16_t a, int8x16_t b) - A64: TRN2 Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vtrn2q_f32(float32x4_t a, float32x4_t b) - A64: TRN2 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vtrn2q_u16(uint16x8_t a, uint16x8_t b) - A64: TRN2 Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vtrn1q_u32(uint32x4_t a, uint32x4_t b) - A64: TRN1 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vtrn1q_u64(uint64x2_t a, uint64x2_t b) - A64: TRN1 Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vtrn2_u8(uint8x8_t a, uint8x8_t b) - A64: TRN2 Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vtrn2_s16(int16x4_t a, int16x4_t b) - A64: TRN2 Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vtrn2_s32(int32x2_t a, int32x2_t b) - A64: TRN2 Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vtrn2_s8(int8x8_t a, int8x8_t b) - A64: TRN2 Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vtrn2_f32(float32x2_t a, float32x2_t b) - A64: TRN2 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vtrn2_u16(uint16x4_t a, uint16x4_t b) - A64: TRN2 Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vtrn2_u32(uint32x2_t a, uint32x2_t b) - A64: TRN2 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vuzp1q_u8(uint8x16_t a, uint8x16_t b) - A64: UZP1 Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vuzp1q_f64(float64x2_t a, float64x2_t b) - A64: UZP1 Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vuzp1q_s16(int16x8_t a, int16x8_t b) - A64: UZP1 Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vuzp1q_s32(int32x4_t a, int32x4_t b) - A64: UZP1 Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vuzp1q_s64(int64x2_t a, int64x2_t b) - A64: UZP1 Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vuzp1q_u8(int8x16_t a, int8x16_t b) - A64: UZP1 Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vuzp1q_f32(float32x4_t a, float32x4_t b) - A64: UZP1 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vuzp1q_u16(uint16x8_t a, uint16x8_t b) - A64: UZP1 Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vuzp1q_u32(uint32x4_t a, uint32x4_t b) - A64: UZP1 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vuzp1q_u64(uint64x2_t a, uint64x2_t b) - A64: UZP1 Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vuzp1_u8(uint8x8_t a, uint8x8_t b) - A64: UZP1 Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vuzp1_s16(int16x4_t a, int16x4_t b) - A64: UZP1 Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vuzp1_s32(int32x2_t a, int32x2_t b) - A64: UZP1 Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vuzp1_s8(int8x8_t a, int8x8_t b) - A64: UZP1 Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vuzp1_f32(float32x2_t a, float32x2_t b) - A64: UZP1 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vuzp1_u16(uint16x4_t a, uint16x4_t b) - A64: UZP1 Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vuzp1_u32(uint32x2_t a, uint32x2_t b) - A64: UZP1 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vuzp2q_u8(uint8x16_t a, uint8x16_t b) - A64: UZP2 Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vuzp2q_f64(float64x2_t a, float64x2_t b) - A64: UZP2 Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vuzp2q_s16(int16x8_t a, int16x8_t b) - A64: UZP2 Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vuzp2q_s32(int32x4_t a, int32x4_t b) - A64: UZP2 Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vuzp2q_s64(int64x2_t a, int64x2_t b) - A64: UZP2 Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vuzp2q_u8(int8x16_t a, int8x16_t b) - A64: UZP2 Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vuzp2_f32(float32x4_t a, float32x4_t b) - A64: UZP2 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vuzp2q_u16(uint16x8_t a, uint16x8_t b) - A64: UZP2 Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vuzp2q_u32(uint32x4_t a, uint32x4_t b) - A64: UZP2 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vuzp2q_u64(uint64x2_t a, uint64x2_t b) - A64: UZP2 Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vuzp2_u8(uint8x8_t a, uint8x8_t b) - A64: UZP2 Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vuzp2_s16(int16x4_t a, int16x4_t b) - A64: UZP2 Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vuzp2_s32(int32x2_t a, int32x2_t b) - A64: UZP2 Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vuzp2_s8(int8x8_t a, int8x8_t b) - A64: UZP2 Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vuzp2_f32(float32x2_t a, float32x2_t b) - A64: UZP2 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vuzp2_u16(uint16x4_t a, uint16x4_t b) - A64: UZP2 Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vuzp2_u32(uint32x2_t a, uint32x2_t b) - A64: UZP2 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vqvtbl1q_u8(uint8x16_t t, uint8x16_t idx) - A64: TBL Vd.16B, {Vn.16B}, Vm.16B - - - - - - - int8x16_t vqvtbl1q_s8(int8x16_t t, uint8x16_t idx) - A64: TBL Vd.16B, {Vn.16B}, Vm.16B - - - - - - - uint8x16_t vqvtbx1q_u8(uint8x16_t r, int8x16_t t, uint8x16_t idx) - A64: TBX Vd.16B, {Vn.16B}, Vm.16B - - - - - - - - int8x16_t vqvtbx1q_s8(int8x16_t r, int8x16_t t, uint8x16_t idx) - A64: TBX Vd.16B, {Vn.16B}, Vm.16B - - - - - - - - uint8x16_t vzip2q_u8(uint8x16_t a, uint8x16_t b) - A64: ZIP2 Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vzip2q_f64(float64x2_t a, float64x2_t b) - A64: ZIP2 Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vzip2q_s16(int16x8_t a, int16x8_t b) - A64: ZIP2 Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vzip2q_s32(int32x4_t a, int32x4_t b) - A64: ZIP2 Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vzip2q_s64(int64x2_t a, int64x2_t b) - A64: ZIP2 Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vzip2q_u8(int8x16_t a, int8x16_t b) - A64: ZIP2 Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vzip2q_f32(float32x4_t a, float32x4_t b) - A64: ZIP2 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vzip2q_u16(uint16x8_t a, uint16x8_t b) - A64: ZIP2 Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vzip2q_u32(uint32x4_t a, uint32x4_t b) - A64: ZIP2 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vzip2q_u64(uint64x2_t a, uint64x2_t b) - A64: ZIP2 Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vzip2_u8(uint8x8_t a, uint8x8_t b) - A64: ZIP2 Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vzip2_s16(int16x4_t a, int16x4_t b) - A64: ZIP2 Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vzip2_s32(int32x2_t a, int32x2_t b) - A64: ZIP2 Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vzip2_s8(int8x8_t a, int8x8_t b) - A64: ZIP2 Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vzip2_f32(float32x2_t a, float32x2_t b) - A64: ZIP2 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vzip2_u16(uint16x4_t a, uint16x4_t b) - A64: ZIP2 Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vzip2_u32(uint32x2_t a, uint32x2_t b) - A64: ZIP2 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint8x16_t vzip1q_u8(uint8x16_t a, uint8x16_t b) - A64: ZIP1 Vd.16B, Vn.16B, Vm.16B - - - - - - - float64x2_t vzip1q_f64(float64x2_t a, float64x2_t b) - A64: ZIP1 Vd.2D, Vn.2D, Vm.2D - - - - - - - int16x8_t vzip1q_s16(int16x8_t a, int16x8_t b) - A64: ZIP1 Vd.8H, Vn.8H, Vm.8H - - - - - - - int32x4_t vzip1q_s32(int32x4_t a, int32x4_t b) - A64: ZIP1 Vd.4S, Vn.4S, Vm.4S - - - - - - - int64x2_t vzip1q_s64(int64x2_t a, int64x2_t b) - A64: ZIP1 Vd.2D, Vn.2D, Vm.2D - - - - - - - int8x16_t vzip1q_u8(int8x16_t a, int8x16_t b) - A64: ZIP1 Vd.16B, Vn.16B, Vm.16B - - - - - - - float32x4_t vzip1q_f32(float32x4_t a, float32x4_t b) - A64: ZIP1 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint16x8_t vzip1q_u16(uint16x8_t a, uint16x8_t b) - A64: ZIP1 Vd.8H, Vn.8H, Vm.8H - - - - - - - uint32x4_t vzip1q_u32(uint32x4_t a, uint32x4_t b) - A64: ZIP1 Vd.4S, Vn.4S, Vm.4S - - - - - - - uint64x2_t vzip1q_u64(uint64x2_t a, uint64x2_t b) - A64: ZIP1 Vd.2D, Vn.2D, Vm.2D - - - - - - - uint8x8_t vzip1_u8(uint8x8_t a, uint8x8_t b) - A64: ZIP1 Vd.8B, Vn.8B, Vm.8B - - - - - - - int16x4_t vzip1_s16(int16x4_t a, int16x4_t b) - A64: ZIP1 Vd.4H, Vn.4H, Vm.4H - - - - - - - int32x2_t vzip1_s32(int32x2_t a, int32x2_t b) - A64: ZIP1 Vd.2S, Vn.2S, Vm.2S - - - - - - - int8x8_t vzip1_s8(int8x8_t a, int8x8_t b) - A64: ZIP1 Vd.8B, Vn.8B, Vm.8B - - - - - - - float32x2_t vzip1_f32(float32x2_t a, float32x2_t b) - A64: ZIP1 Vd.2S, Vn.2S, Vm.2S - - - - - - - uint16x4_t vzip1_u16(uint16x4_t a, uint16x4_t b) - A64: ZIP1 Vd.4H, Vn.4H, Vm.4H - - - - - - - uint32x2_t vzip1_u32(uint32x2_t a, uint32x2_t b) - A64: ZIP1 Vd.2S, Vn.2S, Vm.2S - - - - - - - This class provides access to the ARM AES hardware instructions via intrinsics. - - - - uint8x16_t vaesdq_u8 (uint8x16_t data, uint8x16_t key) - A32: AESD.8 Qd, Qm - A64: AESD Vd.16B, Vn.16B - - - - - - - uint8x16_t vaeseq_u8 (uint8x16_t data, uint8x16_t key) - A32: AESE.8 Qd, Qm - A64: AESE Vd.16B, Vn.16B - - - - - - - uint8x16_t vaesimcq_u8 (uint8x16_t data) - A32: AESIMC.8 Qd, Qm - A64: AESIMC Vd.16B, Vn.16B - - - - - - uint8x16_t vaesmcq_u8 (uint8x16_t data) - A32: AESMC.8 Qd, Qm - A64: AESMC V>.16B, Vn.16B - - - - - - poly128_t vmull_p64 (poly64_t a, poly64_t b) - A32: VMULL.P8 Qd, Dn, Dm - A64: PMULL Vd.1Q, Vn.1D, Vm.1D - - - - - - - poly128_t vmull_p64 (poly64_t a, poly64_t b) - A32: VMULL.P8 Qd, Dn, Dm - A64: PMULL Vd.1Q, Vn.1D, Vm.1D - - - - - - - poly128_t vmull_high_p64 (poly64x2_t a, poly64x2_t b) - A32: VMULL.P8 Qd, Dn+1, Dm+1 - A64: PMULL2 Vd.1Q, Vn.2D, Vm.2D - - - - - - - poly128_t vmull_high_p64 (poly64x2_t a, poly64x2_t b) - A32: VMULL.P8 Qd, Dn+1, Dm+1 - A64: PMULL2 Vd.1Q, Vn.2D, Vm.2D - - - - - - - - - This class provides access to the ARM base hardware instructions via intrinsics. - - - - A32: CLZ Rd, Rm - A64: CLZ Wd, Wn - - - - - - A32: CLZ Rd, Rm - A64: CLZ Wd, Wn - - - - - - A32: RBIT Rd, Rm - A64: RBIT Wd, Wn - - - - - - A32: RBIT Rd, Rm - A64: RBIT Wd, Wn - - - - - - - A64: CLS Wd, Wn. - - - - A64: CLS Xd, Xn. - - - - A64: CLZ Xd, Xn. - - - - A64: CLZ Xd, Xn. - - - - A64: SMULH Xd, Xn, Xm - - - - - A64: UMULH Xd, Xn, Xm - - - - - A64: RBIT Xd, Xn. - - - - A64: RBIT Xd, Xn. - - - - - This class provides access to the ARM Crc32 hardware instructions via intrinsics. - - - - uint32_t __crc32b (uint32_t a, uint8_t b) - A32: CRC32B Rd, Rn, Rm - A64: CRC32B Wd, Wn, Wm - - - - - - - uint32_t __crc32h (uint32_t a, uint16_t b) - A32: CRC32H Rd, Rn, Rm - A64: CRC32H Wd, Wn, Wm - - - - - - - uint32_t __crc32w (uint32_t a, uint32_t b) - A32: CRC32W Rd, Rn, Rm - A64: CRC32W Wd, Wn, Wm - - - - - - - uint32_t __crc32cb (uint32_t a, uint8_t b) - A32: CRC32CB Rd, Rn, Rm - A64: CRC32CB Wd, Wn, Wm - - - - - - - uint32_t __crc32ch (uint32_t a, uint16_t b) - A32: CRC32CH Rd, Rn, Rm - A64: CRC32CH Wd, Wn, Wm - - - - - - - uint32_t __crc32cw (uint32_t a, uint32_t b) - A32: CRC32CW Rd, Rn, Rm - A64: CRC32CW Wd, Wn, Wm - - - - - - - - - uint32_t __crc32d (uint32_t a, uint64_t b) - A64: CRC32X Wd, Wn, Xm - - - - - - - uint32_t __crc32cd (uint32_t a, uint64_t b) - A64: CRC32CX Wd, Wn, Xm - - - - - - - Provides access to the ARMv8.2-DotProd hardware instructions via intrinsics. - - - int32x4_t vdotq_s32 (int32x4_t r, int8x16_t a, int8x16_t b) A32: VSDOT.S8 Qd, Qn, Qm A64: SDOT Vd.4S, Vn.16B, Vm.16B - - - - - - uint32x4_t vdotq_u32 (uint32x4_t r, uint8x16_t a, uint8x16_t b) A32: VUDOT.U8 Qd, Qn, Qm A64: UDOT Vd.4S, Vn.16B, Vm.16B - - - - - - int32x2_t vdot_s32 (int32x2_t r, int8x8_t a, int8x8_t b) A32: VSDOT.S8 Dd, Dn, Dm A64: SDOT Vd.2S, Vn.8B, Vm.8B - - - - - - uint32x2_t vdot_u32 (uint32x2_t r, uint8x8_t a, uint8x8_t b) A32: VUDOT.U8 Dd, Dn, Dm A64: UDOT Vd.2S, Vn.8B, Vm.8B - - - - - - int32x4_t vdotq_laneq_s32 (int32x4_t r, int8x16_t a, int8x16_t b, const int lane) A32: VSDOT.S8 Qd, Qn, Dm[lane] A64: SDOT Vd.4S, Vn.16B, Vm.4B[lane] - - - - - - - int32x4_t vdotq_lane_s32 (int32x4_t r, int8x16_t a, int8x8_t b, const int lane) A32: VSDOT.S8 Qd, Qn, Dm[lane] A64: SDOT Vd.4S, Vn.16B, Vm.4B[lane] - - - - - - - uint32x4_t vdotq_laneq_u32 (uint32x4_t r, uint8x16_t a, uint8x16_t b, const int lane) A32: VUDOT.U8 Qd, Qn, Dm[lane] A64: UDOT Vd.4S, Vn.16B, Vm.4B[lane] - - - - - - - uint32x4_t vdotq_lane_u32 (uint32x4_t r, uint8x16_t a, uint8x8_t b, const int lane) A32: VUDOT.U8 Qd, Qn, Dm[lane] A64: UDOT Vd.4S, Vn.16B, Vm.4B[lane] - - - - - - - int32x2_t vdot_laneq_s32 (int32x2_t r, int8x8_t a, int8x16_t b, const int lane) A32: VSDOT.S8 Dd, Dn, Dm[lane] A64: SDOT Vd.2S, Vn.8B, Vm.4B[lane] - - - - - - - int32x2_t vdot_lane_s32 (int32x2_t r, int8x8_t a, int8x8_t b, const int lane) A32: VSDOT.S8 Dd, Dn, Dm[lane] A64: SDOT Vd.2S, Vn.8B, Vm.4B[lane] - - - - - - - uint32x2_t vdot_laneq_u32 (uint32x2_t r, uint8x8_t a, uint8x16_t b, const int lane) A32: VUDOT.U8 Dd, Dn, Dm[lane] A64: UDOT Vd.2S, Vn.8B, Vm.4B[lane] - - - - - - - uint32x2_t vdot_lane_u32 (uint32x2_t r, uint8x8_t a, uint8x8_t b, const int lane) A32: VUDOT.U8 Dd, Dn, Dm[lane] A64: UDOT Vd.2S, Vn.8B, Vm.4B[lane] - - - - - - - - - - Provides access to the ARMv8.1-RDMA hardware instructions via intrinsics. - - - int16x8_t vqrdmlahq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) A32: VQRDMLAH.S16 Qd, Qn, Qm A64: SQRDMLAH Vd.8H, Vn.8H, Vm.8H - - - - - - int32x4_t vqrdmlahq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) A32: VQRDMLAH.S32 Qd, Qn, Qm A64: SQRDMLAH Vd.4S, Vn.4S, Vm.4S - - - - - - int16x4_t vqrdmlah_s16 (int16x4_t a, int16x4_t b, int16x4_t c) A32: VQRDMLAH.S16 Dd, Dn, Dm A64: SQRDMLAH Vd.4H, Vn.4H, Vm.4H - - - - - - int32x2_t vqrdmlah_s32 (int32x2_t a, int32x2_t b, int32x2_t c) A32: VQRDMLAH.S32 Dd, Dn, Dm A64: SQRDMLAH Vd.2S, Vn.2S, Vm.2S - - - - - - int16x8_t vqrdmlshq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) A32: VQRDMLSH.S16 Qd, Qn, Qm A64: SQRDMLSH Vd.8H, Vn.8H, Vm.8H - - - - - - int32x4_t vqrdmlshq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) A32: VQRDMLSH.S32 Qd, Qn, Qm A64: SQRDMLSH Vd.4S, Vn.4S, Vm.4S - - - - - - int16x4_t vqrdmlsh_s16 (int16x4_t a, int16x4_t b, int16x4_t c) A32: VQRDMLSH.S16 Dd, Dn, Dm A64: SQRDMLSH Vd.4H, Vn.4H, Vm.4H - - - - - - int32x2_t vqrdmlsh_s32 (int32x2_t a, int32x2_t b, int32x2_t c) A32: VQRDMLSH.S32 Dd, Dn, Dm A64: SQRDMLSH Vd.2S, Vn.2S, Vm.2S - - - - - - int16x8_t vqrdmlahq_laneq_s16 (int16x8_t a, int16x8_t b, int16x8_t v, const int lane) A32: VQRDMLAH.S16 Qd, Qn, Dm[lane] A64: SQRDMLAH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - int16x8_t vqrdmlahq_lane_s16 (int16x8_t a, int16x8_t b, int16x4_t v, const int lane) A32: VQRDMLAH.S16 Qd, Qn, Dm[lane] A64: SQRDMLAH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - int32x4_t vqrdmlahq_laneq_s32 (int32x4_t a, int32x4_t b, int32x4_t v, const int lane) A32: VQRDMLAH.S32 Qd, Qn, Dm[lane] A64: SQRDMLAH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - int32x4_t vqrdmlahq_lane_s32 (int32x4_t a, int32x4_t b, int32x2_t v, const int lane) A32: VQRDMLAH.S32 Qd, Qn, Dm[lane] A64: SQRDMLAH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - int16x4_t vqrdmlah_laneq_s16 (int16x4_t a, int16x4_t b, int16x8_t v, const int lane) A32: VQRDMLAH.S16 Dd, Dn, Dm[lane] A64: SQRDMLAH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - int16x4_t vqrdmlah_lane_s16 (int16x4_t a, int16x4_t b, int16x4_t v, const int lane) A32: VQRDMLAH.S16 Dd, Dn, Dm[lane] A64: SQRDMLAH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - int32x2_t vqrdmlah_laneq_s32 (int32x2_t a, int32x2_t b, int32x4_t v, const int lane) A32: VQRDMLAH.S32 Dd, Dn, Dm[lane] A64: SQRDMLAH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - int32x2_t vqrdmlah_lane_s32 (int32x2_t a, int32x2_t b, int32x2_t v, const int lane) A32: VQRDMLAH.S32 Dd, Dn, Dm[lane] A64: SQRDMLAH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - int16x8_t vqrdmlshq_laneq_s16 (int16x8_t a, int16x8_t b, int16x8_t v, const int lane) A32: VQRDMLSH.S16 Qd, Qn, Dm[lane] A64: SQRDMLSH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - int16x8_t vqrdmlshq_lane_s16 (int16x8_t a, int16x8_t b, int16x4_t v, const int lane) A32: VQRDMLSH.S16 Qd, Qn, Dm[lane] A64: SQRDMLSH Vd.8H, Vn.8H, Vm.H[lane] - - - - - - - int32x4_t vqrdmlshq_laneq_s32 (int32x4_t a, int32x4_t b, int32x4_t v, const int lane) A32: VQRDMLSH.S32 Qd, Qn, Dm[lane] A64: SQRDMLSH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - int32x4_t vqrdmlshq_lane_s32 (int32x4_t a, int32x4_t b, int32x2_t v, const int lane) A32: VQRDMLSH.S32 Qd, Qn, Dm[lane] A64: SQRDMLSH Vd.4S, Vn.4S, Vm.S[lane] - - - - - - - int16x4_t vqrdmlsh_laneq_s16 (int16x4_t a, int16x4_t b, int16x8_t v, const int lane) A32: VQRDMLSH.S16 Dd, Dn, Dm[lane] A64: SQRDMLSH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - int16x4_t vqrdmlsh_lane_s16 (int16x4_t a, int16x4_t b, int16x4_t v, const int lane) A32: VQRDMLSH.S16 Dd, Dn, Dm[lane] A64: SQRDMLSH Vd.4H, Vn.4H, Vm.H[lane] - - - - - - - int32x2_t vqrdmlsh_laneq_s32 (int32x2_t a, int32x2_t b, int32x4_t v, const int lane) A32: VQRDMLSH.S32 Dd, Dn, Dm[lane] A64: SQRDMLSH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - int32x2_t vqrdmlsh_lane_s32 (int32x2_t a, int32x2_t b, int32x2_t v, const int lane) A32: VQRDMLSH.S32 Dd, Dn, Dm[lane] A64: SQRDMLSH Vd.2S, Vn.2S, Vm.S[lane] - - - - - - - - - int16_t vqrdmlahh_s16 (int16_t a, int16_t b, int16_t c) A64: SQRDMLAH Hd, Hn, Hm - - - - - - int32_t vqrdmlahs_s32 (int32_t a, int32_t b, int32_t c) A64: SQRDMLAH Sd, Sn, Sm - - - - - - int16_t vqrdmlshh_s16 (int16_t a, int16_t b, int16_t c) A64: SQRDMLSH Hd, Hn, Hm - - - - - - int32_t vqrdmlshs_s32 (int32_t a, int32_t b, int32_t c) A64: SQRDMLSH Sd, Sn, Sm - - - - - - int16_t vqrdmlahh_laneq_s16 (int16_t a, int16_t b, int16x8_t v, const int lane) A64: SQRDMLAH Hd, Hn, Vm.H[lane] - - - - - - - int16_t vqrdmlahh_lane_s16 (int16_t a, int16_t b, int16x4_t v, const int lane) A64: SQRDMLAH Hd, Hn, Vm.H[lane] - - - - - - - int32_t vqrdmlahs_laneq_s32 (int32_t a, int32_t b, int32x4_t v, const int lane) A64: SQRDMLAH Sd, Sn, Vm.S[lane] - - - - - - - int32_t vqrdmlahs_lane_s32 (int32_t a, int32_t b, int32x2_t v, const int lane) A64: SQRDMLAH Sd, Sn, Vm.S[lane] - - - - - - - int16_t vqrdmlshh_laneq_s16 (int16_t a, int16_t b, int16x8_t v, const int lane) A64: SQRDMLSH Hd, Hn, Vm.H[lane] - - - - - - - int16_t vqrdmlshh_lane_s16 (int16_t a, int16_t b, int16x4_t v, const int lane) A64: SQRDMLSH Hd, Hn, Vm.H[lane] - - - - - - - int32_t vqrdmlshs_laneq_s32 (int32_t a, int32_t b, int32x4_t v, const int lane) A64: SQRDMLSH Sd, Sn, Vm.S[lane] - - - - - - - int32_t vqrdmlshs_lane_s32 (int32_t a, int32_t b, int32x2_t v, const int lane) A64: SQRDMLSH Sd, Sn, Vm.S[lane] - - - - - - - - This class provides access to the ARM SHA1 hardware instructions via intrinsics. - - - - uint32_t vsha1h_u32 (uint32_t hash_e) - A32: SHA1H.32 Qd, Qm - A64: SHA1H Sd, Sn - - - - - - uint32x4_t vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - A32: SHA1C.32 Qd, Qn, Qm - A64: SHA1C Qd, Sn, Vm.4S - - - - - - - - uint32x4_t vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - A32: SHA1M.32 Qd, Qn, Qm - A64: SHA1M Qd, Sn, Vm.4S - - - - - - - - uint32x4_t vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) - A32: SHA1P.32 Qd, Qn, Qm - A64: SHA1P Qd, Sn, Vm.4S - - - - - - - - uint32x4_t vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11) - A32: SHA1SU0.32 Qd, Qn, Qm - A64: SHA1SU0 Vd.4S, Vn.4S, Vm.4S - - - - - - - - uint32x4_t vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15) - A32: SHA1SU1.32 Qd, Qm - A64: SHA1SU1 Vd.4S, Vn.4S - - - - - - - - - This class provides access to the ARM SHA256 hardware instructions via intrinsics. - - - - uint32x4_t vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk) - A32: SHA256H.32 Qd, Qn, Qm - A64: SHA256H Qd, Qn, Vm.4S - - - - - - - - uint32x4_t vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk) - A32: SHA256H2.32 Qd, Qn, Qm - A64: SHA256H2 Qd, Qn, Vm.4S - - - - - - - - uint32x4_t vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7) - A32: SHA256SU0.32 Qd, Qm - A64: SHA256SU0 Vd.4S, Vn.4S - - - - - - - uint32x4_t vsha256su1q_u32 (uint32x4_t w0_3, uint32x4_t w8_11, uint32x4_t w12_15) - A32: SHA256SU1.32 Qd, Qn, Qm - A64: SHA256SU1 Vd.4S, Vn.4S, Vm.4S - - - - - - - - Reinterprets a of type as a new of type . The vector to reinterpret. The type of the input vector. The type that the vector should be reinterpreted as. - The type of () or the type of the target () is not supported. - reinterpreted as a of type . + reinterpreted as a of type . + The type of () or the type of the target () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . - - - Reinterprets a as a new . - The vector to reinterpret. - The type of the vectors. - The type of () is not supported. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - The type of the vectors. - The type of () is not supported. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - - reinterpreted as a new . + The type of () is not supported. Creates a new instance with all elements initialized to the specified value. @@ -19887,45 +415,45 @@ The vector to get the element from. The index of the element to get. The type of the input vector. + The value of the element at . The type of () is not supported. was less than zero or greater than the number of elements. - The value of the element at . Gets the value of the lower 64-bits as a new . The vector to get the lower 64-bits from. The type of the input vector. - The type of () is not supported. The value of the lower 64-bits as a new . + The type of () is not supported. Gets the value of the upper 64-bits as a new . The vector to get the upper 64-bits from. The type of the input vector. - The type of () is not supported. The value of the upper 64-bits as a new . + The type of () is not supported. Converts the given vector to a scalar containing the value of the first element. The vector to get the first element from. The type of the input vector. - The type of () is not supported. A scalar containing the value of the first element. + The type of () is not supported. Converts the given vector to a new with the lower 128-bits set to the value of the given vector and the upper 128-bits initialized to zero. The vector to extend. The type of the input vector. - The type of () is not supported. A new with the lower 128-bits set to the value of and the upper 128-bits initialized to zero. + The type of () is not supported. Converts the given vector to a new with the lower 128-bits set to the value of the given vector and the upper 128-bits left uninitialized. The vector to extend. The type of the input vector. - The type of () is not supported. A new with the lower 128-bits set to the value of and the upper 128-bits left uninitialized. + The type of () is not supported. Creates a new with the element at the specified index set to the specified value and the remaining elements set to the same value as that in the given vector. @@ -19933,60 +461,56 @@ The index of the element to set. The value to set the element to. The type of the input vector. + A with the value of the element at set to and the remaining elements set to the same value as that in . The type of () is not supported. was less than zero or greater than the number of elements. - A with the value of the element at set to and the remaining elements set to the same value as that in . Creates a new with the lower 64-bits set to the specified value and the upper 64-bits set to the same value as that in the given vector. The vector to get the upper 64-bits from. The value of the lower 64-bits as a . The type of the input vector. - The type of () is not supported. A new with the lower 64-bits set to the specified value and the upper 64-bits set to the same value as that in . + The type of () is not supported. - Creates a new with the upper 64-bits set to the specified value and the lower 64-bits set to the same value as that in the given vector. + Creates a new with the upper 64-bits set to the specified value and the upper 64-bits set to the same value as that in the given vector. The vector to get the lower 64-bits from. - The upper 64-bits. + The value of the upper 64-bits as a . The type of the input vector. + A new with the upper 64-bits set to the specified value and the upper 64-bits set to the same value as that in . The type of () is not supported. - A new with the upper 64-bits set to the specified value and the lower 64-bits set to those in . + + Gets the number of that are in a . + The type of the current instance () is not supported. + Determines whether the specified object is equal to the current instance. The object to compare with the current instance. - The type of the current instance () is not supported. if is a and is equal to the current instance; otherwise, . + The type of the current instance () is not supported. Determines whether the specified is equal to the current instance. The to compare with the current instance. - The type of the current instance () is not supported. if is equal to the current instance; otherwise, . + The type of the current instance () is not supported. Gets the hash code for the instance. - The type of the current instance () is not supported. The hash code for the instance. + The type of the current instance () is not supported. Converts the current instance to an equivalent string representation. - The type of the current instance () is not supported. An equivalent string representation of the current instance. - - - Gets a new with all bits set to 1. - The type of the current instance () is not supported. - - - Gets the number of that are in a . The type of the current instance () is not supported. @@ -19999,110 +523,94 @@ The vector to reinterpret. The type of the input vector. The type that the vector should be reinterpreted as. - The type of () or the type of the target () is not supported. - reinterpreted as a of type . + reinterpreted as a of type . + The type of () or the type of the target () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . - - - Reinterprets a as a new . - The vector to reinterpret. - The type of the vectors. - The type of () is not supported. - - reinterpreted as a new . - - - Reinterprets a as a new . - The vector to reinterpret. - The type of the vectors. - The type of () is not supported. - - reinterpreted as a new . + The type of () is not supported. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20138,12 +646,12 @@ The value that element 29 will be initialized to. The value that element 30 will be initialized to. The value that element 31 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20151,12 +659,12 @@ The value that element 1 will be initialized to. The value that element 2 will be initialized to. The value that element 3 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20176,12 +684,12 @@ The value that element 13 will be initialized to. The value that element 14 will be initialized to. The value that element 15 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20193,12 +701,12 @@ The value that element 5 will be initialized to. The value that element 6 will be initialized to. The value that element 7 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20206,72 +714,72 @@ The value that element 1 will be initialized to. The value that element 2 will be initialized to. The value that element 3 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance from two instances. - The value that the lower 128 bits will be initialized to. - The value that the upper 128 bits will be initialized to. - A new vector initialized from and . + The value that the lower 128-bits will be initialized to. + The value that the upper 128-bits will be initialized to. + A new initialized from and . Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20307,12 +815,12 @@ The value that element 29 will be initialized to. The value that element 30 will be initialized to. The value that element 31 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20324,12 +832,12 @@ The value that element 5 will be initialized to. The value that element 6 will be initialized to. The value that element 7 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20349,12 +857,12 @@ The value that element 13 will be initialized to. The value that element 14 will be initialized to. The value that element 15 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20366,12 +874,12 @@ The value that element 5 will be initialized to. The value that element 6 will be initialized to. The value that element 7 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with all elements initialized to the specified value. The value that all elements will be initialized to. - A new vector with all elements initialized to . + A new with all elements initialized to . Creates a new instance with each element initialized to the corresponding specified value. @@ -20379,138 +887,138 @@ The value that element 1 will be initialized to. The value that element 2 will be initialized to. The value that element 3 will be initialized to. - A new vector with each element initialized to corresponding specified value. + A new with each element initialized to corresponding specified value. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements initialized to zero. + A new instance with the first element initialized to and the remaining elements initialized to zero. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. - A new vector instance with the first element initialized to and the remaining elements left uninitialized. + A new instance with the first element initialized to and the remaining elements left uninitialized. Gets the element at the specified index. The vector to get the element from. The index of the element to get. The type of the input vector. + The value of the element at . The type of () is not supported. was less than zero or greater than the number of elements. - The value of the element at . - Gets the value of the lower 128 bits as a new . - The vector to get the lower 128 bits from. + Gets the value of the lower 128-bits as a new . + The vector to get the lower 128-bits from. The type of the input vector. + The value of the lower 128-bits as a new . The type of () is not supported. - The value of the lower 128 bits as a new vector. - Gets the value of the upper 128 bits as a new . - The vector to get the upper 128 bits from. + Gets the value of the upper 128-bits as a new . + The vector to get the upper 128-bits from. The type of the input vector. + The value of the upper 128-bits as a new . The type of () is not supported. - The value of the upper 128 bits as a new vector. Converts the given vector to a scalar containing the value of the first element. The vector to get the first element from. The type of the input vector. + A scalar containing the value of the first element. The type of () is not supported. - A scalar that contains the value of the first element. Creates a new with the element at the specified index set to the specified value and the remaining elements set to the same value as that in the given vector. @@ -20518,60 +1026,56 @@ The index of the element to set. The value to set the element to. The type of the input vector. + A with the value of the element at set to and the remaining elements set to the same value as that in . The type of () is not supported. was less than zero or greater than the number of elements. - A vector with the value of the element at set to and the remaining elements set to the same value as that in . - Creates a new with the lower 128 bits set to the specified value and the upper 128 bits set to the same value as that in the given vector. - The vector to get the upper 128 bits from. - The lower 128 bits. + Creates a new with the lower 128-bits set to the specified value and the upper 128-bits set to the same value as that in the given vector. + The vector to get the upper 128-bits from. + The value of the lower 128-bits as a . The type of the input vector. + A new with the lower 128-bits set to the specified value and the upper 128-bits set to the same value as that in . The type of () is not supported. - A new vector with the lower 128 bits set to the specified value and the upper 128 bits set to the same value as that in . - Creates a new with the upper 128 bits set to the specified value and the lower 128 bits set to the same value as that in the given vector. - The vector to get the lower 128 bits from. - The upper 128 bits. + Creates a new with the upper 128-bits set to the specified value and the upper 128-bits set to the same value as that in the given vector. + The vector to get the lower 128-bits from. + The value of the upper 128-bits as a . The type of the input vector. + A new with the upper 128-bits set to the specified value and the upper 128-bits set to the same value as that in . The type of () is not supported. - A new vector with the upper 128 bits set to the specified value and the lower 128 bits set to the same value as that in . + + Gets the number of that are in a . + The type of the current instance () is not supported. + Determines whether the specified object is equal to the current instance. The object to compare with the current instance. - The type of the current instance () is not supported. if is a and is equal to the current instance; otherwise, . + The type of the current instance () is not supported. Determines whether the specified is equal to the current instance. The to compare with the current instance. - The type of the current instance () is not supported. if is equal to the current instance; otherwise, . + The type of the current instance () is not supported. Gets the hash code for the instance. - The type of the current instance () is not supported. The hash code for the instance. + The type of the current instance () is not supported. Converts the current instance to an equivalent string representation. - The type of the current instance () is not supported. An equivalent string representation of the current instance. - - - Gets a new with all bits set to 1. - The type of the current instance () is not supported. - - - Gets the number of that are in a . The type of the current instance () is not supported. @@ -20584,89 +1088,89 @@ The vector to reinterpret. The type of the input vector. The type that the vector should be reinterpreted as. - The type of () or the type of the target () is not supported. - reinterpreted as a of type . + reinterpreted as a of type . + The type of () or the type of the target () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Reinterprets a as a new of type . The vector to reinterpret. The type of the input vector. - The type of () is not supported. reinterpreted as a new of type . + The type of () is not supported. Creates a new instance with all elements initialized to the specified value. @@ -20781,11 +1285,6 @@ The value that element 0 will be initialized to. A new instance with the first element initialized to and the remaining elements initialized to zero. - - Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. - The value that element 0 will be initialized to. - A new instance with the first element initialized to and the remaining elements initialized to zero. - Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. @@ -20796,11 +1295,6 @@ The value that element 0 will be initialized to. A new instance with the first element initialized to and the remaining elements initialized to zero. - - Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. - The value that element 0 will be initialized to. - A new instance with the first element initialized to and the remaining elements initialized to zero. - Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. The value that element 0 will be initialized to. @@ -20821,11 +1315,6 @@ The value that element 0 will be initialized to. A new instance with the first element initialized to and the remaining elements initialized to zero. - - Creates a new instance with the first element initialized to the specified value and the remaining elements initialized to zero. - The value that element 0 will be initialized to. - A new instance with the first element initialized to and the remaining elements initialized to zero. - Creates a new instance with the first element initialized to the specified value and the remaining elements left uninitialized. The value that element 0 will be initialized to. @@ -20866,31 +1355,31 @@ The vector to get the element from. The index of the element to get. The type of the input vector. + The value of the element at . The type of () is not supported. was less than zero or greater than the number of elements. - The value of the element at . Converts the given vector to a scalar containing the value of the first element. The vector to get the first element from. The type of the input vector. - The type of () is not supported. A scalar containing the value of the first element. + The type of () is not supported. Converts the given vector to a new with the lower 64-bits set to the value of the given vector and the upper 64-bits initialized to zero. The vector to extend. The type of the input vector. - The type of () is not supported. A new with the lower 64-bits set to the value of and the upper 64-bits initialized to zero. + The type of () is not supported. Converts the given vector to a new with the lower 64-bits set to the value of the given vector and the upper 64-bits left uninitialized. The vector to extend. The type of the input vector. - The type of () is not supported. A new with the lower 64-bits set to the value of and the upper 64-bits left uninitialized. + The type of () is not supported. Creates a new with the element at the specified index set to the specified value and the remaining elements set to the same value as that in the given vector. @@ -20898,44 +1387,40 @@ The index of the element to set. The value to set the element to. The type of the input vector. + A with the value of the element at set to and the remaining elements set to the same value as that in . The type of () is not supported. was less than zero or greater than the number of elements. - A with the value of the element at set to and the remaining elements set to the same value as that in . + + Gets the number of that are in a . + The type of the current instance () is not supported. + Determines whether the specified object is equal to the current instance. The object to compare with the current instance. - The type of the current instance () is not supported. if is a and is equal to the current instance; otherwise, . + The type of the current instance () is not supported. Determines whether the specified is equal to the current instance. The to compare with the current instance. - The type of the current instance () is not supported. if is equal to the current instance; otherwise, . + The type of the current instance () is not supported. Gets the hash code for the instance. - The type of the current instance () is not supported. The hash code for the instance. + The type of the current instance () is not supported. Converts the current instance to an equivalent string representation. - The type of the current instance () is not supported. An equivalent string representation of the current instance. - - - Gets a new with all bits set to 1. - The type of the current instance () is not supported. - - - Gets the number of that are in a . The type of the current instance () is not supported. @@ -20946,2856 +1431,1984 @@ This class provides access to Intel AES hardware instructions via intrinsics. - - __m128i _mm_aesdec_si128 (__m128i a, __m128i RoundKey) - AESDEC xmm, xmm/m128 - + __m128i _mm_aesdec_si128 (__m128i a, __m128i RoundKey) +AESDEC xmm, xmm/m128 - - __m128i _mm_aesdeclast_si128 (__m128i a, __m128i RoundKey) - AESDECLAST xmm, xmm/m128 - + __m128i _mm_aesdeclast_si128 (__m128i a, __m128i RoundKey) +AESDECLAST xmm, xmm/m128 - - __m128i _mm_aesenc_si128 (__m128i a, __m128i RoundKey) - AESENC xmm, xmm/m128 - + __m128i _mm_aesenc_si128 (__m128i a, __m128i RoundKey) +AESENC xmm, xmm/m128 - - __m128i _mm_aesenclast_si128 (__m128i a, __m128i RoundKey) - AESENCLAST xmm, xmm/m128 - + __m128i _mm_aesenclast_si128 (__m128i a, __m128i RoundKey) +AESENCLAST xmm, xmm/m128 - - __m128i _mm_aesimc_si128 (__m128i a) - AESIMC xmm, xmm/m128 - + __m128i _mm_aesimc_si128 (__m128i a) +AESIMC xmm, xmm/m128 + - - __m128i _mm_aeskeygenassist_si128 (__m128i a, const int imm8) - AESKEYGENASSIST xmm, xmm/m128, imm8 - + __m128i _mm_aeskeygenassist_si128 (__m128i a, const int imm8) +AESKEYGENASSIST xmm, xmm/m128, imm8 - - - This class provides access to Intel AVX hardware instructions via intrinsics. - - __m256d _mm256_add_pd (__m256d a, __m256d b) - VADDPD ymm, ymm, ymm/m256 - + __m256d _mm256_add_pd (__m256d a, __m256d b) +VADDPD ymm, ymm, ymm/m256 - - __m256 _mm256_add_ps (__m256 a, __m256 b) - VADDPS ymm, ymm, ymm/m256 - + __m256 _mm256_add_ps (__m256 a, __m256 b) +VADDPS ymm, ymm, ymm/m256 - - __m256d _mm256_addsub_pd (__m256d a, __m256d b) - VADDSUBPD ymm, ymm, ymm/m256 - + __m256d _mm256_addsub_pd (__m256d a, __m256d b) +VADDSUBPD ymm, ymm, ymm/m256 - - __m256 _mm256_addsub_ps (__m256 a, __m256 b) - VADDSUBPS ymm, ymm, ymm/m256 - + __m256 _mm256_addsub_ps (__m256 a, __m256 b) +VADDSUBPS ymm, ymm, ymm/m256 - - __m256d _mm256_and_pd (__m256d a, __m256d b) - VANDPD ymm, ymm, ymm/m256 - + __m256d _mm256_and_pd (__m256d a, __m256d b) +VANDPD ymm, ymm, ymm/m256 - - __m256 _mm256_and_ps (__m256 a, __m256 b) - VANDPS ymm, ymm, ymm/m256 - + __m256 _mm256_and_ps (__m256 a, __m256 b) +VANDPS ymm, ymm, ymm/m256 - - __m256d _mm256_andnot_pd (__m256d a, __m256d b) - VANDNPD ymm, ymm, ymm/m256 - + __m256d _mm256_andnot_pd (__m256d a, __m256d b) +VANDNPD ymm, ymm, ymm/m256 - - __m256 _mm256_andnot_ps (__m256 a, __m256 b) - VANDNPS ymm, ymm, ymm/m256 - + __m256 _mm256_andnot_ps (__m256 a, __m256 b) +VANDNPS ymm, ymm, ymm/m256 - - __m256d _mm256_blend_pd (__m256d a, __m256d b, const int imm8) - VBLENDPD ymm, ymm, ymm/m256, imm8 - + __m256d _mm256_blend_pd (__m256d a, __m256d b, const int imm8) +VBLENDPD ymm, ymm, ymm/m256, imm8 - - __m256 _mm256_blend_ps (__m256 a, __m256 b, const int imm8) - VBLENDPS ymm, ymm, ymm/m256, imm8 - + __m256 _mm256_blend_ps (__m256 a, __m256 b, const int imm8) +VBLENDPS ymm, ymm, ymm/m256, imm8 - - __m256d _mm256_blendv_pd (__m256d a, __m256d b, __m256d mask) - VBLENDVPD ymm, ymm, ymm/m256, ymm - + __m256d _mm256_blendv_pd (__m256d a, __m256d b, __m256d mask) +VBLENDVPD ymm, ymm, ymm/m256, ymm - - __m256 _mm256_blendv_ps (__m256 a, __m256 b, __m256 mask) - VBLENDVPS ymm, ymm, ymm/m256, ymm - + __m256 _mm256_blendv_ps (__m256 a, __m256 b, __m256 mask) +VBLENDVPS ymm, ymm, ymm/m256, ymm - - __m128 _mm_broadcast_ss (float const * mem_addr) - VBROADCASTSS xmm, m32 - + __m128 _mm_broadcast_ss (float const * mem_addr) +VBROADCASTSS xmm, m32 - - __m256d _mm256_broadcast_sd (double const * mem_addr) - VBROADCASTSD ymm, m64 - + __m256d _mm256_broadcast_sd (double const * mem_addr) +VBROADCASTSD ymm, m64 - - __m256 _mm256_broadcast_ss (float const * mem_addr) - VBROADCASTSS ymm, m32 - + __m256 _mm256_broadcast_ss (float const * mem_addr) +VBROADCASTSS ymm, m32 - - __m256d _mm256_broadcast_pd (__m128d const * mem_addr) - VBROADCASTF128, ymm, m128 - + __m256d _mm256_broadcast_pd (__m128d const * mem_addr) +VBROADCASTF128, ymm, m128 - - __m256 _mm256_broadcast_ps (__m128 const * mem_addr) - VBROADCASTF128, ymm, m128 - + __m256 _mm256_broadcast_ps (__m128 const * mem_addr) +VBROADCASTF128, ymm, m128 - - __m256d _mm256_ceil_pd (__m256d a) - VROUNDPD ymm, ymm/m256, imm8(10) - + __m256d _mm256_ceil_pd (__m256d a) +VROUNDPD ymm, ymm/m256, imm8(10) - - __m256 _mm256_ceil_ps (__m256 a) - VROUNDPS ymm, ymm/m256, imm8(10) - + __m256 _mm256_ceil_ps (__m256 a) +VROUNDPS ymm, ymm/m256, imm8(10) - - __m128d _mm_cmp_pd (__m128d a, __m128d b, const int imm8) - VCMPPD xmm, xmm, xmm/m128, imm8 - + __m128d _mm_cmp_pd (__m128d a, __m128d b, const int imm8) +VCMPPD xmm, xmm, xmm/m128, imm8 - - __m128 _mm_cmp_ps (__m128 a, __m128 b, const int imm8) - VCMPPS xmm, xmm, xmm/m128, imm8 - + __m128 _mm_cmp_ps (__m128 a, __m128 b, const int imm8) +VCMPPS xmm, xmm, xmm/m128, imm8 - - __m256d _mm256_cmp_pd (__m256d a, __m256d b, const int imm8) - VCMPPD ymm, ymm, ymm/m256, imm8 - + __m256d _mm256_cmp_pd (__m256d a, __m256d b, const int imm8) +VCMPPD ymm, ymm, ymm/m256, imm8 - - __m256 _mm256_cmp_ps (__m256 a, __m256 b, const int imm8) - VCMPPS ymm, ymm, ymm/m256, imm8 - + __m256 _mm256_cmp_ps (__m256 a, __m256 b, const int imm8) +VCMPPS ymm, ymm, ymm/m256, imm8 - - - __m256d _mm256_cmpeq_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(0) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpeq_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(0) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpgt_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(14) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpgt_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(14) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpge_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(13) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpge_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(13) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmplt_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(1) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmplt_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(1) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmple_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(2) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmple_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(2) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpneq_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(4) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpneq_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(4) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpngt_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(10) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpngt_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(10) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpnge_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(9) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpnge_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(9) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpnlt_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(5) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpnlt_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(5) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpnle_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(6) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpnle_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(6) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256d _mm256_cmpord_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(7) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpord_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(7) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - __m128d _mm_cmp_sd (__m128d a, __m128d b, const int imm8) - VCMPSS xmm, xmm, xmm/m32, imm8 - + __m128d _mm_cmp_sd (__m128d a, __m128d b, const int imm8) +VCMPSS xmm, xmm, xmm/m32, imm8 - - __m128 _mm_cmp_ss (__m128 a, __m128 b, const int imm8) - VCMPSD xmm, xmm, xmm/m64, imm8 - + __m128 _mm_cmp_ss (__m128 a, __m128 b, const int imm8) +VCMPSD xmm, xmm, xmm/m64, imm8 - - - __m256d _mm256_cmpunord_pd (__m256d a, __m256d b) CMPPD ymm, ymm/m256, imm8(3) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - - __m256 _mm256_cmpunord_ps (__m256 a, __m256 b) CMPPS ymm, ymm/m256, imm8(3) - The above native signature does not exist. We provide this additional overload for completeness. - - - - - - __m128i _mm256_cvtpd_epi32 (__m256d a) - VCVTPD2DQ xmm, ymm/m256 - + __m128i _mm256_cvtpd_epi32 (__m256d a) +VCVTPD2DQ xmm, ymm/m256 - - __m128i _mm256_cvttpd_epi32 (__m256d a) - VCVTTPD2DQ xmm, ymm/m256 - + __m128i _mm256_cvttpd_epi32 (__m256d a) +VCVTTPD2DQ xmm, ymm/m256 - - __m128 _mm256_cvtpd_ps (__m256d a) - VCVTPD2PS xmm, ymm/m256 - + __m128 _mm256_cvtpd_ps (__m256d a) +VCVTPD2PS xmm, ymm/m256 - - __m256d _mm256_cvtepi32_pd (__m128i a) - VCVTDQ2PD ymm, xmm/m128 - + __m256d _mm256_cvtepi32_pd (__m128i a) +VCVTDQ2PD ymm, xmm/m128 - - __m256d _mm256_cvtps_pd (__m128 a) - VCVTPS2PD ymm, xmm/m128 - + __m256d _mm256_cvtps_pd (__m128 a) +VCVTPS2PD ymm, xmm/m128 - - __m256i _mm256_cvtps_epi32 (__m256 a) - VCVTPS2DQ ymm, ymm/m256 - + __m256i _mm256_cvtps_epi32 (__m256 a) +VCVTPS2DQ ymm, ymm/m256 - - __m256i _mm256_cvttps_epi32 (__m256 a) - VCVTTPS2DQ ymm, ymm/m256 - + __m256i _mm256_cvttps_epi32 (__m256 a) +VCVTTPS2DQ ymm, ymm/m256 - - __m256 _mm256_cvtepi32_ps (__m256i a) - VCVTDQ2PS ymm, ymm/m256 - + __m256 _mm256_cvtepi32_ps (__m256i a) +VCVTDQ2PS ymm, ymm/m256 - - __m256d _mm256_div_pd (__m256d a, __m256d b) - VDIVPD ymm, ymm, ymm/m256 - + __m256d _mm256_div_pd (__m256d a, __m256d b) +VDIVPD ymm, ymm, ymm/m256 - - __m256 _mm256_div_ps (__m256 a, __m256 b) - VDIVPS ymm, ymm, ymm/m256 - + __m256 _mm256_div_ps (__m256 a, __m256 b) +VDIVPS ymm, ymm, ymm/m256 - - __m256 _mm256_dp_ps (__m256 a, __m256 b, const int imm8) - VDPPS ymm, ymm, ymm/m256, imm8 - + __m256 _mm256_dp_ps (__m256 a, __m256 b, const int imm8) +VDPPS ymm, ymm, ymm/m256, imm8 - - __m256d _mm256_movedup_pd (__m256d a) - VMOVDDUP ymm, ymm/m256 - + __m256d _mm256_movedup_pd (__m256d a) +VMOVDDUP ymm, ymm/m256 - - __m256 _mm256_moveldup_ps (__m256 a) - VMOVSLDUP ymm, ymm/m256 - + __m256 _mm256_moveldup_ps (__m256 a) +VMOVSLDUP ymm, ymm/m256 - - __m256 _mm256_movehdup_ps (__m256 a) - VMOVSHDUP ymm, ymm/m256 - + __m256 _mm256_movehdup_ps (__m256 a) +VMOVSHDUP ymm, ymm/m256 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128d _mm256_extractf128_pd (__m256d a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128d _mm256_extractf128_pd (__m256d a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128 _mm256_extractf128_ps (__m256 a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128 _mm256_extractf128_ps (__m256 a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) - VEXTRACTF128 xmm/m128, ymm, imm8 - + __m128i _mm256_extractf128_si256 (__m256i a, const int imm8) +VEXTRACTF128 xmm/m128, ymm, imm8 - - __m256d _mm256_floor_pd (__m256d a) - VROUNDPS ymm, ymm/m256, imm8(9) - + __m256d _mm256_floor_pd (__m256d a) +VROUNDPS ymm, ymm/m256, imm8(9) - - __m256 _mm256_floor_ps (__m256 a) - VROUNDPS ymm, ymm/m256, imm8(9) - + __m256 _mm256_floor_ps (__m256 a) +VROUNDPS ymm, ymm/m256, imm8(9) - - __m256d _mm256_hadd_pd (__m256d a, __m256d b) - VHADDPD ymm, ymm, ymm/m256 - + __m256d _mm256_hadd_pd (__m256d a, __m256d b) +VHADDPD ymm, ymm, ymm/m256 - - __m256 _mm256_hadd_ps (__m256 a, __m256 b) - VHADDPS ymm, ymm, ymm/m256 - + __m256 _mm256_hadd_ps (__m256 a, __m256 b) +VHADDPS ymm, ymm, ymm/m256 - - __m256d _mm256_hsub_pd (__m256d a, __m256d b) - VHSUBPD ymm, ymm, ymm/m256 - + __m256d _mm256_hsub_pd (__m256d a, __m256d b) +VHSUBPD ymm, ymm, ymm/m256 - - __m256 _mm256_hsub_ps (__m256 a, __m256 b) - VHSUBPS ymm, ymm, ymm/m256 - + __m256 _mm256_hsub_ps (__m256 a, __m256 b) +VHSUBPS ymm, ymm, ymm/m256 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256d _mm256_insertf128_pd (__m256d a, __m128d b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256d _mm256_insertf128_pd (__m256d a, __m128d b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256 _mm256_insertf128_ps (__m256 a, __m128 b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256 _mm256_insertf128_ps (__m256 a, __m128 b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 - - __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) - VINSERTF128 ymm, ymm, xmm/m128, imm8 - + __m256i _mm256_insertf128_si256 (__m256i a, __m128i b, int imm8) +VINSERTF128 ymm, ymm, xmm/m128, imm8 + - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256d _mm256_load_pd (double const * mem_addr) - VMOVAPD ymm, ymm/m256 - + __m256d _mm256_load_pd (double const * mem_addr) +VMOVAPD ymm, ymm/m256 - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256 _mm256_load_ps (float const * mem_addr) - VMOVAPS ymm, ymm/m256 - + __m256 _mm256_load_ps (float const * mem_addr) +VMOVAPS ymm, ymm/m256 - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256i _mm256_load_si256 (__m256i const * mem_addr) - VMOVDQA ymm, m256 - + __m256i _mm256_load_si256 (__m256i const * mem_addr) +VMOVDQA ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) - VLDDQU ymm, m256 - + __m256i _mm256_lddqu_si256 (__m256i const * mem_addr) +VLDDQU ymm, m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m256d _mm256_loadu_pd (double const * mem_addr) - VMOVUPD ymm, ymm/m256 - + __m256d _mm256_loadu_pd (double const * mem_addr) +VMOVUPD ymm, ymm/m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m256 _mm256_loadu_ps (float const * mem_addr) - VMOVUPS ymm, ymm/m256 - + __m256 _mm256_loadu_ps (float const * mem_addr) +VMOVUPS ymm, ymm/m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m256i _mm256_loadu_si256 (__m256i const * mem_addr) - VMOVDQU ymm, m256 - + __m256i _mm256_loadu_si256 (__m256i const * mem_addr) +VMOVDQU ymm, m256 - - __m128d _mm_maskload_pd (double const * mem_addr, __m128i mask) - VMASKMOVPD xmm, xmm, m128 - + __m128d _mm_maskload_pd (double const * mem_addr, __m128i mask) +VMASKMOVPD xmm, xmm, m128 - - __m256d _mm256_maskload_pd (double const * mem_addr, __m256i mask) - VMASKMOVPD ymm, ymm, m256 - + __m256d _mm256_maskload_pd (double const * mem_addr, __m256i mask) +VMASKMOVPD ymm, ymm, m256 - - __m128 _mm_maskload_ps (float const * mem_addr, __m128i mask) - VMASKMOVPS xmm, xmm, m128 - + __m128 _mm_maskload_ps (float const * mem_addr, __m128i mask) +VMASKMOVPS xmm, xmm, m128 - - __m256 _mm256_maskload_ps (float const * mem_addr, __m256i mask) - VMASKMOVPS ymm, ymm, m256 - + __m256 _mm256_maskload_ps (float const * mem_addr, __m256i mask) +VMASKMOVPS ymm, ymm, m256 - - void _mm_maskstore_pd (double * mem_addr, __m128i mask, __m128d a) - VMASKMOVPD m128, xmm, xmm - + void _mm_maskstore_pd (double * mem_addr, __m128i mask, __m128d a) +VMASKMOVPD m128, xmm, xmm - - void _mm256_maskstore_pd (double * mem_addr, __m256i mask, __m256d a) - VMASKMOVPD m256, ymm, ymm - + void _mm256_maskstore_pd (double * mem_addr, __m256i mask, __m256d a) +VMASKMOVPD m256, ymm, ymm - - void _mm_maskstore_ps (float * mem_addr, __m128i mask, __m128 a) - VMASKMOVPS m128, xmm, xmm - + void _mm_maskstore_ps (float * mem_addr, __m128i mask, __m128 a) +VMASKMOVPS m128, xmm, xmm - - void _mm256_maskstore_ps (float * mem_addr, __m256i mask, __m256 a) - VMASKMOVPS m256, ymm, ymm - + void _mm256_maskstore_ps (float * mem_addr, __m256i mask, __m256 a) +VMASKMOVPS m256, ymm, ymm - - __m256d _mm256_max_pd (__m256d a, __m256d b) - VMAXPD ymm, ymm, ymm/m256 - + __m256d _mm256_max_pd (__m256d a, __m256d b) +VMAXPD ymm, ymm, ymm/m256 - - __m256 _mm256_max_ps (__m256 a, __m256 b) - VMAXPS ymm, ymm, ymm/m256 - + __m256 _mm256_max_ps (__m256 a, __m256 b) +VMAXPS ymm, ymm, ymm/m256 - - __m256d _mm256_min_pd (__m256d a, __m256d b) - VMINPD ymm, ymm, ymm/m256 - + __m256d _mm256_min_pd (__m256d a, __m256d b) +VMINPD ymm, ymm, ymm/m256 - - __m256 _mm256_min_ps (__m256 a, __m256 b) - VMINPS ymm, ymm, ymm/m256 - + __m256 _mm256_min_ps (__m256 a, __m256 b) +VMINPS ymm, ymm, ymm/m256 - - int _mm256_movemask_pd (__m256d a) - VMOVMSKPD reg, ymm - + int _mm256_movemask_pd (__m256d a) +VMOVMSKPD reg, ymm - - int _mm256_movemask_ps (__m256 a) - VMOVMSKPS reg, ymm - + int _mm256_movemask_ps (__m256 a) +VMOVMSKPS reg, ymm - - __m256d _mm256_mul_pd (__m256d a, __m256d b) - VMULPD ymm, ymm, ymm/m256 - + __m256d _mm256_mul_pd (__m256d a, __m256d b) +VMULPD ymm, ymm, ymm/m256 - - __m256 _mm256_mul_ps (__m256 a, __m256 b) - VMULPS ymm, ymm, ymm/m256 - + __m256 _mm256_mul_ps (__m256 a, __m256 b) +VMULPS ymm, ymm, ymm/m256 - - __m256d _mm256_or_pd (__m256d a, __m256d b) - VORPD ymm, ymm, ymm/m256 - + __m256d _mm256_or_pd (__m256d a, __m256d b) +VORPD ymm, ymm, ymm/m256 - - __m256 _mm256_or_ps (__m256 a, __m256 b) - VORPS ymm, ymm, ymm/m256 - + __m256 _mm256_or_ps (__m256 a, __m256 b) +VORPS ymm, ymm, ymm/m256 - - __m128d _mm_permute_pd (__m128d a, int imm8) - VPERMILPD xmm, xmm, imm8 - + __m128d _mm_permute_pd (__m128d a, int imm8) +VPERMILPD xmm, xmm, imm8 - - __m128 _mm_permute_ps (__m128 a, int imm8) - VPERMILPS xmm, xmm, imm8 - + __m128 _mm_permute_ps (__m128 a, int imm8) +VPERMILPS xmm, xmm, imm8 - - __m256d _mm256_permute_pd (__m256d a, int imm8) - VPERMILPD ymm, ymm, imm8 - + __m256d _mm256_permute_pd (__m256d a, int imm8) +VPERMILPD ymm, ymm, imm8 - - __m256 _mm256_permute_ps (__m256 a, int imm8) - VPERMILPS ymm, ymm, imm8 - + __m256 _mm256_permute_ps (__m256 a, int imm8) +VPERMILPS ymm, ymm, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256d _mm256_permute2f128_pd (__m256d a, __m256d b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256d _mm256_permute2f128_pd (__m256d a, __m256d b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256 _mm256_permute2f128_ps (__m256 a, __m256 b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256 _mm256_permute2f128_ps (__m256 a, __m256 b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) - VPERM2F128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2f128_si256 (__m256i a, __m256i b, int imm8) +VPERM2F128 ymm, ymm, ymm/m256, imm8 - - __m128d _mm_permutevar_pd (__m128d a, __m128i b) - VPERMILPD xmm, xmm, xmm/m128 - + __m128d _mm_permutevar_pd (__m128d a, __m128i b) +VPERMILPD xmm, xmm, xmm/m128 - - __m128 _mm_permutevar_ps (__m128 a, __m128i b) - VPERMILPS xmm, xmm, xmm/m128 - + __m128 _mm_permutevar_ps (__m128 a, __m128i b) +VPERMILPS xmm, xmm, xmm/m128 - - __m256d _mm256_permutevar_pd (__m256d a, __m256i b) - VPERMILPD ymm, ymm, ymm/m256 - + __m256d _mm256_permutevar_pd (__m256d a, __m256i b) +VPERMILPD ymm, ymm, ymm/m256 - - __m256 _mm256_permutevar_ps (__m256 a, __m256i b) - VPERMILPS ymm, ymm, ymm/m256 - + __m256 _mm256_permutevar_ps (__m256 a, __m256i b) +VPERMILPS ymm, ymm, ymm/m256 - - __m256 _mm256_rcp_ps (__m256 a) - VRCPPS ymm, ymm/m256 - + __m256 _mm256_rcp_ps (__m256 a) +VRCPPS ymm, ymm/m256 - - __m256 _mm256_rsqrt_ps (__m256 a) - VRSQRTPS ymm, ymm/m256 - + __m256 _mm256_rsqrt_ps (__m256 a) +VRSQRTPS ymm, ymm/m256 - - __m256d _mm256_round_pd (__m256d a, _MM_FROUND_CUR_DIRECTION) - VROUNDPD ymm, ymm/m256, imm8(4) - + __m256d _mm256_round_pd (__m256d a, _MM_FROUND_CUR_DIRECTION) +VROUNDPD ymm, ymm/m256, imm8(4) - - __m256 _mm256_round_ps (__m256 a, _MM_FROUND_CUR_DIRECTION) - VROUNDPS ymm, ymm/m256, imm8(4) - + __m256 _mm256_round_ps (__m256 a, _MM_FROUND_CUR_DIRECTION) +VROUNDPS ymm, ymm/m256, imm8(4) - - __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) - VROUNDPD ymm, ymm/m256, imm8(8) - + __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) +VROUNDPD ymm, ymm/m256, imm8(8) - - __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) - VROUNDPS ymm, ymm/m256, imm8(8) - + __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) +VROUNDPS ymm, ymm/m256, imm8(8) - - __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) - VROUNDPD ymm, ymm/m256, imm8(9) - + __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) +VROUNDPD ymm, ymm/m256, imm8(9) - - __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) - VROUNDPS ymm, ymm/m256, imm8(9) - + __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) +VROUNDPS ymm, ymm/m256, imm8(9) - - __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) - VROUNDPD ymm, ymm/m256, imm8(10) - + __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) +VROUNDPD ymm, ymm/m256, imm8(10) - - __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) - VROUNDPS ymm, ymm/m256, imm8(10) - + __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) +VROUNDPS ymm, ymm/m256, imm8(10) - - __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) - VROUNDPD ymm, ymm/m256, imm8(11) - + __m256d _mm256_round_pd (__m256d a, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) +VROUNDPD ymm, ymm/m256, imm8(11) - - __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) - VROUNDPS ymm, ymm/m256, imm8(11) - + __m256 _mm256_round_ps (__m256 a, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) +VROUNDPS ymm, ymm/m256, imm8(11) - - __m256d _mm256_shuffle_pd (__m256d a, __m256d b, const int imm8) - VSHUFPD ymm, ymm, ymm/m256, imm8 - + __m256d _mm256_shuffle_pd (__m256d a, __m256d b, const int imm8) +VSHUFPD ymm, ymm, ymm/m256, imm8 - - __m256 _mm256_shuffle_ps (__m256 a, __m256 b, const int imm8) - VSHUFPS ymm, ymm, ymm/m256, imm8 - + __m256 _mm256_shuffle_ps (__m256 a, __m256 b, const int imm8) +VSHUFPS ymm, ymm, ymm/m256, imm8 - - __m256d _mm256_sqrt_pd (__m256d a) - VSQRTPD ymm, ymm/m256 - + __m256d _mm256_sqrt_pd (__m256d a) +VSQRTPD ymm, ymm/m256 - - __m256 _mm256_sqrt_ps (__m256 a) - VSQRTPS ymm, ymm/m256 - + __m256 _mm256_sqrt_ps (__m256 a) +VSQRTPS ymm, ymm/m256 - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_storeu_pd (double * mem_addr, __m256d a) - MOVUPD m256, ymm - + void _mm256_storeu_pd (double * mem_addr, __m256d a) +MOVUPD m256, ymm - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_storeu_ps (float * mem_addr, __m256 a) - MOVUPS m256, ymm - + void _mm256_storeu_ps (float * mem_addr, __m256 a) +MOVUPS m256, ymm - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) - MOVDQU m256, ymm - + void _mm256_storeu_si256 (__m256i * mem_addr, __m256i a) +MOVDQU m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_store_pd (double * mem_addr, __m256d a) - VMOVAPD m256, ymm - + void _mm256_store_pd (double * mem_addr, __m256d a) +VMOVAPD m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_store_ps (float * mem_addr, __m256 a) - VMOVAPS m256, ymm - + void _mm256_store_ps (float * mem_addr, __m256 a) +VMOVAPS m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_store_si256 (__m256i * mem_addr, __m256i a) - MOVDQA m256, ymm - + void _mm256_store_si256 (__m256i * mem_addr, __m256i a) +MOVDQA m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - void _mm256_stream_pd (double * mem_addr, __m256d a) - MOVNTPD m256, ymm - + void _mm256_stream_pd (double * mem_addr, __m256d a) +MOVNTPD m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - void _mm256_stream_ps (float * mem_addr, __m256 a) - MOVNTPS m256, ymm - + void _mm256_stream_ps (float * mem_addr, __m256 a) +MOVNTPS m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) - VMOVNTDQ m256, ymm - + void _mm256_stream_si256 (__m256i * mem_addr, __m256i a) +VMOVNTDQ m256, ymm - - __m256d _mm256_sub_pd (__m256d a, __m256d b) - VSUBPD ymm, ymm, ymm/m256 - + __m256d _mm256_sub_pd (__m256d a, __m256d b) +VSUBPD ymm, ymm, ymm/m256 - - __m256 _mm256_sub_ps (__m256 a, __m256 b) - VSUBPS ymm, ymm, ymm/m256 - + __m256 _mm256_sub_ps (__m256 a, __m256 b) +VSUBPS ymm, ymm, ymm/m256 - - int _mm_testc_pd (__m128d a, __m128d b) - VTESTPD xmm, xmm/m128 - + int _mm_testc_pd (__m128d a, __m128d b) +VTESTPD xmm, xmm/m128 - - int _mm_testc_ps (__m128 a, __m128 b) - VTESTPS xmm, xmm/m128 - + int _mm_testc_ps (__m128 a, __m128 b) +VTESTPS xmm, xmm/m128 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testc_pd (__m256d a, __m256d b) - VTESTPS ymm, ymm/m256 - + int _mm256_testc_pd (__m256d a, __m256d b) +VTESTPS ymm, ymm/m256 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testc_ps (__m256 a, __m256 b) - VTESTPS ymm, ymm/m256 - + int _mm256_testc_ps (__m256 a, __m256 b) +VTESTPS ymm, ymm/m256 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm_testnzc_pd (__m128d a, __m128d b) - VTESTPD xmm, xmm/m128 - + int _mm_testnzc_pd (__m128d a, __m128d b) +VTESTPD xmm, xmm/m128 - - int _mm_testnzc_ps (__m128 a, __m128 b) - VTESTPS xmm, xmm/m128 - + int _mm_testnzc_ps (__m128 a, __m128 b) +VTESTPS xmm, xmm/m128 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testnzc_pd (__m256d a, __m256d b) - VTESTPD ymm, ymm/m256 - + int _mm256_testnzc_pd (__m256d a, __m256d b) +VTESTPD ymm, ymm/m256 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testnzc_ps (__m256 a, __m256 b) - VTESTPS ymm, ymm/m256 - + int _mm256_testnzc_ps (__m256 a, __m256 b) +VTESTPS ymm, ymm/m256 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testnzc_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testnzc_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm_testz_pd (__m128d a, __m128d b) - VTESTPD xmm, xmm/m128 - + int _mm_testz_pd (__m128d a, __m128d b) +VTESTPD xmm, xmm/m128 - - int _mm_testz_ps (__m128 a, __m128 b) - VTESTPS xmm, xmm/m128 - + int _mm_testz_ps (__m128 a, __m128 b) +VTESTPS xmm, xmm/m128 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testz_pd (__m256d a, __m256d b) - VTESTPD ymm, ymm/m256 - + int _mm256_testz_pd (__m256d a, __m256d b) +VTESTPD ymm, ymm/m256 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testz_ps (__m256 a, __m256 b) - VTESTPS ymm, ymm/m256 - + int _mm256_testz_ps (__m256 a, __m256 b) +VTESTPS ymm, ymm/m256 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - int _mm256_testz_si256 (__m256i a, __m256i b) - VPTEST ymm, ymm/m256 - + int _mm256_testz_si256 (__m256i a, __m256i b) +VPTEST ymm, ymm/m256 - - __m256d _mm256_unpackhi_pd (__m256d a, __m256d b) - VUNPCKHPD ymm, ymm, ymm/m256 - + __m256d _mm256_unpackhi_pd (__m256d a, __m256d b) +VUNPCKHPD ymm, ymm, ymm/m256 - - __m256 _mm256_unpackhi_ps (__m256 a, __m256 b) - VUNPCKHPS ymm, ymm, ymm/m256 - + __m256 _mm256_unpackhi_ps (__m256 a, __m256 b) +VUNPCKHPS ymm, ymm, ymm/m256 - - __m256d _mm256_unpacklo_pd (__m256d a, __m256d b) - VUNPCKLPD ymm, ymm, ymm/m256 - + __m256d _mm256_unpacklo_pd (__m256d a, __m256d b) +VUNPCKLPD ymm, ymm, ymm/m256 - - __m256 _mm256_unpacklo_ps (__m256 a, __m256 b) - VUNPCKLPS ymm, ymm, ymm/m256 - + __m256 _mm256_unpacklo_ps (__m256 a, __m256 b) +VUNPCKLPS ymm, ymm, ymm/m256 - - __m256d _mm256_xor_pd (__m256d a, __m256d b) - VXORPS ymm, ymm, ymm/m256 - + __m256d _mm256_xor_pd (__m256d a, __m256d b) +VXORPS ymm, ymm, ymm/m256 - - __m256 _mm256_xor_ps (__m256 a, __m256 b) - VXORPS ymm, ymm, ymm/m256 - + __m256 _mm256_xor_ps (__m256 a, __m256 b) +VXORPS ymm, ymm, ymm/m256 - - - - This class provides access to Intel AVX2 hardware instructions via intrinsics. + This class provides access to Intel AVX2 hardware instructions via intrinsics - - __m256i _mm256_abs_epi16 (__m256i a) - VPABSW ymm, ymm/m256 - + __m256i _mm256_abs_epi16 (__m256i a) +VPABSW ymm, ymm/m256 - - __m256i _mm256_abs_epi32 (__m256i a) - VPABSD ymm, ymm/m256 - + __m256i _mm256_abs_epi32 (__m256i a) +VPABSD ymm, ymm/m256 - - __m256i _mm256_abs_epi8 (__m256i a) - VPABSB ymm, ymm/m256 - + __m256i _mm256_abs_epi8 (__m256i a) +VPABSB ymm, ymm/m256 - - __m256i _mm256_add_epi8 (__m256i a, __m256i b) - VPADDB ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi8 (__m256i a, __m256i b) +VPADDB ymm, ymm, ymm/m256 - - __m256i _mm256_add_epi16 (__m256i a, __m256i b) - VPADDW ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi16 (__m256i a, __m256i b) +VPADDW ymm, ymm, ymm/m256 - - __m256i _mm256_add_epi32 (__m256i a, __m256i b) - VPADDD ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi32 (__m256i a, __m256i b) +VPADDD ymm, ymm, ymm/m256 - - __m256i _mm256_add_epi64 (__m256i a, __m256i b) - VPADDQ ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi64 (__m256i a, __m256i b) +VPADDQ ymm, ymm, ymm/m256 - - __m256i _mm256_add_epi8 (__m256i a, __m256i b) - VPADDB ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi8 (__m256i a, __m256i b) +VPADDB ymm, ymm, ymm/m256 - - __m256i _mm256_add_epi16 (__m256i a, __m256i b) - VPADDW ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi16 (__m256i a, __m256i b) +VPADDW ymm, ymm, ymm/m256 - - __m256i _mm256_add_epi32 (__m256i a, __m256i b) - VPADDD ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi32 (__m256i a, __m256i b) +VPADDD ymm, ymm, ymm/m256 - - __m256i _mm256_add_epi64 (__m256i a, __m256i b) - VPADDQ ymm, ymm, ymm/m256 - + __m256i _mm256_add_epi64 (__m256i a, __m256i b) +VPADDQ ymm, ymm, ymm/m256 - - __m256i _mm256_adds_epu8 (__m256i a, __m256i b) - VPADDUSB ymm, ymm, ymm/m256 - + __m256i _mm256_adds_epu8 (__m256i a, __m256i b) +VPADDUSB ymm, ymm, ymm/m256 - - __m256i _mm256_adds_epi16 (__m256i a, __m256i b) - VPADDSW ymm, ymm, ymm/m256 - + __m256i _mm256_adds_epi16 (__m256i a, __m256i b) +VPADDSW ymm, ymm, ymm/m256 - - __m256i _mm256_adds_epi8 (__m256i a, __m256i b) - VPADDSB ymm, ymm, ymm/m256 - + __m256i _mm256_adds_epi8 (__m256i a, __m256i b) +VPADDSB ymm, ymm, ymm/m256 - - __m256i _mm256_adds_epu16 (__m256i a, __m256i b) - VPADDUSW ymm, ymm, ymm/m256 - + __m256i _mm256_adds_epu16 (__m256i a, __m256i b) +VPADDUSW ymm, ymm, ymm/m256 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) - VPALIGNR ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_alignr_epi8 (__m256i a, __m256i b, const int count) +VPALIGNR ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_and_si256 (__m256i a, __m256i b) - VPAND ymm, ymm, ymm/m256 - + __m256i _mm256_and_si256 (__m256i a, __m256i b) +VPAND ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_andnot_si256 (__m256i a, __m256i b) - VPANDN ymm, ymm, ymm/m256 - + __m256i _mm256_andnot_si256 (__m256i a, __m256i b) +VPANDN ymm, ymm, ymm/m256 - - __m256i _mm256_avg_epu8 (__m256i a, __m256i b) - VPAVGB ymm, ymm, ymm/m256 - + __m256i _mm256_avg_epu8 (__m256i a, __m256i b) +VPAVGB ymm, ymm, ymm/m256 - - __m256i _mm256_avg_epu16 (__m256i a, __m256i b) - VPAVGW ymm, ymm, ymm/m256 - + __m256i _mm256_avg_epu16 (__m256i a, __m256i b) +VPAVGW ymm, ymm, ymm/m256 - - __m128i _mm_blend_epi32 (__m128i a, __m128i b, const int imm8) - VPBLENDD xmm, xmm, xmm/m128, imm8 - + __m128i _mm_blend_epi32 (__m128i a, __m128i b, const int imm8) +VPBLENDD xmm, xmm, xmm/m128, imm8 - - __m128i _mm_blend_epi32 (__m128i a, __m128i b, const int imm8) - VPBLENDD xmm, xmm, xmm/m128, imm8 - + __m128i _mm_blend_epi32 (__m128i a, __m128i b, const int imm8) +VPBLENDD xmm, xmm, xmm/m128, imm8 - - __m256i _mm256_blend_epi16 (__m256i a, __m256i b, const int imm8) - VPBLENDW ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_blend_epi16 (__m256i a, __m256i b, const int imm8) +VPBLENDW ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_blend_epi32 (__m256i a, __m256i b, const int imm8) - VPBLENDD ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_blend_epi32 (__m256i a, __m256i b, const int imm8) +VPBLENDD ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_blend_epi16 (__m256i a, __m256i b, const int imm8) - VPBLENDW ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_blend_epi16 (__m256i a, __m256i b, const int imm8) +VPBLENDW ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_blend_epi32 (__m256i a, __m256i b, const int imm8) - VPBLENDD ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_blend_epi32 (__m256i a, __m256i b, const int imm8) +VPBLENDD ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) - VPBLENDVB ymm, ymm, ymm/m256, ymm - + __m256i _mm256_blendv_epi8 (__m256i a, __m256i b, __m256i mask) +VPBLENDVB ymm, ymm, ymm/m256, ymm - - __m128i _mm_broadcastb_epi8 (__m128i a) - VPBROADCASTB xmm, m8 - + __m128i _mm_broadcastb_epi8 (__m128i a) +VPBROADCASTB xmm, m8 - - __m128i _mm_broadcastw_epi16 (__m128i a) - VPBROADCASTW xmm, m16 - + __m128i _mm_broadcastw_epi16 (__m128i a) +VPBROADCASTW xmm, m16 - - __m128i _mm_broadcastd_epi32 (__m128i a) - VPBROADCASTD xmm, m32 - + __m128i _mm_broadcastd_epi32 (__m128i a) +VPBROADCASTD xmm, m32 - - __m128i _mm_broadcastq_epi64 (__m128i a) - VPBROADCASTQ xmm, m64 - + __m128i _mm_broadcastq_epi64 (__m128i a) +VPBROADCASTQ xmm, m64 - - __m128i _mm_broadcastb_epi8 (__m128i a) - VPBROADCASTB xmm, xmm - + __m128i _mm_broadcastb_epi8 (__m128i a) +VPBROADCASTB xmm, xmm - - __m128d _mm_broadcastsd_pd (__m128d a) - VMOVDDUP xmm, xmm - + __m128d _mm_broadcastsd_pd (__m128d a) +VMOVDDUP xmm, xmm - - __m128i _mm_broadcastw_epi16 (__m128i a) - VPBROADCASTW xmm, xmm - + __m128i _mm_broadcastw_epi16 (__m128i a) +VPBROADCASTW xmm, xmm - - __m128i _mm_broadcastd_epi32 (__m128i a) - VPBROADCASTD xmm, xmm - + __m128i _mm_broadcastd_epi32 (__m128i a) +VPBROADCASTD xmm, xmm - - __m128i _mm_broadcastq_epi64 (__m128i a) - VPBROADCASTQ xmm, xmm - + __m128i _mm_broadcastq_epi64 (__m128i a) +VPBROADCASTQ xmm, xmm - - __m128i _mm_broadcastb_epi8 (__m128i a) - VPBROADCASTB xmm, xmm - + __m128i _mm_broadcastb_epi8 (__m128i a) +VPBROADCASTB xmm, xmm - - __m128 _mm_broadcastss_ps (__m128 a) - VBROADCASTSS xmm, xmm - + __m128 _mm_broadcastss_ps (__m128 a) +VBROADCASTSS xmm, xmm - - __m128i _mm_broadcastw_epi16 (__m128i a) - VPBROADCASTW xmm, xmm - + __m128i _mm_broadcastw_epi16 (__m128i a) +VPBROADCASTW xmm, xmm - - __m128i _mm_broadcastd_epi32 (__m128i a) - VPBROADCASTD xmm, xmm - + __m128i _mm_broadcastd_epi32 (__m128i a) +VPBROADCASTD xmm, xmm - - __m128i _mm_broadcastq_epi64 (__m128i a) - VPBROADCASTQ xmm, xmm - + __m128i _mm_broadcastq_epi64 (__m128i a) +VPBROADCASTQ xmm, xmm - - __m128i _mm_broadcastb_epi8 (__m128i a) - VPBROADCASTB xmm, m8 - + __m128i _mm_broadcastb_epi8 (__m128i a) +VPBROADCASTB xmm, m8 - - __m128i _mm_broadcastw_epi16 (__m128i a) - VPBROADCASTW xmm, m16 - + __m128i _mm_broadcastw_epi16 (__m128i a) +VPBROADCASTW xmm, m16 - - __m128i _mm_broadcastd_epi32 (__m128i a) - VPBROADCASTD xmm, m32 - + __m128i _mm_broadcastd_epi32 (__m128i a) +VPBROADCASTD xmm, m32 - - __m128i _mm_broadcastq_epi64 (__m128i a) - VPBROADCASTQ xmm, m64 - + __m128i _mm_broadcastq_epi64 (__m128i a) +VPBROADCASTQ xmm, m64 - - __m256i _mm256_broadcastb_epi8 (__m128i a) - VPBROADCASTB ymm, m8 - + __m256i _mm256_broadcastb_epi8 (__m128i a) +VPBROADCASTB ymm, m8 - - __m256i _mm256_broadcastw_epi16 (__m128i a) - VPBROADCASTW ymm, m16 - + __m256i _mm256_broadcastw_epi16 (__m128i a) +VPBROADCASTW ymm, m16 - - __m256i _mm256_broadcastd_epi32 (__m128i a) - VPBROADCASTD ymm, m32 - + __m256i _mm256_broadcastd_epi32 (__m128i a) +VPBROADCASTD ymm, m32 - - __m256i _mm256_broadcastq_epi64 (__m128i a) - VPBROADCASTQ ymm, m64 - + __m256i _mm256_broadcastq_epi64 (__m128i a) +VPBROADCASTQ ymm, m64 - - __m256i _mm256_broadcastb_epi8 (__m128i a) - VPBROADCASTB ymm, xmm - + __m256i _mm256_broadcastb_epi8 (__m128i a) +VPBROADCASTB ymm, xmm - - __m256d _mm256_broadcastsd_pd (__m128d a) - VBROADCASTSD ymm, xmm - + __m256d _mm256_broadcastsd_pd (__m128d a) +VBROADCASTSD ymm, xmm - - __m256i _mm256_broadcastw_epi16 (__m128i a) - VPBROADCASTW ymm, xmm - + __m256i _mm256_broadcastw_epi16 (__m128i a) +VPBROADCASTW ymm, xmm - - __m256i _mm256_broadcastd_epi32 (__m128i a) - VPBROADCASTD ymm, xmm - + __m256i _mm256_broadcastd_epi32 (__m128i a) +VPBROADCASTD ymm, xmm - - __m256i _mm256_broadcastq_epi64 (__m128i a) - VPBROADCASTQ ymm, xmm - + __m256i _mm256_broadcastq_epi64 (__m128i a) +VPBROADCASTQ ymm, xmm - - __m256i _mm256_broadcastb_epi8 (__m128i a) - VPBROADCASTB ymm, xmm - + __m256i _mm256_broadcastb_epi8 (__m128i a) +VPBROADCASTB ymm, xmm - - __m256 _mm256_broadcastss_ps (__m128 a) - VBROADCASTSS ymm, xmm - + __m256 _mm256_broadcastss_ps (__m128 a) +VBROADCASTSS ymm, xmm - - __m256i _mm256_broadcastw_epi16 (__m128i a) - VPBROADCASTW ymm, xmm - + __m256i _mm256_broadcastw_epi16 (__m128i a) +VPBROADCASTW ymm, xmm - - __m256i _mm256_broadcastd_epi32 (__m128i a) - VPBROADCASTD ymm, xmm - + __m256i _mm256_broadcastd_epi32 (__m128i a) +VPBROADCASTD ymm, xmm - - __m256i _mm256_broadcastq_epi64 (__m128i a) - VPBROADCASTQ ymm, xmm - + __m256i _mm256_broadcastq_epi64 (__m128i a) +VPBROADCASTQ ymm, xmm - - __m256i _mm256_broadcastb_epi8 (__m128i a) - VPBROADCASTB ymm, m8 - + __m256i _mm256_broadcastb_epi8 (__m128i a) +VPBROADCASTB ymm, m8 - - __m256i _mm256_broadcastw_epi16 (__m128i a) - VPBROADCASTW ymm, m16 - + __m256i _mm256_broadcastw_epi16 (__m128i a) +VPBROADCASTW ymm, m16 - - __m256i _mm256_broadcastd_epi32 (__m128i a) - VPBROADCASTD ymm, m32 - + __m256i _mm256_broadcastd_epi32 (__m128i a) +VPBROADCASTD ymm, m32 - - __m256i _mm256_broadcastq_epi64 (__m128i a) - VPBROADCASTQ ymm, m64 - + __m256i _mm256_broadcastq_epi64 (__m128i a) +VPBROADCASTQ ymm, m64 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_broadcastsi128_si256 (__m128i a) - VBROADCASTI128 ymm, m128 - + __m256i _mm256_broadcastsi128_si256 (__m128i a) +VBROADCASTI128 ymm, m128 - - __m256i _mm256_cmpeq_epi8 (__m256i a, __m256i b) - VPCMPEQB ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi8 (__m256i a, __m256i b) +VPCMPEQB ymm, ymm, ymm/m256 - - __m256i _mm256_cmpeq_epi16 (__m256i a, __m256i b) - VPCMPEQW ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi16 (__m256i a, __m256i b) +VPCMPEQW ymm, ymm, ymm/m256 - - __m256i _mm256_cmpeq_epi32 (__m256i a, __m256i b) - VPCMPEQD ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi32 (__m256i a, __m256i b) +VPCMPEQD ymm, ymm, ymm/m256 - - __m256i _mm256_cmpeq_epi64 (__m256i a, __m256i b) - VPCMPEQQ ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi64 (__m256i a, __m256i b) +VPCMPEQQ ymm, ymm, ymm/m256 - - __m256i _mm256_cmpeq_epi8 (__m256i a, __m256i b) - VPCMPEQB ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi8 (__m256i a, __m256i b) +VPCMPEQB ymm, ymm, ymm/m256 - - __m256i _mm256_cmpeq_epi16 (__m256i a, __m256i b) - VPCMPEQW ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi16 (__m256i a, __m256i b) +VPCMPEQW ymm, ymm, ymm/m256 - - __m256i _mm256_cmpeq_epi32 (__m256i a, __m256i b) - VPCMPEQD ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi32 (__m256i a, __m256i b) +VPCMPEQD ymm, ymm, ymm/m256 - - __m256i _mm256_cmpeq_epi64 (__m256i a, __m256i b) - VPCMPEQQ ymm, ymm, ymm/m256 - + __m256i _mm256_cmpeq_epi64 (__m256i a, __m256i b) +VPCMPEQQ ymm, ymm, ymm/m256 - - __m256i _mm256_cmpgt_epi16 (__m256i a, __m256i b) - VPCMPGTW ymm, ymm, ymm/m256 - + __m256i _mm256_cmpgt_epi16 (__m256i a, __m256i b) +VPCMPGTW ymm, ymm, ymm/m256 - - __m256i _mm256_cmpgt_epi32 (__m256i a, __m256i b) - VPCMPGTD ymm, ymm, ymm/m256 - + __m256i _mm256_cmpgt_epi32 (__m256i a, __m256i b) +VPCMPGTD ymm, ymm, ymm/m256 - - __m256i _mm256_cmpgt_epi64 (__m256i a, __m256i b) - VPCMPGTQ ymm, ymm, ymm/m256 - + __m256i _mm256_cmpgt_epi64 (__m256i a, __m256i b) +VPCMPGTQ ymm, ymm, ymm/m256 - - __m256i _mm256_cmpgt_epi8 (__m256i a, __m256i b) - VPCMPGTB ymm, ymm, ymm/m256 - + __m256i _mm256_cmpgt_epi8 (__m256i a, __m256i b) +VPCMPGTB ymm, ymm, ymm/m256 - - int _mm256_cvtsi256_si32 (__m256i a) - MOVD reg/m32, xmm - + int _mm256_cvtsi256_si32 (__m256i a) +MOVD reg/m32, xmm - - int _mm256_cvtsi256_si32 (__m256i a) - MOVD reg/m32, xmm - + int _mm256_cvtsi256_si32 (__m256i a) +MOVD reg/m32, xmm @@ -23803,17 +3416,13 @@ - - __m256i _mm256_cvtepu8_epi16 (__m128i a) - VPMOVZXBW ymm, xmm - + __m256i _mm256_cvtepu8_epi16 (__m128i a) +VPMOVZXBW ymm, xmm - - __m256i _mm256_cvtepi8_epi16 (__m128i a) - VPMOVSXBW ymm, xmm/m128 - + __m256i _mm256_cvtepi8_epi16 (__m128i a) +VPMOVSXBW ymm, xmm/m128 @@ -23829,31 +3438,23 @@ - - __m256i _mm256_cvtepu8_epi32 (__m128i a) - VPMOVZXBD ymm, xmm - + __m256i _mm256_cvtepu8_epi32 (__m128i a) +VPMOVZXBD ymm, xmm - - __m256i _mm256_cvtepi16_epi32 (__m128i a) - VPMOVSXWD ymm, xmm/m128 - + __m256i _mm256_cvtepi16_epi32 (__m128i a) +VPMOVSXWD ymm, xmm/m128 - - __m256i _mm256_cvtepi8_epi32 (__m128i a) - VPMOVSXBD ymm, xmm/m128 - + __m256i _mm256_cvtepi8_epi32 (__m128i a) +VPMOVSXBD ymm, xmm/m128 - - __m256i _mm256_cvtepu16_epi32 (__m128i a) - VPMOVZXWD ymm, xmm - + __m256i _mm256_cvtepu16_epi32 (__m128i a) +VPMOVZXWD ymm, xmm @@ -23877,45 +3478,33 @@ - - __m256i _mm256_cvtepu8_epi64 (__m128i a) - VPMOVZXBQ ymm, xmm - + __m256i _mm256_cvtepu8_epi64 (__m128i a) +VPMOVZXBQ ymm, xmm - - __m256i _mm256_cvtepi16_epi64 (__m128i a) - VPMOVSXWQ ymm, xmm/m128 - + __m256i _mm256_cvtepi16_epi64 (__m128i a) +VPMOVSXWQ ymm, xmm/m128 - - __m256i _mm256_cvtepi32_epi64 (__m128i a) - VPMOVSXDQ ymm, xmm/m128 - + __m256i _mm256_cvtepi32_epi64 (__m128i a) +VPMOVSXDQ ymm, xmm/m128 - - __m256i _mm256_cvtepi8_epi64 (__m128i a) - VPMOVSXBQ ymm, xmm/m128 - + __m256i _mm256_cvtepi8_epi64 (__m128i a) +VPMOVSXBQ ymm, xmm/m128 - - __m256i _mm256_cvtepu16_epi64 (__m128i a) - VPMOVZXWQ ymm, xmm - + __m256i _mm256_cvtepu16_epi64 (__m128i a) +VPMOVZXWQ ymm, xmm - - __m256i _mm256_cvtepu32_epi64 (__m128i a) - VPMOVZXDQ ymm, xmm - + __m256i _mm256_cvtepu32_epi64 (__m128i a) +VPMOVZXDQ ymm, xmm @@ -23931,74 +3520,56 @@ - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) - VEXTRACTI128 xmm, ymm, imm8 - + __m128i _mm256_extracti128_si256 (__m256i a, const int imm8) +VEXTRACTI128 xmm, ymm, imm8 - - __m128d _mm_mask_i32gather_pd (__m128d src, double const* base_addr, __m128i vindex, __m128d mask, const int scale) - VGATHERDPD xmm, vm32x, xmm - + __m128d _mm_mask_i32gather_pd (__m128d src, double const* base_addr, __m128i vindex, __m128d mask, const int scale) +VGATHERDPD xmm, vm32x, xmm @@ -24007,10 +3578,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128d _mm_mask_i64gather_pd (__m128d src, double const* base_addr, __m128i vindex, __m128d mask, const int scale) - VGATHERQPD xmm, vm64x, xmm - + __m128d _mm_mask_i64gather_pd (__m128d src, double const* base_addr, __m128i vindex, __m128d mask, const int scale) +VGATHERQPD xmm, vm64x, xmm @@ -24019,10 +3588,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i32gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERDD xmm, vm32x, xmm - + __m128i _mm_mask_i32gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERDD xmm, vm32x, xmm @@ -24031,10 +3598,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERQD xmm, vm64x, xmm - + __m128i _mm_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERQD xmm, vm64x, xmm @@ -24043,10 +3608,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm256_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m256i vindex, __m128i mask, const int scale) - VPGATHERQD xmm, vm32y, xmm - + __m128i _mm256_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m256i vindex, __m128i mask, const int scale) +VPGATHERQD xmm, vm32y, xmm @@ -24055,10 +3618,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i32gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERDQ xmm, vm32x, xmm - + __m128i _mm_mask_i32gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERDQ xmm, vm32x, xmm @@ -24067,10 +3628,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i64gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERQQ xmm, vm64x, xmm - + __m128i _mm_mask_i64gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERQQ xmm, vm64x, xmm @@ -24079,10 +3638,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128 _mm_mask_i32gather_ps (__m128 src, float const* base_addr, __m128i vindex, __m128 mask, const int scale) - VGATHERDPS xmm, vm32x, xmm - + __m128 _mm_mask_i32gather_ps (__m128 src, float const* base_addr, __m128i vindex, __m128 mask, const int scale) +VGATHERDPS xmm, vm32x, xmm @@ -24091,10 +3648,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128 _mm_mask_i64gather_ps (__m128 src, float const* base_addr, __m128i vindex, __m128 mask, const int scale) - VGATHERQPS xmm, vm64x, xmm - + __m128 _mm_mask_i64gather_ps (__m128 src, float const* base_addr, __m128i vindex, __m128 mask, const int scale) +VGATHERQPS xmm, vm64x, xmm @@ -24103,10 +3658,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128 _mm256_mask_i64gather_ps (__m128 src, float const* base_addr, __m256i vindex, __m128 mask, const int scale) - VGATHERQPS xmm, vm32y, xmm - + __m128 _mm256_mask_i64gather_ps (__m128 src, float const* base_addr, __m256i vindex, __m128 mask, const int scale) +VGATHERQPS xmm, vm32y, xmm @@ -24115,10 +3668,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i32gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERDD xmm, vm32x, xmm - + __m128i _mm_mask_i32gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERDD xmm, vm32x, xmm @@ -24127,10 +3678,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERQD xmm, vm64x, xmm - + __m128i _mm_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERQD xmm, vm64x, xmm @@ -24139,10 +3688,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm256_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m256i vindex, __m128i mask, const int scale) - VPGATHERQD xmm, vm32y, xmm - + __m128i _mm256_mask_i64gather_epi32 (__m128i src, int const* base_addr, __m256i vindex, __m128i mask, const int scale) +VPGATHERQD xmm, vm32y, xmm @@ -24151,10 +3698,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i32gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERDQ xmm, vm32x, xmm - + __m128i _mm_mask_i32gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERDQ xmm, vm32x, xmm @@ -24163,10 +3708,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_mask_i64gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) - VPGATHERQQ xmm, vm64x, xmm - + __m128i _mm_mask_i64gather_epi64 (__m128i src, __int64 const* base_addr, __m128i vindex, __m128i mask, const int scale) +VPGATHERQQ xmm, vm64x, xmm @@ -24175,10 +3718,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256d _mm256_mask_i32gather_pd (__m256d src, double const* base_addr, __m128i vindex, __m256d mask, const int scale) - VPGATHERDPD ymm, vm32y, ymm - + __m256d _mm256_mask_i32gather_pd (__m256d src, double const* base_addr, __m128i vindex, __m256d mask, const int scale) +VPGATHERDPD ymm, vm32y, ymm @@ -24187,10 +3728,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256d _mm256_mask_i64gather_pd (__m256d src, double const* base_addr, __m256i vindex, __m256d mask, const int scale) - VGATHERQPD ymm, vm32y, ymm - + __m256d _mm256_mask_i64gather_pd (__m256d src, double const* base_addr, __m256i vindex, __m256d mask, const int scale) +VGATHERQPD ymm, vm32y, ymm @@ -24199,10 +3738,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_mask_i32gather_epi32 (__m256i src, int const* base_addr, __m256i vindex, __m256i mask, const int scale) - VPGATHERDD ymm, vm32y, ymm - + __m256i _mm256_mask_i32gather_epi32 (__m256i src, int const* base_addr, __m256i vindex, __m256i mask, const int scale) +VPGATHERDD ymm, vm32y, ymm @@ -24211,10 +3748,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_mask_i32gather_epi64 (__m256i src, __int64 const* base_addr, __m128i vindex, __m256i mask, const int scale) - VPGATHERDQ ymm, vm32y, ymm - + __m256i _mm256_mask_i32gather_epi64 (__m256i src, __int64 const* base_addr, __m128i vindex, __m256i mask, const int scale) +VPGATHERDQ ymm, vm32y, ymm @@ -24223,10 +3758,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_mask_i64gather_epi64 (__m256i src, __int64 const* base_addr, __m256i vindex, __m256i mask, const int scale) - VPGATHERQQ ymm, vm32y, ymm - + __m256i _mm256_mask_i64gather_epi64 (__m256i src, __int64 const* base_addr, __m256i vindex, __m256i mask, const int scale) +VPGATHERQQ ymm, vm32y, ymm @@ -24235,10 +3768,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256 _mm256_mask_i32gather_ps (__m256 src, float const* base_addr, __m256i vindex, __m256 mask, const int scale) - VPGATHERDPS ymm, vm32y, ymm - + __m256 _mm256_mask_i32gather_ps (__m256 src, float const* base_addr, __m256i vindex, __m256 mask, const int scale) +VPGATHERDPS ymm, vm32y, ymm @@ -24247,10 +3778,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_mask_i32gather_epi32 (__m256i src, int const* base_addr, __m256i vindex, __m256i mask, const int scale) - VPGATHERDD ymm, vm32y, ymm - + __m256i _mm256_mask_i32gather_epi32 (__m256i src, int const* base_addr, __m256i vindex, __m256i mask, const int scale) +VPGATHERDD ymm, vm32y, ymm @@ -24259,10 +3788,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_mask_i32gather_epi64 (__m256i src, __int64 const* base_addr, __m128i vindex, __m256i mask, const int scale) - VPGATHERDQ ymm, vm32y, ymm - + __m256i _mm256_mask_i32gather_epi64 (__m256i src, __int64 const* base_addr, __m128i vindex, __m256i mask, const int scale) +VPGATHERDQ ymm, vm32y, ymm @@ -24271,10 +3798,8 @@ The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_mask_i64gather_epi64 (__m256i src, __int64 const* base_addr, __m256i vindex, __m256i mask, const int scale) - VPGATHERQQ ymm, vm32y, ymm - + __m256i _mm256_mask_i64gather_epi64 (__m256i src, __int64 const* base_addr, __m256i vindex, __m256i mask, const int scale) +VPGATHERQQ ymm, vm32y, ymm @@ -24283,5748 +3808,4303 @@ The scale parameter is not 1, 2, 4 or 8. - - __m128d _mm_i32gather_pd (double const* base_addr, __m128i vindex, const int scale) - VGATHERDPD xmm, vm32x, xmm - + __m128d _mm_i32gather_pd (double const* base_addr, __m128i vindex, const int scale) +VGATHERDPD xmm, vm32x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128d _mm_i64gather_pd (double const* base_addr, __m128i vindex, const int scale) - VGATHERQPD xmm, vm64x, xmm - + __m128d _mm_i64gather_pd (double const* base_addr, __m128i vindex, const int scale) +VGATHERQPD xmm, vm64x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i32gather_epi32 (int const* base_addr, __m128i vindex, const int scale) - VPGATHERDD xmm, vm32x, xmm - + __m128i _mm_i32gather_epi32 (int const* base_addr, __m128i vindex, const int scale) +VPGATHERDD xmm, vm32x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i64gather_epi32 (int const* base_addr, __m128i vindex, const int scale) - VPGATHERQD xmm, vm64x, xmm - + __m128i _mm_i64gather_epi32 (int const* base_addr, __m128i vindex, const int scale) +VPGATHERQD xmm, vm64x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm256_i64gather_epi32 (int const* base_addr, __m256i vindex, const int scale) - VPGATHERQD xmm, vm64y, xmm - + __m128i _mm256_i64gather_epi32 (int const* base_addr, __m256i vindex, const int scale) +VPGATHERQD xmm, vm64y, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) - VPGATHERDQ xmm, vm32x, xmm - + __m128i _mm_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) +VPGATHERDQ xmm, vm32x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i64gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) - VPGATHERQQ xmm, vm64x, xmm - + __m128i _mm_i64gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) +VPGATHERQQ xmm, vm64x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128 _mm_i32gather_ps (float const* base_addr, __m128i vindex, const int scale) - VGATHERDPS xmm, vm32x, xmm - + __m128 _mm_i32gather_ps (float const* base_addr, __m128i vindex, const int scale) +VGATHERDPS xmm, vm32x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128 _mm_i64gather_ps (float const* base_addr, __m128i vindex, const int scale) - VGATHERQPS xmm, vm64x, xmm - + __m128 _mm_i64gather_ps (float const* base_addr, __m128i vindex, const int scale) +VGATHERQPS xmm, vm64x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128 _mm256_i64gather_ps (float const* base_addr, __m256i vindex, const int scale) - VGATHERQPS xmm, vm64y, xmm - + __m128 _mm256_i64gather_ps (float const* base_addr, __m256i vindex, const int scale) +VGATHERQPS xmm, vm64y, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i32gather_epi32 (int const* base_addr, __m128i vindex, const int scale) - VPGATHERDD xmm, vm32x, xmm - + __m128i _mm_i32gather_epi32 (int const* base_addr, __m128i vindex, const int scale) +VPGATHERDD xmm, vm32x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i64gather_epi32 (int const* base_addr, __m128i vindex, const int scale) - VPGATHERQD xmm, vm64x, xmm - + __m128i _mm_i64gather_epi32 (int const* base_addr, __m128i vindex, const int scale) +VPGATHERQD xmm, vm64x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm256_i64gather_epi32 (int const* base_addr, __m256i vindex, const int scale) - VPGATHERQD xmm, vm64y, xmm - + __m128i _mm256_i64gather_epi32 (int const* base_addr, __m256i vindex, const int scale) +VPGATHERQD xmm, vm64y, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) - VPGATHERDQ xmm, vm32x, xmm - + __m128i _mm_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) +VPGATHERDQ xmm, vm32x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m128i _mm_i64gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) - VPGATHERQQ xmm, vm64x, xmm - + __m128i _mm_i64gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) +VPGATHERQQ xmm, vm64x, xmm The scale parameter is not 1, 2, 4 or 8. - - __m256d _mm256_i32gather_pd (double const* base_addr, __m128i vindex, const int scale) - VGATHERDPD ymm, vm32y, ymm - + __m256d _mm256_i32gather_pd (double const* base_addr, __m128i vindex, const int scale) +VGATHERDPD ymm, vm32y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256d _mm256_i64gather_pd (double const* base_addr, __m256i vindex, const int scale) - VGATHERQPD ymm, vm64y, ymm - + __m256d _mm256_i64gather_pd (double const* base_addr, __m256i vindex, const int scale) +VGATHERQPD ymm, vm64y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_i32gather_epi32 (int const* base_addr, __m256i vindex, const int scale) - VPGATHERDD ymm, vm32y, ymm - + __m256i _mm256_i32gather_epi32 (int const* base_addr, __m256i vindex, const int scale) +VPGATHERDD ymm, vm32y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) - VPGATHERDQ ymm, vm32y, ymm - + __m256i _mm256_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) +VPGATHERDQ ymm, vm32y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_i64gather_epi64 (__int64 const* base_addr, __m256i vindex, const int scale) - VPGATHERQQ ymm, vm64y, ymm - + __m256i _mm256_i64gather_epi64 (__int64 const* base_addr, __m256i vindex, const int scale) +VPGATHERQQ ymm, vm64y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256 _mm256_i32gather_ps (float const* base_addr, __m256i vindex, const int scale) - VGATHERDPS ymm, vm32y, ymm - + __m256 _mm256_i32gather_ps (float const* base_addr, __m256i vindex, const int scale) +VGATHERDPS ymm, vm32y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_i32gather_epi32 (int const* base_addr, __m256i vindex, const int scale) - VPGATHERDD ymm, vm32y, ymm - + __m256i _mm256_i32gather_epi32 (int const* base_addr, __m256i vindex, const int scale) +VPGATHERDD ymm, vm32y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) - VPGATHERDQ ymm, vm32y, ymm - + __m256i _mm256_i32gather_epi64 (__int64 const* base_addr, __m128i vindex, const int scale) +VPGATHERDQ ymm, vm32y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_i64gather_epi64 (__int64 const* base_addr, __m256i vindex, const int scale) - VPGATHERQQ ymm, vm64y, ymm - + __m256i _mm256_i64gather_epi64 (__int64 const* base_addr, __m256i vindex, const int scale) +VPGATHERQQ ymm, vm64y, ymm The scale parameter is not 1, 2, 4 or 8. - - __m256i _mm256_hadd_epi16 (__m256i a, __m256i b) - VPHADDW ymm, ymm, ymm/m256 - + __m256i _mm256_hadd_epi16 (__m256i a, __m256i b) +VPHADDW ymm, ymm, ymm/m256 - - __m256i _mm256_hadd_epi32 (__m256i a, __m256i b) - VPHADDD ymm, ymm, ymm/m256 - + __m256i _mm256_hadd_epi32 (__m256i a, __m256i b) +VPHADDD ymm, ymm, ymm/m256 - - __m256i _mm256_hadds_epi16 (__m256i a, __m256i b) - VPHADDSW ymm, ymm, ymm/m256 - + __m256i _mm256_hadds_epi16 (__m256i a, __m256i b) +VPHADDSW ymm, ymm, ymm/m256 - - __m256i _mm256_hsub_epi16 (__m256i a, __m256i b) - VPHSUBW ymm, ymm, ymm/m256 - + __m256i _mm256_hsub_epi16 (__m256i a, __m256i b) +VPHSUBW ymm, ymm, ymm/m256 - - __m256i _mm256_hsub_epi32 (__m256i a, __m256i b) - VPHSUBD ymm, ymm, ymm/m256 - + __m256i _mm256_hsub_epi32 (__m256i a, __m256i b) +VPHSUBD ymm, ymm, ymm/m256 - - __m256i _mm256_hsubs_epi16 (__m256i a, __m256i b) - VPHSUBSW ymm, ymm, ymm/m256 - + __m256i _mm256_hsubs_epi16 (__m256i a, __m256i b) +VPHSUBSW ymm, ymm, ymm/m256 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 - - __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) - VINSERTI128 ymm, ymm, xmm, imm8 - + __m256i _mm256_inserti128_si256 (__m256i a, __m128i b, const int imm8) +VINSERTI128 ymm, ymm, xmm, imm8 + - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) - VMOVNTDQA ymm, m256 - + __m256i _mm256_stream_load_si256 (__m256i const* mem_addr) +VMOVNTDQA ymm, m256 - - __m128i _mm_maskload_epi32 (int const* mem_addr, __m128i mask) - VPMASKMOVD xmm, xmm, m128 - + __m128i _mm_maskload_epi32 (int const* mem_addr, __m128i mask) +VPMASKMOVD xmm, xmm, m128 - - __m256i _mm256_maskload_epi32 (int const* mem_addr, __m256i mask) - VPMASKMOVD ymm, ymm, m256 - + __m256i _mm256_maskload_epi32 (int const* mem_addr, __m256i mask) +VPMASKMOVD ymm, ymm, m256 - - __m128i _mm_maskload_epi64 (__int64 const* mem_addr, __m128i mask) - VPMASKMOVQ xmm, xmm, m128 - + __m128i _mm_maskload_epi64 (__int64 const* mem_addr, __m128i mask) +VPMASKMOVQ xmm, xmm, m128 - - __m256i _mm256_maskload_epi64 (__int64 const* mem_addr, __m256i mask) - VPMASKMOVQ ymm, ymm, m256 - + __m256i _mm256_maskload_epi64 (__int64 const* mem_addr, __m256i mask) +VPMASKMOVQ ymm, ymm, m256 - - __m128i _mm_maskload_epi32 (int const* mem_addr, __m128i mask) - VPMASKMOVD xmm, xmm, m128 - + __m128i _mm_maskload_epi32 (int const* mem_addr, __m128i mask) +VPMASKMOVD xmm, xmm, m128 - - __m256i _mm256_maskload_epi32 (int const* mem_addr, __m256i mask) - VPMASKMOVD ymm, ymm, m256 - + __m256i _mm256_maskload_epi32 (int const* mem_addr, __m256i mask) +VPMASKMOVD ymm, ymm, m256 - - __m128i _mm_maskload_epi64 (__int64 const* mem_addr, __m128i mask) - VPMASKMOVQ xmm, xmm, m128 - + __m128i _mm_maskload_epi64 (__int64 const* mem_addr, __m128i mask) +VPMASKMOVQ xmm, xmm, m128 - - __m256i _mm256_maskload_epi64 (__int64 const* mem_addr, __m256i mask) - VPMASKMOVQ ymm, ymm, m256 - + __m256i _mm256_maskload_epi64 (__int64 const* mem_addr, __m256i mask) +VPMASKMOVQ ymm, ymm, m256 - - void _mm_maskstore_epi32 (int* mem_addr, __m128i mask, __m128i a) - VPMASKMOVD m128, xmm, xmm - + void _mm_maskstore_epi32 (int* mem_addr, __m128i mask, __m128i a) +VPMASKMOVD m128, xmm, xmm - - void _mm256_maskstore_epi32 (int* mem_addr, __m256i mask, __m256i a) - VPMASKMOVD m256, ymm, ymm - + void _mm256_maskstore_epi32 (int* mem_addr, __m256i mask, __m256i a) +VPMASKMOVD m256, ymm, ymm - - void _mm_maskstore_epi64 (__int64* mem_addr, __m128i mask, __m128i a) - VPMASKMOVQ m128, xmm, xmm - + void _mm_maskstore_epi64 (__int64* mem_addr, __m128i mask, __m128i a) +VPMASKMOVQ m128, xmm, xmm - - void _mm256_maskstore_epi64 (__int64* mem_addr, __m256i mask, __m256i a) - VPMASKMOVQ m256, ymm, ymm - + void _mm256_maskstore_epi64 (__int64* mem_addr, __m256i mask, __m256i a) +VPMASKMOVQ m256, ymm, ymm - - void _mm_maskstore_epi32 (int* mem_addr, __m128i mask, __m128i a) - VPMASKMOVD m128, xmm, xmm - + void _mm_maskstore_epi32 (int* mem_addr, __m128i mask, __m128i a) +VPMASKMOVD m128, xmm, xmm - - void _mm256_maskstore_epi32 (int* mem_addr, __m256i mask, __m256i a) - VPMASKMOVD m256, ymm, ymm - + void _mm256_maskstore_epi32 (int* mem_addr, __m256i mask, __m256i a) +VPMASKMOVD m256, ymm, ymm - - void _mm_maskstore_epi64 (__int64* mem_addr, __m128i mask, __m128i a) - VPMASKMOVQ m128, xmm, xmm - + void _mm_maskstore_epi64 (__int64* mem_addr, __m128i mask, __m128i a) +VPMASKMOVQ m128, xmm, xmm - - void _mm256_maskstore_epi64 (__int64* mem_addr, __m256i mask, __m256i a) - VPMASKMOVQ m256, ymm, ymm - + void _mm256_maskstore_epi64 (__int64* mem_addr, __m256i mask, __m256i a) +VPMASKMOVQ m256, ymm, ymm - - __m256i _mm256_max_epu8 (__m256i a, __m256i b) - VPMAXUB ymm, ymm, ymm/m256 - + __m256i _mm256_max_epu8 (__m256i a, __m256i b) +VPMAXUB ymm, ymm, ymm/m256 - - __m256i _mm256_max_epi16 (__m256i a, __m256i b) - VPMAXSW ymm, ymm, ymm/m256 - + __m256i _mm256_max_epi16 (__m256i a, __m256i b) +VPMAXSW ymm, ymm, ymm/m256 - - __m256i _mm256_max_epi32 (__m256i a, __m256i b) - VPMAXSD ymm, ymm, ymm/m256 - + __m256i _mm256_max_epi32 (__m256i a, __m256i b) +VPMAXSD ymm, ymm, ymm/m256 - - __m256i _mm256_max_epi8 (__m256i a, __m256i b) - VPMAXSB ymm, ymm, ymm/m256 - + __m256i _mm256_max_epi8 (__m256i a, __m256i b) +VPMAXSB ymm, ymm, ymm/m256 - - __m256i _mm256_max_epu16 (__m256i a, __m256i b) - VPMAXUW ymm, ymm, ymm/m256 - + __m256i _mm256_max_epu16 (__m256i a, __m256i b) +VPMAXUW ymm, ymm, ymm/m256 - - __m256i _mm256_max_epu32 (__m256i a, __m256i b) - VPMAXUD ymm, ymm, ymm/m256 - + __m256i _mm256_max_epu32 (__m256i a, __m256i b) +VPMAXUD ymm, ymm, ymm/m256 - - __m256i _mm256_min_epu8 (__m256i a, __m256i b) - VPMINUB ymm, ymm, ymm/m256 - + __m256i _mm256_min_epu8 (__m256i a, __m256i b) +VPMINUB ymm, ymm, ymm/m256 - - __m256i _mm256_min_epi16 (__m256i a, __m256i b) - VPMINSW ymm, ymm, ymm/m256 - + __m256i _mm256_min_epi16 (__m256i a, __m256i b) +VPMINSW ymm, ymm, ymm/m256 - - __m256i _mm256_min_epi32 (__m256i a, __m256i b) - VPMINSD ymm, ymm, ymm/m256 - + __m256i _mm256_min_epi32 (__m256i a, __m256i b) +VPMINSD ymm, ymm, ymm/m256 - - __m256i _mm256_min_epi8 (__m256i a, __m256i b) - VPMINSB ymm, ymm, ymm/m256 - + __m256i _mm256_min_epi8 (__m256i a, __m256i b) +VPMINSB ymm, ymm, ymm/m256 - - __m256i _mm256_min_epu16 (__m256i a, __m256i b) - VPMINUW ymm, ymm, ymm/m256 - + __m256i _mm256_min_epu16 (__m256i a, __m256i b) +VPMINUW ymm, ymm, ymm/m256 - - __m256i _mm256_min_epu32 (__m256i a, __m256i b) - VPMINUD ymm, ymm, ymm/m256 - + __m256i _mm256_min_epu32 (__m256i a, __m256i b) +VPMINUD ymm, ymm, ymm/m256 - - int _mm256_movemask_epi8 (__m256i a) - VPMOVMSKB reg, ymm - + int _mm256_movemask_epi8 (__m256i a) +VPMOVMSKB reg, ymm - - int _mm256_movemask_epi8 (__m256i a) - VPMOVMSKB reg, ymm - + int _mm256_movemask_epi8 (__m256i a) +VPMOVMSKB reg, ymm - - __m256i _mm256_mpsadbw_epu8 (__m256i a, __m256i b, const int imm8) - VMPSADBW ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_mpsadbw_epu8 (__m256i a, __m256i b, const int imm8) +VMPSADBW ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_mul_epi32 (__m256i a, __m256i b) - VPMULDQ ymm, ymm, ymm/m256 - + __m256i _mm256_mul_epi32 (__m256i a, __m256i b) +VPMULDQ ymm, ymm, ymm/m256 - - __m256i _mm256_mul_epu32 (__m256i a, __m256i b) - VPMULUDQ ymm, ymm, ymm/m256 - + __m256i _mm256_mul_epu32 (__m256i a, __m256i b) +VPMULUDQ ymm, ymm, ymm/m256 - - __m256i _mm256_maddubs_epi16 (__m256i a, __m256i b) - VPMADDUBSW ymm, ymm, ymm/m256 - + __m256i _mm256_maddubs_epi16 (__m256i a, __m256i b) +VPMADDUBSW ymm, ymm, ymm/m256 - - __m256i _mm256_madd_epi16 (__m256i a, __m256i b) - VPMADDWD ymm, ymm, ymm/m256 - + __m256i _mm256_madd_epi16 (__m256i a, __m256i b) +VPMADDWD ymm, ymm, ymm/m256 - - __m256i _mm256_mulhi_epi16 (__m256i a, __m256i b) - VPMULHW ymm, ymm, ymm/m256 - + __m256i _mm256_mulhi_epi16 (__m256i a, __m256i b) +VPMULHW ymm, ymm, ymm/m256 - - __m256i _mm256_mulhi_epu16 (__m256i a, __m256i b) - VPMULHUW ymm, ymm, ymm/m256 - + __m256i _mm256_mulhi_epu16 (__m256i a, __m256i b) +VPMULHUW ymm, ymm, ymm/m256 - - __m256i _mm256_mulhrs_epi16 (__m256i a, __m256i b) - VPMULHRSW ymm, ymm, ymm/m256 - + __m256i _mm256_mulhrs_epi16 (__m256i a, __m256i b) +VPMULHRSW ymm, ymm, ymm/m256 - - __m256i _mm256_mullo_epi16 (__m256i a, __m256i b) - VPMULLW ymm, ymm, ymm/m256 - + __m256i _mm256_mullo_epi16 (__m256i a, __m256i b) +VPMULLW ymm, ymm, ymm/m256 - - __m256i _mm256_mullo_epi32 (__m256i a, __m256i b) - VPMULLD ymm, ymm, ymm/m256 - + __m256i _mm256_mullo_epi32 (__m256i a, __m256i b) +VPMULLD ymm, ymm, ymm/m256 - - __m256i _mm256_mullo_epi16 (__m256i a, __m256i b) - VPMULLW ymm, ymm, ymm/m256 - + __m256i _mm256_mullo_epi16 (__m256i a, __m256i b) +VPMULLW ymm, ymm, ymm/m256 - - __m256i _mm256_mullo_epi32 (__m256i a, __m256i b) - VPMULLD ymm, ymm, ymm/m256 - + __m256i _mm256_mullo_epi32 (__m256i a, __m256i b) +VPMULLD ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_or_si256 (__m256i a, __m256i b) - VPOR ymm, ymm, ymm/m256 - + __m256i _mm256_or_si256 (__m256i a, __m256i b) +VPOR ymm, ymm, ymm/m256 - - __m256i _mm256_packs_epi16 (__m256i a, __m256i b) - VPACKSSWB ymm, ymm, ymm/m256 - + __m256i _mm256_packs_epi16 (__m256i a, __m256i b) +VPACKSSWB ymm, ymm, ymm/m256 - - __m256i _mm256_packs_epi32 (__m256i a, __m256i b) - VPACKSSDW ymm, ymm, ymm/m256 - + __m256i _mm256_packs_epi32 (__m256i a, __m256i b) +VPACKSSDW ymm, ymm, ymm/m256 - - __m256i _mm256_packus_epi16 (__m256i a, __m256i b) - VPACKUSWB ymm, ymm, ymm/m256 - + __m256i _mm256_packus_epi16 (__m256i a, __m256i b) +VPACKUSWB ymm, ymm, ymm/m256 - - __m256i _mm256_packus_epi32 (__m256i a, __m256i b) - VPACKUSDW ymm, ymm, ymm/m256 - + __m256i _mm256_packus_epi32 (__m256i a, __m256i b) +VPACKUSDW ymm, ymm, ymm/m256 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) - VPERM2I128 ymm, ymm, ymm/m256, imm8 - + __m256i _mm256_permute2x128_si256 (__m256i a, __m256i b, const int imm8) +VPERM2I128 ymm, ymm, ymm/m256, imm8 - - __m256d _mm256_permute4x64_pd (__m256d a, const int imm8) - VPERMPD ymm, ymm/m256, imm8 - + __m256d _mm256_permute4x64_pd (__m256d a, const int imm8) +VPERMPD ymm, ymm/m256, imm8 - - __m256i _mm256_permute4x64_epi64 (__m256i a, const int imm8) - VPERMQ ymm, ymm/m256, imm8 - + __m256i _mm256_permute4x64_epi64 (__m256i a, const int imm8) +VPERMQ ymm, ymm/m256, imm8 - - __m256i _mm256_permute4x64_epi64 (__m256i a, const int imm8) - VPERMQ ymm, ymm/m256, imm8 - + __m256i _mm256_permute4x64_epi64 (__m256i a, const int imm8) +VPERMQ ymm, ymm/m256, imm8 - - __m256i _mm256_permutevar8x32_epi32 (__m256i a, __m256i idx) - VPERMD ymm, ymm/m256, ymm - + __m256i _mm256_permutevar8x32_epi32 (__m256i a, __m256i idx) +VPERMD ymm, ymm/m256, ymm - - __m256 _mm256_permutevar8x32_ps (__m256 a, __m256i idx) - VPERMPS ymm, ymm/m256, ymm - + __m256 _mm256_permutevar8x32_ps (__m256 a, __m256i idx) +VPERMPS ymm, ymm/m256, ymm - - __m256i _mm256_permutevar8x32_epi32 (__m256i a, __m256i idx) - VPERMD ymm, ymm/m256, ymm - + __m256i _mm256_permutevar8x32_epi32 (__m256i a, __m256i idx) +VPERMD ymm, ymm/m256, ymm - - __m256i _mm256_slli_epi16 (__m256i a, int imm8) - VPSLLW ymm, ymm, imm8 - + __m256i _mm256_slli_epi16 (__m256i a, int imm8) +VPSLLW ymm, ymm, imm8 - - __m256i _mm256_sll_epi16 (__m256i a, __m128i count) - VPSLLW ymm, ymm, xmm/m128 - + __m256i _mm256_sll_epi16 (__m256i a, __m128i count) +VPSLLW ymm, ymm, xmm/m128 - - __m256i _mm256_slli_epi32 (__m256i a, int imm8) - VPSLLD ymm, ymm, imm8 - + __m256i _mm256_slli_epi32 (__m256i a, int imm8) +VPSLLD ymm, ymm, imm8 - - __m256i _mm256_sll_epi32 (__m256i a, __m128i count) - VPSLLD ymm, ymm, xmm/m128 - + __m256i _mm256_sll_epi32 (__m256i a, __m128i count) +VPSLLD ymm, ymm, xmm/m128 - - __m256i _mm256_slli_epi64 (__m256i a, int imm8) - VPSLLQ ymm, ymm, imm8 - + __m256i _mm256_slli_epi64 (__m256i a, int imm8) +VPSLLQ ymm, ymm, imm8 - - __m256i _mm256_sll_epi64 (__m256i a, __m128i count) - VPSLLQ ymm, ymm, xmm/m128 - + __m256i _mm256_sll_epi64 (__m256i a, __m128i count) +VPSLLQ ymm, ymm, xmm/m128 - - __m256i _mm256_slli_epi16 (__m256i a, int imm8) - VPSLLW ymm, ymm, imm8 - + __m256i _mm256_slli_epi16 (__m256i a, int imm8) +VPSLLW ymm, ymm, imm8 - - __m256i _mm256_sll_epi16 (__m256i a, __m128i count) - VPSLLW ymm, ymm, xmm/m128 - + __m256i _mm256_sll_epi16 (__m256i a, __m128i count) +VPSLLW ymm, ymm, xmm/m128 - - __m256i _mm256_slli_epi32 (__m256i a, int imm8) - VPSLLD ymm, ymm, imm8 - + __m256i _mm256_slli_epi32 (__m256i a, int imm8) +VPSLLD ymm, ymm, imm8 - - __m256i _mm256_sll_epi32 (__m256i a, __m128i count) - VPSLLD ymm, ymm, xmm/m128 - + __m256i _mm256_sll_epi32 (__m256i a, __m128i count) +VPSLLD ymm, ymm, xmm/m128 - - __m256i _mm256_slli_epi64 (__m256i a, int imm8) - VPSLLQ ymm, ymm, imm8 - + __m256i _mm256_slli_epi64 (__m256i a, int imm8) +VPSLLQ ymm, ymm, imm8 - - __m256i _mm256_sll_epi64 (__m256i a, __m128i count) - VPSLLQ ymm, ymm, xmm/m128 - + __m256i _mm256_sll_epi64 (__m256i a, __m128i count) +VPSLLQ ymm, ymm, xmm/m128 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) - VPSLLDQ ymm, ymm, imm8 - + __m256i _mm256_bslli_epi128 (__m256i a, const int imm8) +VPSLLDQ ymm, ymm, imm8 - - __m128i _mm_sllv_epi32 (__m128i a, __m128i count) - VPSLLVD xmm, ymm, xmm/m128 - + __m128i _mm_sllv_epi32 (__m128i a, __m128i count) +VPSLLVD xmm, ymm, xmm/m128 - - __m128i _mm_sllv_epi64 (__m128i a, __m128i count) - VPSLLVQ xmm, ymm, xmm/m128 - + __m128i _mm_sllv_epi64 (__m128i a, __m128i count) +VPSLLVQ xmm, ymm, xmm/m128 - - __m128i _mm_sllv_epi32 (__m128i a, __m128i count) - VPSLLVD xmm, ymm, xmm/m128 - + __m128i _mm_sllv_epi32 (__m128i a, __m128i count) +VPSLLVD xmm, ymm, xmm/m128 - - __m128i _mm_sllv_epi64 (__m128i a, __m128i count) - VPSLLVQ xmm, ymm, xmm/m128 - + __m128i _mm_sllv_epi64 (__m128i a, __m128i count) +VPSLLVQ xmm, ymm, xmm/m128 - - __m256i _mm256_sllv_epi32 (__m256i a, __m256i count) - VPSLLVD ymm, ymm, ymm/m256 - + __m256i _mm256_sllv_epi32 (__m256i a, __m256i count) +VPSLLVD ymm, ymm, ymm/m256 - - __m256i _mm256_sllv_epi64 (__m256i a, __m256i count) - VPSLLVQ ymm, ymm, ymm/m256 - + __m256i _mm256_sllv_epi64 (__m256i a, __m256i count) +VPSLLVQ ymm, ymm, ymm/m256 - - __m256i _mm256_sllv_epi32 (__m256i a, __m256i count) - VPSLLVD ymm, ymm, ymm/m256 - + __m256i _mm256_sllv_epi32 (__m256i a, __m256i count) +VPSLLVD ymm, ymm, ymm/m256 - - __m256i _mm256_sllv_epi64 (__m256i a, __m256i count) - VPSLLVQ ymm, ymm, ymm/m256 - + __m256i _mm256_sllv_epi64 (__m256i a, __m256i count) +VPSLLVQ ymm, ymm, ymm/m256 - - __m256i _mm256_srai_epi16 (__m256i a, int imm8) - VPSRAW ymm, ymm, imm8 - + __m256i _mm256_srai_epi16 (__m256i a, int imm8) +VPSRAW ymm, ymm, imm8 - - _mm256_sra_epi16 (__m256i a, __m128i count) - VPSRAW ymm, ymm, xmm/m128 - + _mm256_sra_epi16 (__m256i a, __m128i count) +VPSRAW ymm, ymm, xmm/m128 - - __m256i _mm256_srai_epi32 (__m256i a, int imm8) - VPSRAD ymm, ymm, imm8 - + __m256i _mm256_srai_epi32 (__m256i a, int imm8) +VPSRAD ymm, ymm, imm8 - - _mm256_sra_epi32 (__m256i a, __m128i count) - VPSRAD ymm, ymm, xmm/m128 - + _mm256_sra_epi32 (__m256i a, __m128i count) +VPSRAD ymm, ymm, xmm/m128 - - __m128i _mm_srav_epi32 (__m128i a, __m128i count) - VPSRAVD xmm, xmm, xmm/m128 - + __m128i _mm_srav_epi32 (__m128i a, __m128i count) +VPSRAVD xmm, xmm, xmm/m128 - - __m256i _mm256_srav_epi32 (__m256i a, __m256i count) - VPSRAVD ymm, ymm, ymm/m256 - + __m256i _mm256_srav_epi32 (__m256i a, __m256i count) +VPSRAVD ymm, ymm, ymm/m256 - - __m256i _mm256_srli_epi16 (__m256i a, int imm8) - VPSRLW ymm, ymm, imm8 - + __m256i _mm256_srli_epi16 (__m256i a, int imm8) +VPSRLW ymm, ymm, imm8 - - __m256i _mm256_srl_epi16 (__m256i a, __m128i count) - VPSRLW ymm, ymm, xmm/m128 - + __m256i _mm256_srl_epi16 (__m256i a, __m128i count) +VPSRLW ymm, ymm, xmm/m128 - - __m256i _mm256_srli_epi32 (__m256i a, int imm8) - VPSRLD ymm, ymm, imm8 - + __m256i _mm256_srli_epi32 (__m256i a, int imm8) +VPSRLD ymm, ymm, imm8 - - __m256i _mm256_srl_epi32 (__m256i a, __m128i count) - VPSRLD ymm, ymm, xmm/m128 - + __m256i _mm256_srl_epi32 (__m256i a, __m128i count) +VPSRLD ymm, ymm, xmm/m128 - - __m256i _mm256_srli_epi64 (__m256i a, int imm8) - VPSRLQ ymm, ymm, imm8 - + __m256i _mm256_srli_epi64 (__m256i a, int imm8) +VPSRLQ ymm, ymm, imm8 - - __m256i _mm256_srl_epi64 (__m256i a, __m128i count) - VPSRLQ ymm, ymm, xmm/m128 - + __m256i _mm256_srl_epi64 (__m256i a, __m128i count) +VPSRLQ ymm, ymm, xmm/m128 - - __m256i _mm256_srli_epi16 (__m256i a, int imm8) - VPSRLW ymm, ymm, imm8 - + __m256i _mm256_srli_epi16 (__m256i a, int imm8) +VPSRLW ymm, ymm, imm8 - - __m256i _mm256_srl_epi16 (__m256i a, __m128i count) - VPSRLW ymm, ymm, xmm/m128 - + __m256i _mm256_srl_epi16 (__m256i a, __m128i count) +VPSRLW ymm, ymm, xmm/m128 - - __m256i _mm256_srli_epi32 (__m256i a, int imm8) - VPSRLD ymm, ymm, imm8 - + __m256i _mm256_srli_epi32 (__m256i a, int imm8) +VPSRLD ymm, ymm, imm8 - - __m256i _mm256_srl_epi32 (__m256i a, __m128i count) - VPSRLD ymm, ymm, xmm/m128 - + __m256i _mm256_srl_epi32 (__m256i a, __m128i count) +VPSRLD ymm, ymm, xmm/m128 - - __m256i _mm256_srli_epi64 (__m256i a, int imm8) - VPSRLQ ymm, ymm, imm8 - + __m256i _mm256_srli_epi64 (__m256i a, int imm8) +VPSRLQ ymm, ymm, imm8 - - __m256i _mm256_srl_epi64 (__m256i a, __m128i count) - VPSRLQ ymm, ymm, xmm/m128 - + __m256i _mm256_srl_epi64 (__m256i a, __m128i count) +VPSRLQ ymm, ymm, xmm/m128 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) - VPSRLDQ ymm, ymm, imm8 - + __m256i _mm256_bsrli_epi128 (__m256i a, const int imm8) +VPSRLDQ ymm, ymm, imm8 - - __m128i _mm_srlv_epi32 (__m128i a, __m128i count) - VPSRLVD xmm, xmm, xmm/m128 - + __m128i _mm_srlv_epi32 (__m128i a, __m128i count) +VPSRLVD xmm, xmm, xmm/m128 - - __m128i _mm_srlv_epi64 (__m128i a, __m128i count) - VPSRLVQ xmm, xmm, xmm/m128 - + __m128i _mm_srlv_epi64 (__m128i a, __m128i count) +VPSRLVQ xmm, xmm, xmm/m128 - - __m128i _mm_srlv_epi32 (__m128i a, __m128i count) - VPSRLVD xmm, xmm, xmm/m128 - + __m128i _mm_srlv_epi32 (__m128i a, __m128i count) +VPSRLVD xmm, xmm, xmm/m128 - - __m128i _mm_srlv_epi64 (__m128i a, __m128i count) - VPSRLVQ xmm, xmm, xmm/m128 - + __m128i _mm_srlv_epi64 (__m128i a, __m128i count) +VPSRLVQ xmm, xmm, xmm/m128 - - __m256i _mm256_srlv_epi32 (__m256i a, __m256i count) - VPSRLVD ymm, ymm, ymm/m256 - + __m256i _mm256_srlv_epi32 (__m256i a, __m256i count) +VPSRLVD ymm, ymm, ymm/m256 - - __m256i _mm256_srlv_epi64 (__m256i a, __m256i count) - VPSRLVQ ymm, ymm, ymm/m256 - + __m256i _mm256_srlv_epi64 (__m256i a, __m256i count) +VPSRLVQ ymm, ymm, ymm/m256 - - __m256i _mm256_srlv_epi32 (__m256i a, __m256i count) - VPSRLVD ymm, ymm, ymm/m256 - + __m256i _mm256_srlv_epi32 (__m256i a, __m256i count) +VPSRLVD ymm, ymm, ymm/m256 - - __m256i _mm256_srlv_epi64 (__m256i a, __m256i count) - VPSRLVQ ymm, ymm, ymm/m256 - + __m256i _mm256_srlv_epi64 (__m256i a, __m256i count) +VPSRLVQ ymm, ymm, ymm/m256 - - __m256i _mm256_shuffle_epi8 (__m256i a, __m256i b) - VPSHUFB ymm, ymm, ymm/m256 - + __m256i _mm256_shuffle_epi8 (__m256i a, __m256i b) +VPSHUFB ymm, ymm, ymm/m256 - - __m256i _mm256_shuffle_epi32 (__m256i a, const int imm8) - VPSHUFD ymm, ymm/m256, imm8 - + __m256i _mm256_shuffle_epi32 (__m256i a, const int imm8) +VPSHUFD ymm, ymm/m256, imm8 - - __m256i _mm256_shuffle_epi8 (__m256i a, __m256i b) - VPSHUFB ymm, ymm, ymm/m256 - + __m256i _mm256_shuffle_epi8 (__m256i a, __m256i b) +VPSHUFB ymm, ymm, ymm/m256 - - __m256i _mm256_shuffle_epi32 (__m256i a, const int imm8) - VPSHUFD ymm, ymm/m256, imm8 - + __m256i _mm256_shuffle_epi32 (__m256i a, const int imm8) +VPSHUFD ymm, ymm/m256, imm8 - - __m256i _mm256_shufflehi_epi16 (__m256i a, const int imm8) - VPSHUFHW ymm, ymm/m256, imm8 - + __m256i _mm256_shufflehi_epi16 (__m256i a, const int imm8) +VPSHUFHW ymm, ymm/m256, imm8 - - __m256i _mm256_shufflehi_epi16 (__m256i a, const int imm8) - VPSHUFHW ymm, ymm/m256, imm8 - + __m256i _mm256_shufflehi_epi16 (__m256i a, const int imm8) +VPSHUFHW ymm, ymm/m256, imm8 - - __m256i _mm256_shufflelo_epi16 (__m256i a, const int imm8) - VPSHUFLW ymm, ymm/m256, imm8 - + __m256i _mm256_shufflelo_epi16 (__m256i a, const int imm8) +VPSHUFLW ymm, ymm/m256, imm8 - - __m256i _mm256_shufflelo_epi16 (__m256i a, const int imm8) - VPSHUFLW ymm, ymm/m256, imm8 - + __m256i _mm256_shufflelo_epi16 (__m256i a, const int imm8) +VPSHUFLW ymm, ymm/m256, imm8 - - __m256i _mm256_sign_epi16 (__m256i a, __m256i b) - VPSIGNW ymm, ymm, ymm/m256 - + __m256i _mm256_sign_epi16 (__m256i a, __m256i b) +VPSIGNW ymm, ymm, ymm/m256 - - __m256i _mm256_sign_epi32 (__m256i a, __m256i b) - VPSIGND ymm, ymm, ymm/m256 - + __m256i _mm256_sign_epi32 (__m256i a, __m256i b) +VPSIGND ymm, ymm, ymm/m256 - - __m256i _mm256_sign_epi8 (__m256i a, __m256i b) - VPSIGNB ymm, ymm, ymm/m256 - + __m256i _mm256_sign_epi8 (__m256i a, __m256i b) +VPSIGNB ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi8 (__m256i a, __m256i b) - VPSUBB ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi8 (__m256i a, __m256i b) +VPSUBB ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi16 (__m256i a, __m256i b) - VPSUBW ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi16 (__m256i a, __m256i b) +VPSUBW ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi32 (__m256i a, __m256i b) - VPSUBD ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi32 (__m256i a, __m256i b) +VPSUBD ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi64 (__m256i a, __m256i b) - VPSUBQ ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi64 (__m256i a, __m256i b) +VPSUBQ ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi8 (__m256i a, __m256i b) - VPSUBB ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi8 (__m256i a, __m256i b) +VPSUBB ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi16 (__m256i a, __m256i b) - VPSUBW ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi16 (__m256i a, __m256i b) +VPSUBW ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi32 (__m256i a, __m256i b) - VPSUBD ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi32 (__m256i a, __m256i b) +VPSUBD ymm, ymm, ymm/m256 - - __m256i _mm256_sub_epi64 (__m256i a, __m256i b) - VPSUBQ ymm, ymm, ymm/m256 - + __m256i _mm256_sub_epi64 (__m256i a, __m256i b) +VPSUBQ ymm, ymm, ymm/m256 - - __m256i _mm256_subs_epu8 (__m256i a, __m256i b) - VPSUBUSB ymm, ymm, ymm/m256 - + __m256i _mm256_subs_epu8 (__m256i a, __m256i b) +VPSUBUSB ymm, ymm, ymm/m256 - - __m256i _mm256_subs_epi16 (__m256i a, __m256i b) - VPSUBSW ymm, ymm, ymm/m256 - + __m256i _mm256_subs_epi16 (__m256i a, __m256i b) +VPSUBSW ymm, ymm, ymm/m256 - - __m256i _mm256_subs_epi8 (__m256i a, __m256i b) - VPSUBSB ymm, ymm, ymm/m256 - + __m256i _mm256_subs_epi8 (__m256i a, __m256i b) +VPSUBSB ymm, ymm, ymm/m256 - - __m256i _mm256_subs_epu16 (__m256i a, __m256i b) - VPSUBUSW ymm, ymm, ymm/m256 - + __m256i _mm256_subs_epu16 (__m256i a, __m256i b) +VPSUBUSW ymm, ymm, ymm/m256 - - __m256i _mm256_sad_epu8 (__m256i a, __m256i b) - VPSADBW ymm, ymm, ymm/m256 - + __m256i _mm256_sad_epu8 (__m256i a, __m256i b) +VPSADBW ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi8 (__m256i a, __m256i b) - VPUNPCKHBW ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi8 (__m256i a, __m256i b) +VPUNPCKHBW ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi16 (__m256i a, __m256i b) - VPUNPCKHWD ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi16 (__m256i a, __m256i b) +VPUNPCKHWD ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi32 (__m256i a, __m256i b) - VPUNPCKHDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi32 (__m256i a, __m256i b) +VPUNPCKHDQ ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi64 (__m256i a, __m256i b) - VPUNPCKHQDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi64 (__m256i a, __m256i b) +VPUNPCKHQDQ ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi8 (__m256i a, __m256i b) - VPUNPCKHBW ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi8 (__m256i a, __m256i b) +VPUNPCKHBW ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi16 (__m256i a, __m256i b) - VPUNPCKHWD ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi16 (__m256i a, __m256i b) +VPUNPCKHWD ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi32 (__m256i a, __m256i b) - VPUNPCKHDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi32 (__m256i a, __m256i b) +VPUNPCKHDQ ymm, ymm, ymm/m256 - - __m256i _mm256_unpackhi_epi64 (__m256i a, __m256i b) - VPUNPCKHQDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpackhi_epi64 (__m256i a, __m256i b) +VPUNPCKHQDQ ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi8 (__m256i a, __m256i b) - VPUNPCKLBW ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi8 (__m256i a, __m256i b) +VPUNPCKLBW ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi16 (__m256i a, __m256i b) - VPUNPCKLWD ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi16 (__m256i a, __m256i b) +VPUNPCKLWD ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi32 (__m256i a, __m256i b) - VPUNPCKLDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi32 (__m256i a, __m256i b) +VPUNPCKLDQ ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi64 (__m256i a, __m256i b) - VPUNPCKLQDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi64 (__m256i a, __m256i b) +VPUNPCKLQDQ ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi8 (__m256i a, __m256i b) - VPUNPCKLBW ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi8 (__m256i a, __m256i b) +VPUNPCKLBW ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi16 (__m256i a, __m256i b) - VPUNPCKLWD ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi16 (__m256i a, __m256i b) +VPUNPCKLWD ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi32 (__m256i a, __m256i b) - VPUNPCKLDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi32 (__m256i a, __m256i b) +VPUNPCKLDQ ymm, ymm, ymm/m256 - - __m256i _mm256_unpacklo_epi64 (__m256i a, __m256i b) - VPUNPCKLQDQ ymm, ymm, ymm/m256 - + __m256i _mm256_unpacklo_epi64 (__m256i a, __m256i b) +VPUNPCKLQDQ ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_xor_si256 (__m256i a, __m256i b) - VPXOR ymm, ymm, ymm/m256 - - - - - - - - - - __m128i _mm_dpbusd_epi32 (__m128i src, __m128i a, __m128i b) VPDPBUSD xmm, xmm, xmm/m128 - - - - - - __m128i _mm_dpwssd_epi32 (__m128i src, __m128i a, __m128i b) VPDPWSSD xmm, xmm, xmm/m128 - - - - - - __m256i _mm256_dpbusd_epi32 (__m256i src, __m256i a, __m256i b) VPDPBUSD ymm, ymm, ymm/m256 - - - - - - __m256i _mm256_dpwssd_epi32 (__m256i src, __m256i a, __m256i b) VPDPWSSD ymm, ymm, ymm/m256 - - - - - - __m128i _mm_dpbusds_epi32 (__m128i src, __m128i a, __m128i b) VPDPBUSDS xmm, xmm, xmm/m128 - - - - - - __m128i _mm_dpwssds_epi32 (__m128i src, __m128i a, __m128i b) VPDPWSSDS xmm, xmm, xmm/m128 - + __m256i _mm256_xor_si256 (__m256i a, __m256i b) +VPXOR ymm, ymm, ymm/m256 - - __m256i _mm256_dpbusds_epi32 (__m256i src, __m256i a, __m256i b) VPDPBUSDS ymm, ymm, ymm/m256 - - - - - - __m256i _mm256_dpwssds_epi32 (__m256i src, __m256i a, __m256i b) VPDPWSSDS ymm, ymm, ymm/m256 - - - - - - - This class provides access to Intel BMI1 hardware instructions via intrinsics. - - unsigned int _andn_u32 (unsigned int a, unsigned int b) - ANDN r32a, r32b, reg/m32 - + unsigned int _andn_u32 (unsigned int a, unsigned int b) +ANDN r32a, r32b, reg/m32 - - unsigned int _bextr_u32 (unsigned int a, unsigned int start, unsigned int len) - BEXTR r32a, reg/m32, r32b - + unsigned int _bextr_u32 (unsigned int a, unsigned int start, unsigned int len) +BEXTR r32a, reg/m32, r32b - - unsigned int _bextr2_u32 (unsigned int a, unsigned int control) - BEXTR r32a, reg/m32, r32b - + unsigned int _bextr2_u32 (unsigned int a, unsigned int control) +BEXTR r32a, reg/m32, r32b - - unsigned int _blsi_u32 (unsigned int a) - BLSI reg, reg/m32 - + unsigned int _blsi_u32 (unsigned int a) +BLSI reg, reg/m32 - - unsigned int _blsmsk_u32 (unsigned int a) - BLSMSK reg, reg/m32 - + unsigned int _blsmsk_u32 (unsigned int a) +BLSMSK reg, reg/m32 + - - unsigned int _blsr_u32 (unsigned int a) - BLSR reg, reg/m32 - + unsigned int _blsr_u32 (unsigned int a) +BLSR reg, reg/m32 - - int _mm_tzcnt_32 (unsigned int a) - TZCNT reg, reg/m32 - + int _mm_tzcnt_32 (unsigned int a) +TZCNT reg, reg/m32 - - - unsigned __int64 _andn_u64 (unsigned __int64 a, unsigned __int64 b) - ANDN r64a, r64b, reg/m64 - + unsigned __int64 _andn_u64 (unsigned __int64 a, unsigned __int64 b) +ANDN r64a, r64b, reg/m64 - - unsigned __int64 _bextr_u64 (unsigned __int64 a, unsigned int start, unsigned int len) - BEXTR r64a, reg/m64, r64b - + unsigned __int64 _bextr_u64 (unsigned __int64 a, unsigned int start, unsigned int len) +BEXTR r64a, reg/m64, r64b - - unsigned __int64 _bextr2_u64 (unsigned __int64 a, unsigned __int64 control) - BEXTR r64a, reg/m64, r64b - + unsigned __int64 _bextr2_u64 (unsigned __int64 a, unsigned __int64 control) +BEXTR r64a, reg/m64, r64b - - unsigned __int64 _blsi_u64 (unsigned __int64 a) - BLSI reg, reg/m64 - + unsigned __int64 _blsi_u64 (unsigned __int64 a) +BLSI reg, reg/m64 - - unsigned __int64 _blsmsk_u64 (unsigned __int64 a) - BLSMSK reg, reg/m64 - + unsigned __int64 _blsmsk_u64 (unsigned __int64 a) +BLSMSK reg, reg/m64 + - - unsigned __int64 _blsr_u64 (unsigned __int64 a) - BLSR reg, reg/m64 - + unsigned __int64 _blsr_u64 (unsigned __int64 a) +BLSR reg, reg/m64 - - __int64 _mm_tzcnt_64 (unsigned __int64 a) - TZCNT reg, reg/m64 - + __int64 _mm_tzcnt_64 (unsigned __int64 a) +TZCNT reg, reg/m64 - This class provides access to Intel BMI2 hardware instructions via intrinsics. + - - unsigned int _mulx_u32 (unsigned int a, unsigned int b, unsigned int* hi) - MULX r32a, r32b, reg/m32 - + unsigned int _mulx_u32 (unsigned int a, unsigned int b, unsigned int* hi) +MULX r32a, r32b, reg/m32 - - unsigned int _mulx_u32 (unsigned int a, unsigned int b, unsigned int* hi) - MULX r32a, r32b, reg/m32 - + unsigned int _mulx_u32 (unsigned int a, unsigned int b, unsigned int* hi) +MULX r32a, r32b, reg/m32 - - unsigned int _pdep_u32 (unsigned int a, unsigned int mask) - PDEP r32a, r32b, reg/m32 - + unsigned int _pdep_u32 (unsigned int a, unsigned int mask) +PDEP r32a, r32b, reg/m32 - - unsigned int _pext_u32 (unsigned int a, unsigned int mask) - PEXT r32a, r32b, reg/m32 - + unsigned int _pext_u32 (unsigned int a, unsigned int mask) +PEXT r32a, r32b, reg/m32 - - - unsigned int _bzhi_u32 (unsigned int a, unsigned int index) - BZHI r32a, reg/m32, r32b - - - - - + - - unsigned __int64 _mulx_u64 (unsigned __int64 a, unsigned __int64 b, unsigned __int64* hi) - MULX r64a, r64b, reg/m64 - + unsigned __int64 _mulx_u64 (unsigned __int64 a, unsigned __int64 b, unsigned __int64* hi) +MULX r64a, r64b, reg/m64 - - unsigned __int64 _mulx_u64 (unsigned __int64 a, unsigned __int64 b, unsigned __int64* hi) - MULX r64a, r64b, reg/m64 - + unsigned __int64 _mulx_u64 (unsigned __int64 a, unsigned __int64 b, unsigned __int64* hi) +MULX r64a, r64b, reg/m64 - - unsigned __int64 _pdep_u64 (unsigned __int64 a, unsigned __int64 mask) - PDEP r64a, r64b, reg/m64 - + unsigned __int64 _pdep_u64 (unsigned __int64 a, unsigned __int64 mask) +PDEP r64a, r64b, reg/m64 - - unsigned __int64 _pext_u64 (unsigned __int64 a, unsigned __int64 mask) - PEXT r64a, r64b, reg/m64 - + unsigned __int64 _pext_u64 (unsigned __int64 a, unsigned __int64 mask) +PEXT r64a, r64b, reg/m64 - - unsigned __int64 _bzhi_u64 (unsigned __int64 a, unsigned int index) - BZHI r64a, reg/m32, r64b - + unsigned __int64 _bzhi_u64 (unsigned __int64 a, unsigned int index) +BZHI r64a, reg/m32, r64b + + + + + unsigned int _bzhi_u32 (unsigned int a, unsigned int index) +BZHI r32a, reg/m32, r32b - - _CMP_EQ_OQ. + _CMP_EQ_OQ - _CMP_EQ_OS. + _CMP_EQ_OS - _CMP_FALSE_OQ. + _CMP_FALSE_OQ - _CMP_FALSE_OS. + _CMP_FALSE_OS - _CMP_GT_OQ. + _CMP_GT_OQ - _CMP_GE_OQ. + _CMP_GE_OQ - _CMP_GE_OS. + _CMP_GE_OS - _CMP_GT_OS. + _CMP_GT_OS - _CMP_LT_OQ. + _CMP_LT_OQ - _CMP_LE_OQ. + _CMP_LE_OQ - _CMP_LE_OS. + _CMP_LE_OS - _CMP_LT_OS. + _CMP_LT_OS - _CMP_ORD_Q. + _CMP_ORD_Q - _CMP_NEQ_OQ. + _CMP_NEQ_OQ - _CMP_NEQ_OS. + _CMP_NEQ_OS - _CMP_ORD_S. + _CMP_ORD_S - _CMP_EQ_UQ. + _CMP_EQ_UQ - _CMP_EQ_US. + _CMP_EQ_US - _CMP_UNORD_Q. + _CMP_UNORD_Q - _CMP_NEQ_UQ. + _CMP_NEQ_UQ - _CMP_NEQ_US. + _CMP_NEQ_US - _CMP_NGT_UQ. + _CMP_NGT_UQ - _CMP_NGE_UQ. + _CMP_NGE_UQ - _CMP_NGE_US. + _CMP_NGE_US - _CMP_NGT_US. + _CMP_NGT_US - _CMP_NLT_UQ. + _CMP_NLT_UQ - _CMP_NLE_UQ. + _CMP_NLE_UQ - _CMP_NLE_US. + _CMP_NLE_US - _CMP_NLT_US. + _CMP_NLT_US - _CMP_UNORD_S. + _CMP_UNORD_S - _CMP_TRUE_UQ. + _CMP_TRUE_UQ - _CMP_TRUE_US. + _CMP_TRUE_US This class provides access to Intel FMA hardware instructions via intrinsics. + - - __m128d _mm_fmadd_pd (__m128d a, __m128d b, __m128d c) - VFMADDPD xmm, xmm, xmm/m128 - + __m128d _mm_fmadd_pd (__m128d a, __m128d b, __m128d c) +VFMADDPD xmm, xmm, xmm/m128 - - __m128 _mm_fmadd_ps (__m128 a, __m128 b, __m128 c) - VFMADDPS xmm, xmm, xmm/m128 - + __m128 _mm_fmadd_ps (__m128 a, __m128 b, __m128 c) +VFMADDPS xmm, xmm, xmm/m128 - - __m256d _mm256_fmadd_pd (__m256d a, __m256d b, __m256d c) - VFMADDPS ymm, ymm, ymm/m256 - + __m256d _mm256_fmadd_pd (__m256d a, __m256d b, __m256d c) +VFMADDPS ymm, ymm, ymm/m256 - - __m256 _mm256_fmadd_ps (__m256 a, __m256 b, __m256 c) - VFMADDPS ymm, ymm, ymm/m256 - + __m256 _mm256_fmadd_ps (__m256 a, __m256 b, __m256 c) +VFMADDPS ymm, ymm, ymm/m256 - - __m128d _mm_fnmadd_pd (__m128d a, __m128d b, __m128d c) - VFNMADDPD xmm, xmm, xmm/m128 - + __m128d _mm_fnmadd_pd (__m128d a, __m128d b, __m128d c) +VFNMADDPD xmm, xmm, xmm/m128 - - __m128 _mm_fnmadd_ps (__m128 a, __m128 b, __m128 c) - VFNMADDPS xmm, xmm, xmm/m128 - + __m128 _mm_fnmadd_ps (__m128 a, __m128 b, __m128 c) +VFNMADDPS xmm, xmm, xmm/m128 - - __m256d _mm256_fnmadd_pd (__m256d a, __m256d b, __m256d c) - VFNMADDPD ymm, ymm, ymm/m256 - + __m256d _mm256_fnmadd_pd (__m256d a, __m256d b, __m256d c) +VFNMADDPD ymm, ymm, ymm/m256 - - __m256 _mm256_fnmadd_ps (__m256 a, __m256 b, __m256 c) - VFNMADDPS ymm, ymm, ymm/m256 - + __m256 _mm256_fnmadd_ps (__m256 a, __m256 b, __m256 c) +VFNMADDPS ymm, ymm, ymm/m256 - - __m128d _mm_fnmadd_sd (__m128d a, __m128d b, __m128d c) - VFNMADDSD xmm, xmm, xmm/m64 - + __m128d _mm_fnmadd_sd (__m128d a, __m128d b, __m128d c) +VFNMADDSD xmm, xmm, xmm/m64 - - __m128 _mm_fnmadd_ss (__m128 a, __m128 b, __m128 c) - VFNMADDSS xmm, xmm, xmm/m32 - + __m128 _mm_fnmadd_ss (__m128 a, __m128 b, __m128 c) +VFNMADDSS xmm, xmm, xmm/m32 - - __m128d _mm_fmadd_sd (__m128d a, __m128d b, __m128d c) - VFMADDSS xmm, xmm, xmm/m64 - + __m128d _mm_fmadd_sd (__m128d a, __m128d b, __m128d c) +VFMADDSS xmm, xmm, xmm/m64 - - __m128 _mm_fmadd_ss (__m128 a, __m128 b, __m128 c) - VFMADDSS xmm, xmm, xmm/m32 - + __m128 _mm_fmadd_ss (__m128 a, __m128 b, __m128 c) +VFMADDSS xmm, xmm, xmm/m32 - - __m128d _mm_fmaddsub_pd (__m128d a, __m128d b, __m128d c) - VFMADDSUBPD xmm, xmm, xmm/m128 - + __m128d _mm_fmaddsub_pd (__m128d a, __m128d b, __m128d c) +VFMADDSUBPD xmm, xmm, xmm/m128 - - __m128 _mm_fmaddsub_ps (__m128 a, __m128 b, __m128 c) - VFMADDSUBPS xmm, xmm, xmm/m128 - + __m128 _mm_fmaddsub_ps (__m128 a, __m128 b, __m128 c) +VFMADDSUBPS xmm, xmm, xmm/m128 - - __m256d _mm256_fmaddsub_pd (__m256d a, __m256d b, __m256d c) - VFMADDSUBPD ymm, ymm, ymm/m256 - + __m256d _mm256_fmaddsub_pd (__m256d a, __m256d b, __m256d c) +VFMADDSUBPD ymm, ymm, ymm/m256 - - __m256 _mm256_fmaddsub_ps (__m256 a, __m256 b, __m256 c) - VFMADDSUBPS ymm, ymm, ymm/m256 - + __m256 _mm256_fmaddsub_ps (__m256 a, __m256 b, __m256 c) +VFMADDSUBPS ymm, ymm, ymm/m256 - - __m128d _mm_fmsub_pd (__m128d a, __m128d b, __m128d c) - VFMSUBPS xmm, xmm, xmm/m128 - + __m128d _mm_fmsub_pd (__m128d a, __m128d b, __m128d c) +VFMSUBPS xmm, xmm, xmm/m128 - - __m128 _mm_fmsub_ps (__m128 a, __m128 b, __m128 c) - VFMSUBPS xmm, xmm, xmm/m128 - + __m128 _mm_fmsub_ps (__m128 a, __m128 b, __m128 c) +VFMSUBPS xmm, xmm, xmm/m128 - - __m256d _mm256_fmsub_pd (__m256d a, __m256d b, __m256d c) - VFMSUBPD ymm, ymm, ymm/m256 - + __m256d _mm256_fmsub_pd (__m256d a, __m256d b, __m256d c) +VFMSUBPD ymm, ymm, ymm/m256 - - __m256 _mm256_fmsub_ps (__m256 a, __m256 b, __m256 c) - VFMSUBPS ymm, ymm, ymm/m256 - + __m256 _mm256_fmsub_ps (__m256 a, __m256 b, __m256 c) +VFMSUBPS ymm, ymm, ymm/m256 - - __m128d _mm_fmsubadd_pd (__m128d a, __m128d b, __m128d c) - VFMSUBADDPD xmm, xmm, xmm/m128 - + __m128d _mm_fmsubadd_pd (__m128d a, __m128d b, __m128d c) +VFMSUBADDPD xmm, xmm, xmm/m128 - - __m128 _mm_fmsubadd_ps (__m128 a, __m128 b, __m128 c) - VFMSUBADDPS xmm, xmm, xmm/m128 - + __m128 _mm_fmsubadd_ps (__m128 a, __m128 b, __m128 c) +VFMSUBADDPS xmm, xmm, xmm/m128 - - __m256d _mm256_fmsubadd_pd (__m256d a, __m256d b, __m256d c) - VFMSUBADDPD ymm, ymm, ymm/m256 - + __m256d _mm256_fmsubadd_pd (__m256d a, __m256d b, __m256d c) +VFMSUBADDPD ymm, ymm, ymm/m256 - - __m256 _mm256_fmsubadd_ps (__m256 a, __m256 b, __m256 c) - VFMSUBADDPS ymm, ymm, ymm/m256 - + __m256 _mm256_fmsubadd_ps (__m256 a, __m256 b, __m256 c) +VFMSUBADDPS ymm, ymm, ymm/m256 - - __m128d _mm_fnmsub_pd (__m128d a, __m128d b, __m128d c) - VFNMSUBPD xmm, xmm, xmm/m128 - + __m128d _mm_fnmsub_pd (__m128d a, __m128d b, __m128d c) +VFNMSUBPD xmm, xmm, xmm/m128 - - __m128 _mm_fnmsub_ps (__m128 a, __m128 b, __m128 c) - VFNMSUBPS xmm, xmm, xmm/m128 - + __m128 _mm_fnmsub_ps (__m128 a, __m128 b, __m128 c) +VFNMSUBPS xmm, xmm, xmm/m128 - - __m256d _mm256_fnmsub_pd (__m256d a, __m256d b, __m256d c) - VFNMSUBPD ymm, ymm, ymm/m256 - + __m256d _mm256_fnmsub_pd (__m256d a, __m256d b, __m256d c) +VFNMSUBPD ymm, ymm, ymm/m256 - - __m256 _mm256_fnmsub_ps (__m256 a, __m256 b, __m256 c) - VFNMSUBPS ymm, ymm, ymm/m256 - + __m256 _mm256_fnmsub_ps (__m256 a, __m256 b, __m256 c) +VFNMSUBPS ymm, ymm, ymm/m256 - - __m128d _mm_fnmsub_sd (__m128d a, __m128d b, __m128d c) - VFNMSUBSD xmm, xmm, xmm/m64 - + __m128d _mm_fnmsub_sd (__m128d a, __m128d b, __m128d c) +VFNMSUBSD xmm, xmm, xmm/m64 - - __m128 _mm_fnmsub_ss (__m128 a, __m128 b, __m128 c) - VFNMSUBSS xmm, xmm, xmm/m32 - + __m128 _mm_fnmsub_ss (__m128 a, __m128 b, __m128 c) +VFNMSUBSS xmm, xmm, xmm/m32 - - __m128d _mm_fmsub_sd (__m128d a, __m128d b, __m128d c) - VFMSUBSD xmm, xmm, xmm/m64 - + __m128d _mm_fmsub_sd (__m128d a, __m128d b, __m128d c) +VFMSUBSD xmm, xmm, xmm/m64 - - __m128 _mm_fmsub_ss (__m128 a, __m128 b, __m128 c) - VFMSUBSS xmm, xmm, xmm/m32 - + __m128 _mm_fmsub_ss (__m128 a, __m128 b, __m128 c) +VFMSUBSS xmm, xmm, xmm/m32 - - - This class provides access to Intel LZCNT hardware instructions via intrinsics. + - - unsigned int _lzcnt_u32 (unsigned int a) - LZCNT reg, reg/m32 - + unsigned int _lzcnt_u32 (unsigned int a) +LZCNT reg, reg/m32 - + - - unsigned __int64 _lzcnt_u64 (unsigned __int64 a) - LZCNT reg, reg/m64 - + unsigned __int64 _lzcnt_u64 (unsigned __int64 a) +LZCNT reg, reg/m64 - This class provides access to Intel PCLMULQDQ hardware instructions via intrinsics. - - __m128i _mm_clmulepi64_si128 (__m128i a, __m128i b, const int imm8) - PCLMULQDQ xmm, xmm/m128, imm8 - + __m128i _mm_clmulepi64_si128 (__m128i a, __m128i b, const int imm8) +PCLMULQDQ xmm, xmm/m128, imm8 - - __m128i _mm_clmulepi64_si128 (__m128i a, __m128i b, const int imm8) - PCLMULQDQ xmm, xmm/m128, imm8 - + __m128i _mm_clmulepi64_si128 (__m128i a, __m128i b, const int imm8) +PCLMULQDQ xmm, xmm/m128, imm8 - - This class provides access to Intel POPCNT hardware instructions via intrinsics. + - - int _mm_popcnt_u32 (unsigned int a) - POPCNT reg, reg/m32 - + int _mm_popcnt_u32 (unsigned int a) +POPCNT reg, reg/m32 - + - - __int64 _mm_popcnt_u64 (unsigned __int64 a) - POPCNT reg64, reg/m64 - + __int64 _mm_popcnt_u64 (unsigned __int64 a) +POPCNT reg64, reg/m64 - This class provides access to Intel SSE hardware instructions via intrinsics. - - __m128 _mm_add_ps (__m128 a, __m128 b) - ADDPS xmm, xmm/m128 - + __m128 _mm_add_ps (__m128 a, __m128 b) +ADDPS xmm, xmm/m128 - - __m128 _mm_add_ss (__m128 a, __m128 b) - ADDSS xmm, xmm/m32 - + __m128 _mm_add_ss (__m128 a, __m128 b) +ADDSS xmm, xmm/m32 - - __m128 _mm_and_ps (__m128 a, __m128 b) - ANDPS xmm, xmm/m128 - + __m128 _mm_and_ps (__m128 a, __m128 b) +ANDPS xmm, xmm/m128 - - __m128 _mm_andnot_ps (__m128 a, __m128 b) - ANDNPS xmm, xmm/m128 - + __m128 _mm_andnot_ps (__m128 a, __m128 b) +ANDNPS xmm, xmm/m128 - - __m128 _mm_cmpeq_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(0) - + __m128 _mm_cmpeq_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(0) - - __m128 _mm_cmpgt_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(6) - + __m128 _mm_cmpgt_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(6) - - __m128 _mm_cmpge_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(5) - + __m128 _mm_cmpge_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(5) - - __m128 _mm_cmplt_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(1) - + __m128 _mm_cmplt_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(1) - - __m128 _mm_cmple_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(2) - + __m128 _mm_cmple_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(2) - - __m128 _mm_cmpneq_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(4) - + __m128 _mm_cmpneq_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(4) - - __m128 _mm_cmpngt_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(2) - + __m128 _mm_cmpngt_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(2) - - __m128 _mm_cmpnge_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(1) - + __m128 _mm_cmpnge_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(1) - - __m128 _mm_cmpnlt_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(5) - + __m128 _mm_cmpnlt_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(5) - - __m128 _mm_cmpnle_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(6) - + __m128 _mm_cmpnle_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(6) - - __m128 _mm_cmpord_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(7) - + __m128 _mm_cmpord_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(7) - - __m128 _mm_cmpeq_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(0) - + __m128 _mm_cmpeq_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(0) - - __m128 _mm_cmpgt_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(6) - + __m128 _mm_cmpgt_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(6) - - __m128 _mm_cmpge_ss (__m128 a, __m128 b) - CMPPS xmm, xmm/m32, imm8(5) - + __m128 _mm_cmpge_ss (__m128 a, __m128 b) +CMPPS xmm, xmm/m32, imm8(5) - - __m128 _mm_cmplt_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(1) - + __m128 _mm_cmplt_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(1) - - __m128 _mm_cmple_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(2) - + __m128 _mm_cmple_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(2) - - __m128 _mm_cmpneq_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(4) - + __m128 _mm_cmpneq_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(4) - - __m128 _mm_cmpngt_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(2) - + __m128 _mm_cmpngt_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(2) - - __m128 _mm_cmpnge_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(1) - + __m128 _mm_cmpnge_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(1) - - __m128 _mm_cmpnlt_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(5) - + __m128 _mm_cmpnlt_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(5) - - __m128 _mm_cmpnle_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(6) - + __m128 _mm_cmpnle_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(6) - - __m128 _mm_cmpord_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(7) - + __m128 _mm_cmpord_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(7) - - int _mm_comieq_ss (__m128 a, __m128 b) - COMISS xmm, xmm/m32 - + int _mm_comieq_ss (__m128 a, __m128 b) +COMISS xmm, xmm/m32 - - int _mm_comigt_ss (__m128 a, __m128 b) - COMISS xmm, xmm/m32 - + int _mm_comigt_ss (__m128 a, __m128 b) +COMISS xmm, xmm/m32 - - int _mm_comige_ss (__m128 a, __m128 b) - COMISS xmm, xmm/m32 - + int _mm_comige_ss (__m128 a, __m128 b) +COMISS xmm, xmm/m32 - - int _mm_comilt_ss (__m128 a, __m128 b) - COMISS xmm, xmm/m32 - + int _mm_comilt_ss (__m128 a, __m128 b) +COMISS xmm, xmm/m32 - - int _mm_comile_ss (__m128 a, __m128 b) - COMISS xmm, xmm/m32 - + int _mm_comile_ss (__m128 a, __m128 b) +COMISS xmm, xmm/m32 - - int _mm_comineq_ss (__m128 a, __m128 b) - COMISS xmm, xmm/m32 - + int _mm_comineq_ss (__m128 a, __m128 b) +COMISS xmm, xmm/m32 - - __m128 _mm_cmpunord_ss (__m128 a, __m128 b) - CMPSS xmm, xmm/m32, imm8(3) - + __m128 _mm_cmpunord_ss (__m128 a, __m128 b) +CMPSS xmm, xmm/m32, imm8(3) - - int _mm_ucomieq_ss (__m128 a, __m128 b) - UCOMISS xmm, xmm/m32 - + int _mm_ucomieq_ss (__m128 a, __m128 b) +UCOMISS xmm, xmm/m32 - - int _mm_ucomigt_ss (__m128 a, __m128 b) - UCOMISS xmm, xmm/m32 - + int _mm_ucomigt_ss (__m128 a, __m128 b) +UCOMISS xmm, xmm/m32 - - int _mm_ucomige_ss (__m128 a, __m128 b) - UCOMISS xmm, xmm/m32 - + int _mm_ucomige_ss (__m128 a, __m128 b) +UCOMISS xmm, xmm/m32 - - int _mm_ucomilt_ss (__m128 a, __m128 b) - UCOMISS xmm, xmm/m32 - + int _mm_ucomilt_ss (__m128 a, __m128 b) +UCOMISS xmm, xmm/m32 - - int _mm_ucomile_ss (__m128 a, __m128 b) - UCOMISS xmm, xmm/m32 - + int _mm_ucomile_ss (__m128 a, __m128 b) +UCOMISS xmm, xmm/m32 - - int _mm_ucomineq_ss (__m128 a, __m128 b) - UCOMISS xmm, xmm/m32 - + int _mm_ucomineq_ss (__m128 a, __m128 b) +UCOMISS xmm, xmm/m32 - - __m128 _mm_cmpunord_ps (__m128 a, __m128 b) - CMPPS xmm, xmm/m128, imm8(3) - + __m128 _mm_cmpunord_ps (__m128 a, __m128 b) +CMPPS xmm, xmm/m128, imm8(3) - - __m128 _mm_cvtsi32_ss (__m128 a, int b) - CVTSI2SS xmm, reg/m32 - + __m128 _mm_cvtsi32_ss (__m128 a, int b) +CVTSI2SS xmm, reg/m32 - - int _mm_cvtss_si32 (__m128 a) - CVTSS2SI r32, xmm/m32 - + int _mm_cvtss_si32 (__m128 a) +CVTSS2SI r32, xmm/m32 - - int _mm_cvttss_si32 (__m128 a) - CVTTSS2SI r32, xmm/m32 - + int _mm_cvttss_si32 (__m128 a) +CVTTSS2SI r32, xmm/m32 - - __m128 _mm_div_ps (__m128 a, __m128 b) - DIVPS xmm, xmm/m128 - + __m128 _mm_div_ps (__m128 a, __m128 b) +DIVPS xmm, xmm/m128 - - __m128 _mm_div_ss (__m128 a, __m128 b) - DIVSS xmm, xmm/m32 - + __m128 _mm_div_ss (__m128 a, __m128 b) +DIVSS xmm, xmm/m32 + - - __m128 _mm_load_ps (float const* mem_address) - MOVAPS xmm, m128 - + __m128 _mm_load_ps (float const* mem_address) +MOVAPS xmm, m128 - - __m128 _mm_loadh_pi (__m128 a, __m64 const* mem_addr) - MOVHPS xmm, m64 - + __m128 _mm_loadh_pi (__m128 a, __m64 const* mem_addr) +MOVHPS xmm, m64 - - __m128 _mm_loadl_pi (__m128 a, __m64 const* mem_addr) - MOVLPS xmm, m64 - + __m128 _mm_loadl_pi (__m128 a, __m64 const* mem_addr) +MOVLPS xmm, m64 - - __m128 _mm_load_ss (float const* mem_address) - MOVSS xmm, m32 - + __m128 _mm_load_ss (float const* mem_address) +MOVSS xmm, m32 - - __m128 _mm_loadu_ps (float const* mem_address) - MOVUPS xmm, m128 - + __m128 _mm_loadu_ps (float const* mem_address) +MOVUPS xmm, m128 - - __m128 _mm_max_ps (__m128 a, __m128 b) - MAXPS xmm, xmm/m128 - + __m128 _mm_max_ps (__m128 a, __m128 b) +MAXPS xmm, xmm/m128 - - __m128 _mm_max_ss (__m128 a, __m128 b) - MAXSS xmm, xmm/m32 - + __m128 _mm_max_ss (__m128 a, __m128 b) +MAXSS xmm, xmm/m32 - - __m128 _mm_min_ps (__m128 a, __m128 b) - MINPS xmm, xmm/m128 - + __m128 _mm_min_ps (__m128 a, __m128 b) +MINPS xmm, xmm/m128 - - __m128 _mm_min_ss (__m128 a, __m128 b) - MINSS xmm, xmm/m32 - + __m128 _mm_min_ss (__m128 a, __m128 b) +MINSS xmm, xmm/m32 - - __m128 _mm_movehl_ps (__m128 a, __m128 b) - MOVHLPS xmm, xmm - + __m128 _mm_movehl_ps (__m128 a, __m128 b) +MOVHLPS xmm, xmm - - __m128 _mm_movelh_ps (__m128 a, __m128 b) - MOVLHPS xmm, xmm - + __m128 _mm_movelh_ps (__m128 a, __m128 b) +MOVLHPS xmm, xmm - - int _mm_movemask_ps (__m128 a) - MOVMSKPS reg, xmm - + int _mm_movemask_ps (__m128 a) +MOVMSKPS reg, xmm - - __m128 _mm_move_ss (__m128 a, __m128 b) - MOVSS xmm, xmm - + __m128 _mm_move_ss (__m128 a, __m128 b) +MOVSS xmm, xmm - - __m128 _mm_mul_ps (__m128 a, __m128 b) - MULPS xmm, xmm/m128 - + __m128 _mm_mul_ps (__m128 a, __m128 b) +MULPS xmm, xmm/m128 - - __m128 _mm_mul_ss (__m128 a, __m128 b) - MULPS xmm, xmm/m32 - + __m128 _mm_mul_ss (__m128 a, __m128 b) +MULPS xmm, xmm/m32 - - __m128 _mm_or_ps (__m128 a, __m128 b) - ORPS xmm, xmm/m128 - + __m128 _mm_or_ps (__m128 a, __m128 b) +ORPS xmm, xmm/m128 - - void _mm_prefetch(char* p, int i) - PREFETCHT0 m8 - + void _mm_prefetch(char* p, int i) +PREFETCHT0 m8 - - void _mm_prefetch(char* p, int i) - PREFETCHT1 m8 - + void _mm_prefetch(char* p, int i) +PREFETCHT1 m8 - - void _mm_prefetch(char* p, int i) - PREFETCHT2 m8 - + void _mm_prefetch(char* p, int i) +PREFETCHT2 m8 - - void _mm_prefetch(char* p, int i) - PREFETCHNTA m8 - + void _mm_prefetch(char* p, int i) +PREFETCHNTA m8 - - __m128 _mm_rcp_ps (__m128 a) - RCPPS xmm, xmm/m128 - + __m128 _mm_rcp_ps (__m128 a) +RCPPS xmm, xmm/m128 - - __m128 _mm_rcp_ss (__m128 a) - RCPSS xmm, xmm/m32 - + __m128 _mm_rcp_ss (__m128 a) +RCPSS xmm, xmm/m32 - - __m128 _mm_rcp_ss (__m128 a, __m128 b) - RCPSS xmm, xmm/m32 - + __m128 _mm_rcp_ss (__m128 a, __m128 b) +RCPSS xmm, xmm/m32 - - __m128 _mm_rsqrt_ps (__m128 a) - RSQRTPS xmm, xmm/m128 - + __m128 _mm_rsqrt_ps (__m128 a) +RSQRTPS xmm, xmm/m128 - - __m128 _mm_rsqrt_ss (__m128 a) - RSQRTSS xmm, xmm/m32 - + __m128 _mm_rsqrt_ss (__m128 a) +RSQRTSS xmm, xmm/m32 - - __m128 _mm_rsqrt_ss (__m128 a, __m128 b) - RSQRTSS xmm, xmm/m32 - + __m128 _mm_rsqrt_ss (__m128 a, __m128 b) +RSQRTSS xmm, xmm/m32 - - __m128 _mm_shuffle_ps (__m128 a, __m128 b, unsigned int control) - SHUFPS xmm, xmm/m128, imm8 - + __m128 _mm_shuffle_ps (__m128 a, __m128 b, unsigned int control) +SHUFPS xmm, xmm/m128, imm8 - - __m128 _mm_sqrt_ps (__m128 a) - SQRTPS xmm, xmm/m128 - + __m128 _mm_sqrt_ps (__m128 a) +SQRTPS xmm, xmm/m128 - - __m128 _mm_sqrt_ss (__m128 a) - SQRTSS xmm, xmm/m32 - + __m128 _mm_sqrt_ss (__m128 a) +SQRTSS xmm, xmm/m32 - - __m128 _mm_sqrt_ss (__m128 a, __m128 b) - SQRTSS xmm, xmm/m32 - + __m128 _mm_sqrt_ss (__m128 a, __m128 b) +SQRTSS xmm, xmm/m32 - - void _mm_storeu_ps (float* mem_addr, __m128 a) - MOVUPS m128, xmm - + void _mm_storeu_ps (float* mem_addr, __m128 a) +MOVUPS m128, xmm - - void _mm_store_ps (float* mem_addr, __m128 a) - MOVAPS m128, xmm - + void _mm_store_ps (float* mem_addr, __m128 a) +MOVAPS m128, xmm - - void _mm_stream_ps (float* mem_addr, __m128 a) - MOVNTPS m128, xmm - + void _mm_stream_ps (float* mem_addr, __m128 a) +MOVNTPS m128, xmm - - void _mm_sfence(void) - SFENCE - + void _mm_sfence(void) +SFENCE - - void _mm_storeh_pi (__m64* mem_addr, __m128 a) - MOVHPS m64, xmm - + void _mm_storeh_pi (__m64* mem_addr, __m128 a) +MOVHPS m64, xmm - - void _mm_storel_pi (__m64* mem_addr, __m128 a) - MOVLPS m64, xmm - + void _mm_storel_pi (__m64* mem_addr, __m128 a) +MOVLPS m64, xmm - - void _mm_store_ss (float* mem_addr, __m128 a) - MOVSS m32, xmm - + void _mm_store_ss (float* mem_addr, __m128 a) +MOVSS m32, xmm - - __m128d _mm_sub_ps (__m128d a, __m128d b) - SUBPS xmm, xmm/m128 - + __m128d _mm_sub_ps (__m128d a, __m128d b) +SUBPS xmm, xmm/m128 - - __m128 _mm_sub_ss (__m128 a, __m128 b) - SUBSS xmm, xmm/m32 - + __m128 _mm_sub_ss (__m128 a, __m128 b) +SUBSS xmm, xmm/m32 - - __m128 _mm_unpackhi_ps (__m128 a, __m128 b) - UNPCKHPS xmm, xmm/m128 - + __m128 _mm_unpackhi_ps (__m128 a, __m128 b) +UNPCKHPS xmm, xmm/m128 - - __m128 _mm_unpacklo_ps (__m128 a, __m128 b) - UNPCKLPS xmm, xmm/m128 - - - - - - - __m128 _mm_xor_ps (__m128 a, __m128 b) - XORPS xmm, xmm/m128 - + __m128 _mm_unpacklo_ps (__m128 a, __m128 b) +UNPCKLPS xmm, xmm/m128 - - - __m128 _mm_cvtsi64_ss (__m128 a, __int64 b) - CVTSI2SS xmm, reg/m64 - + __m128 _mm_cvtsi64_ss (__m128 a, __int64 b) +CVTSI2SS xmm, reg/m64 - - __int64 _mm_cvtss_si64 (__m128 a) - CVTSS2SI r64, xmm/m32 - + __int64 _mm_cvtss_si64 (__m128 a) +CVTSS2SI r64, xmm/m32 - - __int64 _mm_cvttss_si64 (__m128 a) - CVTTSS2SI r64, xmm/m32 - + __int64 _mm_cvttss_si64 (__m128 a) +CVTTSS2SI r64, xmm/m32 + + __m128 _mm_xor_ps (__m128 a, __m128 b) +XORPS xmm, xmm/m128 + + + This class provides access to Intel SSE2 hardware instructions via intrinsics. - - __m128i _mm_add_epi8 (__m128i a, __m128i b) - PADDB xmm, xmm/m128 - + __m128i _mm_add_epi8 (__m128i a, __m128i b) +PADDB xmm, xmm/m128 - - __m128d _mm_add_pd (__m128d a, __m128d b) - ADDPD xmm, xmm/m128 - + __m128d _mm_add_pd (__m128d a, __m128d b) +ADDPD xmm, xmm/m128 - - __m128i _mm_add_epi16 (__m128i a, __m128i b) - PADDW xmm, xmm/m128 - + __m128i _mm_add_epi16 (__m128i a, __m128i b) +PADDW xmm, xmm/m128 - - __m128i _mm_add_epi32 (__m128i a, __m128i b) - PADDD xmm, xmm/m128 - + __m128i _mm_add_epi32 (__m128i a, __m128i b) +PADDD xmm, xmm/m128 - - __m128i _mm_add_epi64 (__m128i a, __m128i b) - PADDQ xmm, xmm/m128 - + __m128i _mm_add_epi64 (__m128i a, __m128i b) +PADDQ xmm, xmm/m128 - - __m128i _mm_add_epi8 (__m128i a, __m128i b) - PADDB xmm, xmm/m128 - + __m128i _mm_add_epi8 (__m128i a, __m128i b) +PADDB xmm, xmm/m128 - - __m128i _mm_add_epi16 (__m128i a, __m128i b) - PADDW xmm, xmm/m128 - + __m128i _mm_add_epi16 (__m128i a, __m128i b) +PADDW xmm, xmm/m128 - - __m128i _mm_add_epi32 (__m128i a, __m128i b) - PADDD xmm, xmm/m128 - + __m128i _mm_add_epi32 (__m128i a, __m128i b) +PADDD xmm, xmm/m128 - - __m128i _mm_add_epi64 (__m128i a, __m128i b) - PADDQ xmm, xmm/m128 - + __m128i _mm_add_epi64 (__m128i a, __m128i b) +PADDQ xmm, xmm/m128 - - __m128i _mm_adds_epu8 (__m128i a, __m128i b) - PADDUSB xmm, xmm/m128 - + __m128i _mm_adds_epu8 (__m128i a, __m128i b) +PADDUSB xmm, xmm/m128 - - __m128i _mm_adds_epi16 (__m128i a, __m128i b) - PADDSW xmm, xmm/m128 - + __m128i _mm_adds_epi16 (__m128i a, __m128i b) +PADDSW xmm, xmm/m128 - - __m128i _mm_adds_epi8 (__m128i a, __m128i b) - PADDSB xmm, xmm/m128 - + __m128i _mm_adds_epi8 (__m128i a, __m128i b) +PADDSB xmm, xmm/m128 - - __m128i _mm_adds_epu16 (__m128i a, __m128i b) - PADDUSW xmm, xmm/m128 - + __m128i _mm_adds_epu16 (__m128i a, __m128i b) +PADDUSW xmm, xmm/m128 - - __m128d _mm_add_sd (__m128d a, __m128d b) - ADDSD xmm, xmm/m64 - + __m128d _mm_add_sd (__m128d a, __m128d b) +ADDSD xmm, xmm/m64 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128d _mm_and_pd (__m128d a, __m128d b) - ANDPD xmm, xmm/m128 - + __m128d _mm_and_pd (__m128d a, __m128d b) +ANDPD xmm, xmm/m128 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128i _mm_and_si128 (__m128i a, __m128i b) - PAND xmm, xmm/m128 - + __m128i _mm_and_si128 (__m128i a, __m128i b) +PAND xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128d _mm_andnot_pd (__m128d a, __m128d b) - ADDNPD xmm, xmm/m128 - + __m128d _mm_andnot_pd (__m128d a, __m128d b) +ADDNPD xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128i _mm_andnot_si128 (__m128i a, __m128i b) - PANDN xmm, xmm/m128 - + __m128i _mm_andnot_si128 (__m128i a, __m128i b) +PANDN xmm, xmm/m128 - - __m128i _mm_avg_epu8 (__m128i a, __m128i b) - PAVGB xmm, xmm/m128 - + __m128i _mm_avg_epu8 (__m128i a, __m128i b) +PAVGB xmm, xmm/m128 - - __m128i _mm_avg_epu16 (__m128i a, __m128i b) - PAVGW xmm, xmm/m128 - + __m128i _mm_avg_epu16 (__m128i a, __m128i b) +PAVGW xmm, xmm/m128 - - __m128i _mm_cmpeq_epi8 (__m128i a, __m128i b) - PCMPEQB xmm, xmm/m128 - + __m128i _mm_cmpeq_epi8 (__m128i a, __m128i b) +PCMPEQB xmm, xmm/m128 - - __m128d _mm_cmpeq_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(0) - + __m128d _mm_cmpeq_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(0) - - __m128i _mm_cmpeq_epi16 (__m128i a, __m128i b) - PCMPEQW xmm, xmm/m128 - + __m128i _mm_cmpeq_epi16 (__m128i a, __m128i b) +PCMPEQW xmm, xmm/m128 - - __m128i _mm_cmpeq_epi32 (__m128i a, __m128i b) - PCMPEQD xmm, xmm/m128 - + __m128i _mm_cmpeq_epi32 (__m128i a, __m128i b) +PCMPEQD xmm, xmm/m128 - - __m128i _mm_cmpeq_epi8 (__m128i a, __m128i b) - PCMPEQB xmm, xmm/m128 - + __m128i _mm_cmpeq_epi8 (__m128i a, __m128i b) +PCMPEQB xmm, xmm/m128 - - __m128i _mm_cmpeq_epi16 (__m128i a, __m128i b) - PCMPEQW xmm, xmm/m128 - + __m128i _mm_cmpeq_epi16 (__m128i a, __m128i b) +PCMPEQW xmm, xmm/m128 - - __m128i _mm_cmpeq_epi32 (__m128i a, __m128i b) - PCMPEQD xmm, xmm/m128 - + __m128i _mm_cmpeq_epi32 (__m128i a, __m128i b) +PCMPEQD xmm, xmm/m128 - - __m128d _mm_cmpgt_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(6) - + __m128d _mm_cmpgt_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(6) - - __m128i _mm_cmpgt_epi16 (__m128i a, __m128i b) - PCMPGTW xmm, xmm/m128 - + __m128i _mm_cmpgt_epi16 (__m128i a, __m128i b) +PCMPGTW xmm, xmm/m128 - - __m128i _mm_cmpgt_epi32 (__m128i a, __m128i b) - PCMPGTD xmm, xmm/m128 - + __m128i _mm_cmpgt_epi32 (__m128i a, __m128i b) +PCMPGTD xmm, xmm/m128 - - __m128i _mm_cmpgt_epi8 (__m128i a, __m128i b) - PCMPGTB xmm, xmm/m128 - + __m128i _mm_cmpgt_epi8 (__m128i a, __m128i b) +PCMPGTB xmm, xmm/m128 - - __m128d _mm_cmpge_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(5) - + __m128d _mm_cmpge_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(5) - - __m128d _mm_cmplt_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(1) - + __m128d _mm_cmplt_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(1) - - __m128i _mm_cmplt_epi16 (__m128i a, __m128i b) - PCMPGTW xmm, xmm/m128 - + __m128i _mm_cmplt_epi16 (__m128i a, __m128i b) +PCMPGTW xmm, xmm/m128 - - __m128i _mm_cmplt_epi32 (__m128i a, __m128i b) - PCMPGTD xmm, xmm/m128 - + __m128i _mm_cmplt_epi32 (__m128i a, __m128i b) +PCMPGTD xmm, xmm/m128 - - __m128i _mm_cmplt_epi8 (__m128i a, __m128i b) - PCMPGTB xmm, xmm/m128 - + __m128i _mm_cmplt_epi8 (__m128i a, __m128i b) +PCMPGTB xmm, xmm/m128 - - __m128d _mm_cmple_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(2) - + __m128d _mm_cmple_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(2) - - __m128d _mm_cmpneq_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(4) - + __m128d _mm_cmpneq_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(4) - - __m128d _mm_cmpngt_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(2) - + __m128d _mm_cmpngt_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(2) - - __m128d _mm_cmpnge_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(1) - + __m128d _mm_cmpnge_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(1) - - __m128d _mm_cmpnlt_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(5) - + __m128d _mm_cmpnlt_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(5) - - __m128d _mm_cmpnle_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(6) - + __m128d _mm_cmpnle_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(6) - - __m128d _mm_cmpord_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(7) - + __m128d _mm_cmpord_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(7) - - __m128d _mm_cmpeq_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(0) - + __m128d _mm_cmpeq_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(0) - - __m128d _mm_cmpgt_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(6) - + __m128d _mm_cmpgt_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(6) - - __m128d _mm_cmpge_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(5) - + __m128d _mm_cmpge_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(5) - - __m128d _mm_cmplt_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(1) - + __m128d _mm_cmplt_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(1) - - __m128d _mm_cmple_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(2) - + __m128d _mm_cmple_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(2) - - __m128d _mm_cmpneq_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(4) - + __m128d _mm_cmpneq_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(4) - - __m128d _mm_cmpngt_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(2) - + __m128d _mm_cmpngt_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(2) - - __m128d _mm_cmpnge_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(1) - + __m128d _mm_cmpnge_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(1) - - __m128d _mm_cmpnlt_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(5) - + __m128d _mm_cmpnlt_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(5) - - __m128d _mm_cmpnle_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(6) - + __m128d _mm_cmpnle_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(6) - - __m128d _mm_cmpord_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(7) - + __m128d _mm_cmpord_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(7) - - int _mm_comieq_sd (__m128d a, __m128d b) - COMISD xmm, xmm/m64 - + int _mm_comieq_sd (__m128d a, __m128d b) +COMISD xmm, xmm/m64 - - int _mm_comigt_sd (__m128d a, __m128d b) - COMISD xmm, xmm/m64 - + int _mm_comigt_sd (__m128d a, __m128d b) +COMISD xmm, xmm/m64 - - int _mm_comige_sd (__m128d a, __m128d b) - COMISD xmm, xmm/m64 - + int _mm_comige_sd (__m128d a, __m128d b) +COMISD xmm, xmm/m64 - - int _mm_comilt_sd (__m128d a, __m128d b) - COMISD xmm, xmm/m64 - + int _mm_comilt_sd (__m128d a, __m128d b) +COMISD xmm, xmm/m64 - - int _mm_comile_sd (__m128d a, __m128d b) - COMISD xmm, xmm/m64 - + int _mm_comile_sd (__m128d a, __m128d b) +COMISD xmm, xmm/m64 - - int _mm_comineq_sd (__m128d a, __m128d b) - COMISD xmm, xmm/m64 - + int _mm_comineq_sd (__m128d a, __m128d b) +COMISD xmm, xmm/m64 - - __m128d _mm_cmpunord_sd (__m128d a, __m128d b) - CMPSD xmm, xmm/m64, imm8(3) - + __m128d _mm_cmpunord_sd (__m128d a, __m128d b) +CMPSD xmm, xmm/m64, imm8(3) - - int _mm_ucomieq_sd (__m128d a, __m128d b) - UCOMISD xmm, xmm/m64 - + int _mm_ucomieq_sd (__m128d a, __m128d b) +UCOMISD xmm, xmm/m64 - - int _mm_ucomigt_sd (__m128d a, __m128d b) - UCOMISD xmm, xmm/m64 - + int _mm_ucomigt_sd (__m128d a, __m128d b) +UCOMISD xmm, xmm/m64 - - int _mm_ucomige_sd (__m128d a, __m128d b) - UCOMISD xmm, xmm/m64 - + int _mm_ucomige_sd (__m128d a, __m128d b) +UCOMISD xmm, xmm/m64 - - int _mm_ucomilt_sd (__m128d a, __m128d b) - UCOMISD xmm, xmm/m64 - + int _mm_ucomilt_sd (__m128d a, __m128d b) +UCOMISD xmm, xmm/m64 - - int _mm_ucomile_sd (__m128d a, __m128d b) - UCOMISD xmm, xmm/m64 - + int _mm_ucomile_sd (__m128d a, __m128d b) +UCOMISD xmm, xmm/m64 - - int _mm_ucomineq_sd (__m128d a, __m128d b) - UCOMISD xmm, xmm/m64 - + int _mm_ucomineq_sd (__m128d a, __m128d b) +UCOMISD xmm, xmm/m64 - - __m128d _mm_cmpunord_pd (__m128d a, __m128d b) - CMPPD xmm, xmm/m128, imm8(3) - + __m128d _mm_cmpunord_pd (__m128d a, __m128d b) +CMPPD xmm, xmm/m128, imm8(3) - - __m128d _mm_cvtsi32_sd (__m128d a, int b) - CVTSI2SD xmm, reg/m32 - + __m128d _mm_cvtsi32_sd (__m128d a, int b) +CVTSI2SD xmm, reg/m32 - - __m128d _mm_cvtss_sd (__m128d a, __m128 b) - CVTSS2SD xmm, xmm/m32 - + __m128d _mm_cvtss_sd (__m128d a, __m128 b) +CVTSS2SD xmm, xmm/m32 - - __m128i _mm_cvtsi32_si128 (int a) - MOVD xmm, reg/m32 - + __m128i _mm_cvtsi32_si128 (int a) +MOVD xmm, reg/m32 - - __m128 _mm_cvtsd_ss (__m128 a, __m128d b) - CVTSD2SS xmm, xmm/m64 - + __m128 _mm_cvtsd_ss (__m128 a, __m128d b) +CVTSD2SS xmm, xmm/m64 - - __m128i _mm_cvtsi32_si128 (int a) - MOVD xmm, reg/m32 - + __m128i _mm_cvtsi32_si128 (int a) +MOVD xmm, reg/m32 - - int _mm_cvtsd_si32 (__m128d a) - CVTSD2SI r32, xmm/m64 - + int _mm_cvtsd_si32 (__m128d a) +CVTSD2SI r32, xmm/m64 - - int _mm_cvtsi128_si32 (__m128i a) - MOVD reg/m32, xmm - + int _mm_cvtsi128_si32 (__m128i a) +MOVD reg/m32, xmm - - int _mm_cvttsd_si32 (__m128d a) - CVTTSD2SI reg, xmm/m64 - + int _mm_cvttsd_si32 (__m128d a) +CVTTSD2SI reg, xmm/m64 - - int _mm_cvtsi128_si32 (__m128i a) - MOVD reg/m32, xmm - + int _mm_cvtsi128_si32 (__m128i a) +MOVD reg/m32, xmm - - __m128d _mm_cvtepi32_pd (__m128i a) - CVTDQ2PD xmm, xmm/m128 - + __m128d _mm_cvtepi32_pd (__m128i a) +CVTDQ2PD xmm, xmm/m128 - - __m128d _mm_cvtps_pd (__m128 a) - CVTPS2PD xmm, xmm/m128 - + __m128d _mm_cvtps_pd (__m128 a) +CVTPS2PD xmm, xmm/m128 - - __m128i _mm_cvtpd_epi32 (__m128d a) - CVTPD2DQ xmm, xmm/m128 - + __m128i _mm_cvtpd_epi32 (__m128d a) +CVTPD2DQ xmm, xmm/m128 - - __m128i _mm_cvtps_epi32 (__m128 a) - CVTPS2DQ xmm, xmm/m128 - + __m128i _mm_cvtps_epi32 (__m128 a) +CVTPS2DQ xmm, xmm/m128 - - __m128i _mm_cvttpd_epi32 (__m128d a) - CVTTPD2DQ xmm, xmm/m128 - + __m128i _mm_cvttpd_epi32 (__m128d a) +CVTTPD2DQ xmm, xmm/m128 - - __m128i _mm_cvttps_epi32 (__m128 a) - CVTTPS2DQ xmm, xmm/m128 - + __m128i _mm_cvttps_epi32 (__m128 a) +CVTTPS2DQ xmm, xmm/m128 - - __m128 _mm_cvtpd_ps (__m128d a) - CVTPD2PS xmm, xmm/m128 - + __m128 _mm_cvtpd_ps (__m128d a) +CVTPD2PS xmm, xmm/m128 - - __m128 _mm_cvtepi32_ps (__m128i a) - CVTDQ2PS xmm, xmm/m128 - + __m128 _mm_cvtepi32_ps (__m128i a) +CVTDQ2PS xmm, xmm/m128 - - __m128d _mm_div_pd (__m128d a, __m128d b) - DIVPD xmm, xmm/m128 - + __m128d _mm_div_pd (__m128d a, __m128d b) +DIVPD xmm, xmm/m128 - - __m128d _mm_div_sd (__m128d a, __m128d b) - DIVSD xmm, xmm/m64 - + __m128d _mm_div_sd (__m128d a, __m128d b) +DIVSD xmm, xmm/m64 - - int _mm_extract_epi16 (__m128i a, int immediate) - PEXTRW reg, xmm, imm8 - + int _mm_extract_epi16 (__m128i a, int immediate) +PEXTRW reg, xmm, imm8 - - __m128i _mm_insert_epi16 (__m128i a, int i, int immediate) - PINSRW xmm, reg/m16, imm8 - + __m128i _mm_insert_epi16 (__m128i a, int i, int immediate) +PINSRW xmm, reg/m16, imm8 - - __m128i _mm_insert_epi16 (__m128i a, int i, int immediate) - PINSRW xmm, reg/m16, imm8 - + __m128i _mm_insert_epi16 (__m128i a, int i, int immediate) +PINSRW xmm, reg/m16, imm8 + - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - __m128d _mm_load_pd (double const* mem_address) - MOVAPD xmm, m128 - + __m128d _mm_load_pd (double const* mem_address) +MOVAPD xmm, m128 - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - __m128i _mm_load_si128 (__m128i const* mem_address) - MOVDQA xmm, m128 - + __m128i _mm_load_si128 (__m128i const* mem_address) +MOVDQA xmm, m128 - - void _mm_lfence(void) - LFENCE - + void _mm_lfence(void) +LFENCE - - __m128d _mm_loadh_pd (__m128d a, double const* mem_addr) - MOVHPD xmm, m64 - + __m128d _mm_loadh_pd (__m128d a, double const* mem_addr) +MOVHPD xmm, m64 - - __m128d _mm_loadl_pd (__m128d a, double const* mem_addr) - MOVLPD xmm, m64 - + __m128d _mm_loadl_pd (__m128d a, double const* mem_addr) +MOVLPD xmm, m64 - - __m128d _mm_load_sd (double const* mem_address) - MOVSD xmm, m64 - + __m128d _mm_load_sd (double const* mem_address) +MOVSD xmm, m64 - - __m128i _mm_loadl_epi32 (__m128i const* mem_addr) - MOVD xmm, reg/m32 - + __m128i _mm_loadl_epi32 (__m128i const* mem_addr) +MOVD xmm, reg/m32 - - __m128i _mm_loadl_epi64 (__m128i const* mem_addr) - MOVQ xmm, reg/m64 - + __m128i _mm_loadl_epi64 (__m128i const* mem_addr) +MOVQ xmm, reg/m64 - - __m128i _mm_loadl_epi32 (__m128i const* mem_addr) - MOVD xmm, reg/m32 - + __m128i _mm_loadl_epi32 (__m128i const* mem_addr) +MOVD xmm, reg/m32 - - __m128i _mm_loadl_epi64 (__m128i const* mem_addr) - MOVQ xmm, reg/m64 - + __m128i _mm_loadl_epi64 (__m128i const* mem_addr) +MOVQ xmm, reg/m64 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - __m128d _mm_loadu_pd (double const* mem_address) - MOVUPD xmm, m128 - + __m128d _mm_loadu_pd (double const* mem_address) +MOVUPD xmm, m128 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - __m128i _mm_loadu_si128 (__m128i const* mem_address) - MOVDQU xmm, m128 - + __m128i _mm_loadu_si128 (__m128i const* mem_address) +MOVDQU xmm, m128 - - void _mm_maskmoveu_si128 (__m128i a, __m128i mask, char* mem_address) - MASKMOVDQU xmm, xmm - + void _mm_maskmoveu_si128 (__m128i a, __m128i mask, char* mem_address) +MASKMOVDQU xmm, xmm - - void _mm_maskmoveu_si128 (__m128i a, __m128i mask, char* mem_address) - MASKMOVDQU xmm, xmm - + void _mm_maskmoveu_si128 (__m128i a, __m128i mask, char* mem_address) +MASKMOVDQU xmm, xmm - - __m128i _mm_max_epu8 (__m128i a, __m128i b) - PMAXUB xmm, xmm/m128 - + __m128i _mm_max_epu8 (__m128i a, __m128i b) +PMAXUB xmm, xmm/m128 - - __m128d _mm_max_pd (__m128d a, __m128d b) - MAXPD xmm, xmm/m128 - + __m128d _mm_max_pd (__m128d a, __m128d b) +MAXPD xmm, xmm/m128 - - __m128i _mm_max_epi16 (__m128i a, __m128i b) - PMAXSW xmm, xmm/m128 - + __m128i _mm_max_epi16 (__m128i a, __m128i b) +PMAXSW xmm, xmm/m128 - - __m128d _mm_max_sd (__m128d a, __m128d b) - MAXSD xmm, xmm/m64 - + __m128d _mm_max_sd (__m128d a, __m128d b) +MAXSD xmm, xmm/m64 - - void _mm_mfence(void) - MFENCE - + void _mm_mfence(void) +MFENCE - - __m128i _mm_min_epu8 (__m128i a, __m128i b) - PMINUB xmm, xmm/m128 - + __m128i _mm_min_epu8 (__m128i a, __m128i b) +PMINUB xmm, xmm/m128 - - __m128d _mm_min_pd (__m128d a, __m128d b) - MINPD xmm, xmm/m128 - + __m128d _mm_min_pd (__m128d a, __m128d b) +MINPD xmm, xmm/m128 - - __m128i _mm_min_epi16 (__m128i a, __m128i b) - PMINSW xmm, xmm/m128 - + __m128i _mm_min_epi16 (__m128i a, __m128i b) +PMINSW xmm, xmm/m128 - - __m128d _mm_min_sd (__m128d a, __m128d b) - MINSD xmm, xmm/m64 - + __m128d _mm_min_sd (__m128d a, __m128d b) +MINSD xmm, xmm/m64 - - int _mm_movemask_epi8 (__m128i a) - PMOVMSKB reg, xmm - + int _mm_movemask_epi8 (__m128i a) +PMOVMSKB reg, xmm - - int _mm_movemask_pd (__m128d a) - MOVMSKPD reg, xmm - + int _mm_movemask_pd (__m128d a) +MOVMSKPD reg, xmm - - int _mm_movemask_epi8 (__m128i a) - PMOVMSKB reg, xmm - + int _mm_movemask_epi8 (__m128i a) +PMOVMSKB reg, xmm - - __m128d _mm_move_sd (__m128d a, __m128d b) - MOVSD xmm, xmm - + __m128d _mm_move_sd (__m128d a, __m128d b) +MOVSD xmm, xmm - - __m128i _mm_move_epi64 (__m128i a) - MOVQ xmm, xmm - + __m128i _mm_move_epi64 (__m128i a) +MOVQ xmm, xmm - - __m128i _mm_move_epi64 (__m128i a) - MOVQ xmm, xmm - + __m128i _mm_move_epi64 (__m128i a) +MOVQ xmm, xmm - - __m128d _mm_mul_pd (__m128d a, __m128d b) - MULPD xmm, xmm/m128 - + __m128d _mm_mul_pd (__m128d a, __m128d b) +MULPD xmm, xmm/m128 - - __m128i _mm_mul_epu32 (__m128i a, __m128i b) - PMULUDQ xmm, xmm/m128 - + __m128i _mm_mul_epu32 (__m128i a, __m128i b) +PMULUDQ xmm, xmm/m128 - - __m128i _mm_madd_epi16 (__m128i a, __m128i b) - PMADDWD xmm, xmm/m128 - + __m128i _mm_madd_epi16 (__m128i a, __m128i b) +PMADDWD xmm, xmm/m128 - - __m128i _mm_mulhi_epi16 (__m128i a, __m128i b) - PMULHW xmm, xmm/m128 - + __m128i _mm_mulhi_epi16 (__m128i a, __m128i b) +PMULHW xmm, xmm/m128 - - __m128i _mm_mulhi_epu16 (__m128i a, __m128i b) - PMULHUW xmm, xmm/m128 - + __m128i _mm_mulhi_epu16 (__m128i a, __m128i b) +PMULHUW xmm, xmm/m128 - - __m128i _mm_mullo_epi16 (__m128i a, __m128i b) - PMULLW xmm, xmm/m128 - + __m128i _mm_mullo_epi16 (__m128i a, __m128i b) +PMULLW xmm, xmm/m128 - - __m128i _mm_mullo_epi16 (__m128i a, __m128i b) - PMULLW xmm, xmm/m128 - + __m128i _mm_mullo_epi16 (__m128i a, __m128i b) +PMULLW xmm, xmm/m128 - - __m128d _mm_mul_sd (__m128d a, __m128d b) - MULSD xmm, xmm/m64 - + __m128d _mm_mul_sd (__m128d a, __m128d b) +MULSD xmm, xmm/m64 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128d _mm_or_pd (__m128d a, __m128d b) - ORPD xmm, xmm/m128 - + __m128d _mm_or_pd (__m128d a, __m128d b) +ORPD xmm, xmm/m128 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128i _mm_or_si128 (__m128i a, __m128i b) - POR xmm, xmm/m128 - + __m128i _mm_or_si128 (__m128i a, __m128i b) +POR xmm, xmm/m128 - - __m128i _mm_packs_epi16 (__m128i a, __m128i b) - PACKSSWB xmm, xmm/m128 - + __m128i _mm_packs_epi16 (__m128i a, __m128i b) +PACKSSWB xmm, xmm/m128 - - __m128i _mm_packs_epi32 (__m128i a, __m128i b) - PACKSSDW xmm, xmm/m128 - + __m128i _mm_packs_epi32 (__m128i a, __m128i b) +PACKSSDW xmm, xmm/m128 - - __m128i _mm_packus_epi16 (__m128i a, __m128i b) - PACKUSWB xmm, xmm/m128 - + __m128i _mm_packus_epi16 (__m128i a, __m128i b) +PACKUSWB xmm, xmm/m128 - - __m128i _mm_slli_epi16 (__m128i a, int immediate) - PSLLW xmm, imm8 - + __m128i _mm_slli_epi16 (__m128i a, int immediate) +PSLLW xmm, imm8 - - __m128i _mm_sll_epi16 (__m128i a, __m128i count) - PSLLW xmm, xmm/m128 - + __m128i _mm_sll_epi16 (__m128i a, __m128i count) +PSLLW xmm, xmm/m128 - - __m128i _mm_slli_epi32 (__m128i a, int immediate) - PSLLD xmm, imm8 - + __m128i _mm_slli_epi32 (__m128i a, int immediate) +PSLLD xmm, imm8 - - __m128i _mm_sll_epi32 (__m128i a, __m128i count) - PSLLD xmm, xmm/m128 - + __m128i _mm_sll_epi32 (__m128i a, __m128i count) +PSLLD xmm, xmm/m128 - - __m128i _mm_slli_epi64 (__m128i a, int immediate) - PSLLQ xmm, imm8 - + __m128i _mm_slli_epi64 (__m128i a, int immediate) +PSLLQ xmm, imm8 - - __m128i _mm_sll_epi64 (__m128i a, __m128i count) - PSLLQ xmm, xmm/m128 - + __m128i _mm_sll_epi64 (__m128i a, __m128i count) +PSLLQ xmm, xmm/m128 - - __m128i _mm_slli_epi16 (__m128i a, int immediate) - PSLLW xmm, imm8 - + __m128i _mm_slli_epi16 (__m128i a, int immediate) +PSLLW xmm, imm8 - - __m128i _mm_sll_epi16 (__m128i a, __m128i count) - PSLLW xmm, xmm/m128 - + __m128i _mm_sll_epi16 (__m128i a, __m128i count) +PSLLW xmm, xmm/m128 - - __m128i _mm_slli_epi32 (__m128i a, int immediate) - PSLLD xmm, imm8 - + __m128i _mm_slli_epi32 (__m128i a, int immediate) +PSLLD xmm, imm8 - - __m128i _mm_sll_epi32 (__m128i a, __m128i count) - PSLLD xmm, xmm/m128 - + __m128i _mm_sll_epi32 (__m128i a, __m128i count) +PSLLD xmm, xmm/m128 - - __m128i _mm_slli_epi64 (__m128i a, int immediate) - PSLLQ xmm, imm8 - + __m128i _mm_slli_epi64 (__m128i a, int immediate) +PSLLQ xmm, imm8 - - __m128i _mm_sll_epi64 (__m128i a, __m128i count) - PSLLQ xmm, xmm/m128 - + __m128i _mm_sll_epi64 (__m128i a, __m128i count) +PSLLQ xmm, xmm/m128 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_bslli_si128 (__m128i a, int imm8) - PSLLDQ xmm, imm8 - + __m128i _mm_bslli_si128 (__m128i a, int imm8) +PSLLDQ xmm, imm8 - - __m128i _mm_srai_epi16 (__m128i a, int immediate) - PSRAW xmm, imm8 - + __m128i _mm_srai_epi16 (__m128i a, int immediate) +PSRAW xmm, imm8 - - __m128i _mm_sra_epi16 (__m128i a, __m128i count) - PSRAW xmm, xmm/m128 - + __m128i _mm_sra_epi16 (__m128i a, __m128i count) +PSRAW xmm, xmm/m128 - - __m128i _mm_srai_epi32 (__m128i a, int immediate) - PSRAD xmm, imm8 - + __m128i _mm_srai_epi32 (__m128i a, int immediate) +PSRAD xmm, imm8 - - __m128i _mm_sra_epi32 (__m128i a, __m128i count) - PSRAD xmm, xmm/m128 - + __m128i _mm_sra_epi32 (__m128i a, __m128i count) +PSRAD xmm, xmm/m128 - - __m128i _mm_srli_epi16 (__m128i a, int immediate) - PSRLW xmm, imm8 - + __m128i _mm_srli_epi16 (__m128i a, int immediate) +PSRLW xmm, imm8 - - __m128i _mm_srl_epi16 (__m128i a, __m128i count) - PSRLW xmm, xmm/m128 - + __m128i _mm_srl_epi16 (__m128i a, __m128i count) +PSRLW xmm, xmm/m128 - - __m128i _mm_srli_epi32 (__m128i a, int immediate) - PSRLD xmm, imm8 - + __m128i _mm_srli_epi32 (__m128i a, int immediate) +PSRLD xmm, imm8 - - __m128i _mm_srl_epi32 (__m128i a, __m128i count) - PSRLD xmm, xmm/m128 - + __m128i _mm_srl_epi32 (__m128i a, __m128i count) +PSRLD xmm, xmm/m128 - - __m128i _mm_srli_epi64 (__m128i a, int immediate) - PSRLQ xmm, imm8 - + __m128i _mm_srli_epi64 (__m128i a, int immediate) +PSRLQ xmm, imm8 - - __m128i _mm_srl_epi64 (__m128i a, __m128i count) - PSRLQ xmm, xmm/m128 - + __m128i _mm_srl_epi64 (__m128i a, __m128i count) +PSRLQ xmm, xmm/m128 - - __m128i _mm_srli_epi16 (__m128i a, int immediate) - PSRLW xmm, imm8 - + __m128i _mm_srli_epi16 (__m128i a, int immediate) +PSRLW xmm, imm8 - - __m128i _mm_srl_epi16 (__m128i a, __m128i count) - PSRLW xmm, xmm/m128 - + __m128i _mm_srl_epi16 (__m128i a, __m128i count) +PSRLW xmm, xmm/m128 - - __m128i _mm_srli_epi32 (__m128i a, int immediate) - PSRLD xmm, imm8 - + __m128i _mm_srli_epi32 (__m128i a, int immediate) +PSRLD xmm, imm8 - - __m128i _mm_srl_epi32 (__m128i a, __m128i count) - PSRLD xmm, xmm/m128 - + __m128i _mm_srl_epi32 (__m128i a, __m128i count) +PSRLD xmm, xmm/m128 - - __m128i _mm_srli_epi64 (__m128i a, int immediate) - PSRLQ xmm, imm8 - + __m128i _mm_srli_epi64 (__m128i a, int immediate) +PSRLQ xmm, imm8 - - __m128i _mm_srl_epi64 (__m128i a, __m128i count) - PSRLQ xmm, xmm/m128 - + __m128i _mm_srl_epi64 (__m128i a, __m128i count) +PSRLQ xmm, xmm/m128 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128i _mm_bsrli_si128 (__m128i a, int imm8) - PSRLDQ xmm, imm8 - + __m128i _mm_bsrli_si128 (__m128i a, int imm8) +PSRLDQ xmm, imm8 - - __m128d _mm_shuffle_pd (__m128d a, __m128d b, int immediate) - SHUFPD xmm, xmm/m128, imm8 - + __m128d _mm_shuffle_pd (__m128d a, __m128d b, int immediate) +SHUFPD xmm, xmm/m128, imm8 - - __m128i _mm_shuffle_epi32 (__m128i a, int immediate) - PSHUFD xmm, xmm/m128, imm8 - + __m128i _mm_shuffle_epi32 (__m128i a, int immediate) +PSHUFD xmm, xmm/m128, imm8 - - __m128i _mm_shuffle_epi32 (__m128i a, int immediate) - PSHUFD xmm, xmm/m128, imm8 - + __m128i _mm_shuffle_epi32 (__m128i a, int immediate) +PSHUFD xmm, xmm/m128, imm8 - - __m128i _mm_shufflehi_epi16 (__m128i a, int immediate) - PSHUFHW xmm, xmm/m128, imm8 - + __m128i _mm_shufflehi_epi16 (__m128i a, int immediate) +PSHUFHW xmm, xmm/m128, imm8 - - __m128i _mm_shufflehi_epi16 (__m128i a, int control) - PSHUFHW xmm, xmm/m128, imm8 - + __m128i _mm_shufflehi_epi16 (__m128i a, int control) +PSHUFHW xmm, xmm/m128, imm8 - - __m128i _mm_shufflelo_epi16 (__m128i a, int control) - PSHUFLW xmm, xmm/m128, imm8 - + __m128i _mm_shufflelo_epi16 (__m128i a, int control) +PSHUFLW xmm, xmm/m128, imm8 - - __m128i _mm_shufflelo_epi16 (__m128i a, int control) - PSHUFLW xmm, xmm/m128, imm8 - + __m128i _mm_shufflelo_epi16 (__m128i a, int control) +PSHUFLW xmm, xmm/m128, imm8 - - __m128d _mm_sqrt_pd (__m128d a) - SQRTPD xmm, xmm/m128 - + __m128d _mm_sqrt_pd (__m128d a) +SQRTPD xmm, xmm/m128 - - __m128d _mm_sqrt_sd (__m128d a) - SQRTSD xmm, xmm/64 - + __m128d _mm_sqrt_sd (__m128d a) +SQRTSD xmm, xmm/64 - - __m128d _mm_sqrt_sd (__m128d a, __m128d b) - SQRTSD xmm, xmm/64 - + __m128d _mm_sqrt_sd (__m128d a, __m128d b) +SQRTSD xmm, xmm/64 - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_storeu_pd (double* mem_addr, __m128d a) - MOVUPD m128, xmm - + void _mm_storeu_pd (double* mem_addr, __m128d a) +MOVUPD m128, xmm - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) - MOVDQU m128, xmm - + void _mm_storeu_si128 (__m128i* mem_addr, __m128i a) +MOVDQU m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_store_pd (double* mem_addr, __m128d a) - MOVAPD m128, xmm - + void _mm_store_pd (double* mem_addr, __m128d a) +MOVAPD m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_store_si128 (__m128i* mem_addr, __m128i a) - MOVDQA m128, xmm - + void _mm_store_si128 (__m128i* mem_addr, __m128i a) +MOVDQA m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_stream_pd (double* mem_addr, __m128d a) - MOVNTPD m128, xmm - + void _mm_stream_pd (double* mem_addr, __m128d a) +MOVNTPD m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_stream_si128 (__m128i* mem_addr, __m128i a) - MOVNTDQ m128, xmm - + void _mm_stream_si128 (__m128i* mem_addr, __m128i a) +MOVNTDQ m128, xmm - - void _mm_storeh_pd (double* mem_addr, __m128d a) - MOVHPD m64, xmm - + void _mm_storeh_pd (double* mem_addr, __m128d a) +MOVHPD m64, xmm - - void _mm_storel_pd (double* mem_addr, __m128d a) - MOVLPD m64, xmm - + void _mm_storel_pd (double* mem_addr, __m128d a) +MOVLPD m64, xmm - - void _mm_stream_si32(int *p, int a) - MOVNTI m32, r32 - + void _mm_stream_si32(int *p, int a) +MOVNTI m32, r32 - - void _mm_stream_si32(int *p, int a) - MOVNTI m32, r32 - + void _mm_stream_si32(int *p, int a) +MOVNTI m32, r32 - - void _mm_store_sd (double* mem_addr, __m128d a) - MOVSD m64, xmm - - - - - - void _mm_storeu_si32 (void* mem_addr, __m128i a) MOVD m32, xmm. + void _mm_store_sd (double* mem_addr, __m128d a) +MOVSD m64, xmm - - void _mm_storel_epi64 (__m128i* mem_addr, __m128i a) - MOVQ m64, xmm - - - - - - void _mm_storeu_si32 (void* mem_addr, __m128i a) MOVD m32, xmm. + void _mm_storel_epi64 (__m128i* mem_addr, __m128i a) +MOVQ m64, xmm - - void _mm_storel_epi64 (__m128i* mem_addr, __m128i a) - MOVQ m64, xmm - + void _mm_storel_epi64 (__m128i* mem_addr, __m128i a) +MOVQ m64, xmm - - __m128i _mm_sub_epi8 (__m128i a, __m128i b) - PSUBB xmm, xmm/m128 - + __m128i _mm_sub_epi8 (__m128i a, __m128i b) +PSUBB xmm, xmm/m128 - - __m128d _mm_sub_pd (__m128d a, __m128d b) - SUBPD xmm, xmm/m128 - + __m128d _mm_sub_pd (__m128d a, __m128d b) +SUBPD xmm, xmm/m128 - - __m128i _mm_sub_epi16 (__m128i a, __m128i b) - PSUBW xmm, xmm/m128 - + __m128i _mm_sub_epi16 (__m128i a, __m128i b) +PSUBW xmm, xmm/m128 - - __m128i _mm_sub_epi32 (__m128i a, __m128i b) - PSUBD xmm, xmm/m128 - + __m128i _mm_sub_epi32 (__m128i a, __m128i b) +PSUBD xmm, xmm/m128 - - __m128i _mm_sub_epi64 (__m128i a, __m128i b) - PSUBQ xmm, xmm/m128 - + __m128i _mm_sub_epi64 (__m128i a, __m128i b) +PSUBQ xmm, xmm/m128 - - __m128i _mm_sub_epi8 (__m128i a, __m128i b) - PSUBB xmm, xmm/m128 - + __m128i _mm_sub_epi8 (__m128i a, __m128i b) +PSUBB xmm, xmm/m128 - - __m128i _mm_sub_epi16 (__m128i a, __m128i b) - PSUBW xmm, xmm/m128 - + __m128i _mm_sub_epi16 (__m128i a, __m128i b) +PSUBW xmm, xmm/m128 - - __m128i _mm_sub_epi32 (__m128i a, __m128i b) - PSUBD xmm, xmm/m128 - + __m128i _mm_sub_epi32 (__m128i a, __m128i b) +PSUBD xmm, xmm/m128 - - __m128i _mm_sub_epi64 (__m128i a, __m128i b) - PSUBQ xmm, xmm/m128 - + __m128i _mm_sub_epi64 (__m128i a, __m128i b) +PSUBQ xmm, xmm/m128 - - __m128i _mm_subs_epu8 (__m128i a, __m128i b) - PSUBUSB xmm, xmm/m128 - + __m128i _mm_subs_epu8 (__m128i a, __m128i b) +PSUBUSB xmm, xmm/m128 - - __m128i _mm_subs_epi16 (__m128i a, __m128i b) - PSUBSW xmm, xmm/m128 - + __m128i _mm_subs_epi16 (__m128i a, __m128i b) +PSUBSW xmm, xmm/m128 - - __m128i _mm_subs_epi8 (__m128i a, __m128i b) - PSUBSB xmm, xmm/m128 - + __m128i _mm_subs_epi8 (__m128i a, __m128i b) +PSUBSB xmm, xmm/m128 - - __m128i _mm_subs_epu16 (__m128i a, __m128i b) - PSUBUSW xmm, xmm/m128 - + __m128i _mm_subs_epu16 (__m128i a, __m128i b) +PSUBUSW xmm, xmm/m128 - - __m128d _mm_sub_sd (__m128d a, __m128d b) - SUBSD xmm, xmm/m64 - + __m128d _mm_sub_sd (__m128d a, __m128d b) +SUBSD xmm, xmm/m64 - - __m128i _mm_sad_epu8 (__m128i a, __m128i b) - PSADBW xmm, xmm/m128 - + __m128i _mm_sad_epu8 (__m128i a, __m128i b) +PSADBW xmm, xmm/m128 - - __m128i _mm_unpackhi_epi8 (__m128i a, __m128i b) - PUNPCKHBW xmm, xmm/m128 - + __m128i _mm_unpackhi_epi8 (__m128i a, __m128i b) +PUNPCKHBW xmm, xmm/m128 - - __m128d _mm_unpackhi_pd (__m128d a, __m128d b) - UNPCKHPD xmm, xmm/m128 - + __m128d _mm_unpackhi_pd (__m128d a, __m128d b) +UNPCKHPD xmm, xmm/m128 - - __m128i _mm_unpackhi_epi16 (__m128i a, __m128i b) - PUNPCKHWD xmm, xmm/m128 - + __m128i _mm_unpackhi_epi16 (__m128i a, __m128i b) +PUNPCKHWD xmm, xmm/m128 - - __m128i _mm_unpackhi_epi32 (__m128i a, __m128i b) - PUNPCKHDQ xmm, xmm/m128 - + __m128i _mm_unpackhi_epi32 (__m128i a, __m128i b) +PUNPCKHDQ xmm, xmm/m128 - - __m128i _mm_unpackhi_epi64 (__m128i a, __m128i b) - PUNPCKHQDQ xmm, xmm/m128 - + __m128i _mm_unpackhi_epi64 (__m128i a, __m128i b) +PUNPCKHQDQ xmm, xmm/m128 - - __m128i _mm_unpackhi_epi8 (__m128i a, __m128i b) - PUNPCKHBW xmm, xmm/m128 - + __m128i _mm_unpackhi_epi8 (__m128i a, __m128i b) +PUNPCKHBW xmm, xmm/m128 - - __m128i _mm_unpackhi_epi16 (__m128i a, __m128i b) - PUNPCKHWD xmm, xmm/m128 - + __m128i _mm_unpackhi_epi16 (__m128i a, __m128i b) +PUNPCKHWD xmm, xmm/m128 - - __m128i _mm_unpackhi_epi32 (__m128i a, __m128i b) - PUNPCKHDQ xmm, xmm/m128 - + __m128i _mm_unpackhi_epi32 (__m128i a, __m128i b) +PUNPCKHDQ xmm, xmm/m128 - - __m128i _mm_unpackhi_epi64 (__m128i a, __m128i b) - PUNPCKHQDQ xmm, xmm/m128 - + __m128i _mm_unpackhi_epi64 (__m128i a, __m128i b) +PUNPCKHQDQ xmm, xmm/m128 - - __m128i _mm_unpacklo_epi8 (__m128i a, __m128i b) - PUNPCKLBW xmm, xmm/m128 - + __m128i _mm_unpacklo_epi8 (__m128i a, __m128i b) +PUNPCKLBW xmm, xmm/m128 - - __m128d _mm_unpacklo_pd (__m128d a, __m128d b) - UNPCKLPD xmm, xmm/m128 - + __m128d _mm_unpacklo_pd (__m128d a, __m128d b) +UNPCKLPD xmm, xmm/m128 - - __m128i _mm_unpacklo_epi16 (__m128i a, __m128i b) - PUNPCKLWD xmm, xmm/m128 - + __m128i _mm_unpacklo_epi16 (__m128i a, __m128i b) +PUNPCKLWD xmm, xmm/m128 - - __m128i _mm_unpacklo_epi32 (__m128i a, __m128i b) - PUNPCKLDQ xmm, xmm/m128 - + __m128i _mm_unpacklo_epi32 (__m128i a, __m128i b) +PUNPCKLDQ xmm, xmm/m128 - - __m128i _mm_unpacklo_epi64 (__m128i a, __m128i b) - PUNPCKLQDQ xmm, xmm/m128 - + __m128i _mm_unpacklo_epi64 (__m128i a, __m128i b) +PUNPCKLQDQ xmm, xmm/m128 - - __m128i _mm_unpacklo_epi8 (__m128i a, __m128i b) - PUNPCKLBW xmm, xmm/m128 - + __m128i _mm_unpacklo_epi8 (__m128i a, __m128i b) +PUNPCKLBW xmm, xmm/m128 - - __m128i _mm_unpacklo_epi16 (__m128i a, __m128i b) - PUNPCKLWD xmm, xmm/m128 - + __m128i _mm_unpacklo_epi16 (__m128i a, __m128i b) +PUNPCKLWD xmm, xmm/m128 - - __m128i _mm_unpacklo_epi32 (__m128i a, __m128i b) - PUNPCKLDQ xmm, xmm/m128 - + __m128i _mm_unpacklo_epi32 (__m128i a, __m128i b) +PUNPCKLDQ xmm, xmm/m128 - - __m128i _mm_unpacklo_epi64 (__m128i a, __m128i b) - PUNPCKLQDQ xmm, xmm/m128 - + __m128i _mm_unpacklo_epi64 (__m128i a, __m128i b) +PUNPCKLQDQ xmm, xmm/m128 + + + __m128d _mm_cvtsi64_sd (__m128d a, __int64 b) +CVTSI2SD xmm, reg/m64 + + + + + __m128i _mm_cvtsi64_si128 (__int64 a) +MOVQ xmm, reg/m64 + + + + __m128i _mm_cvtsi64_si128 (__int64 a) +MOVQ xmm, reg/m64 + + + + __int64 _mm_cvtsd_si64 (__m128d a) +CVTSD2SI r64, xmm/m64 + + + + __int64 _mm_cvtsi128_si64 (__m128i a) +MOVQ reg/m64, xmm + + + + __int64 _mm_cvttsd_si64 (__m128d a) +CVTTSD2SI reg, xmm/m64 + + + + __int64 _mm_cvtsi128_si64 (__m128i a) +MOVQ reg/m64, xmm + + + + + void _mm_stream_si64(__int64 *p, __int64 a) +MOVNTI m64, r64 + + + + + void _mm_stream_si64(__int64 *p, __int64 a) +MOVNTI m64, r64 + + + - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - __m128d _mm_xor_pd (__m128d a, __m128d b) - XORPD xmm, xmm/m128 - + __m128d _mm_xor_pd (__m128d a, __m128d b) +XORPD xmm, xmm/m128 - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - __m128i _mm_xor_si128 (__m128i a, __m128i b) - PXOR xmm, xmm/m128 - + __m128i _mm_xor_si128 (__m128i a, __m128i b) +PXOR xmm, xmm/m128 - - - - - __m128d _mm_cvtsi64_sd (__m128d a, __int64 b) - CVTSI2SD xmm, reg/m64 - - - - - - - __m128i _mm_cvtsi64_si128 (__int64 a) - MOVQ xmm, reg/m64 - - - - - - __m128i _mm_cvtsi64_si128 (__int64 a) - MOVQ xmm, reg/m64 - - - - - - __int64 _mm_cvtsd_si64 (__m128d a) - CVTSD2SI r64, xmm/m64 - - - - - - __int64 _mm_cvtsi128_si64 (__m128i a) - MOVQ reg/m64, xmm - - - - - - __int64 _mm_cvttsd_si64 (__m128d a) - CVTTSD2SI reg, xmm/m64 - - - - - - __int64 _mm_cvtsi128_si64 (__m128i a) - MOVQ reg/m64, xmm - - - - - - void _mm_stream_si64(__int64 *p, __int64 a) - MOVNTI m64, r64 - - - - - - - void _mm_stream_si64(__int64 *p, __int64 a) - MOVNTI m64, r64 - - - - - This class provides access to Intel SSE3 hardware instructions via intrinsics. - - __m128d _mm_addsub_pd (__m128d a, __m128d b) - ADDSUBPD xmm, xmm/m128 - + __m128d _mm_addsub_pd (__m128d a, __m128d b) +ADDSUBPD xmm, xmm/m128 - - __m128 _mm_addsub_ps (__m128 a, __m128 b) - ADDSUBPS xmm, xmm/m128 - + __m128 _mm_addsub_ps (__m128 a, __m128 b) +ADDSUBPS xmm, xmm/m128 - - __m128d _mm_hadd_pd (__m128d a, __m128d b) - HADDPD xmm, xmm/m128 - + __m128d _mm_hadd_pd (__m128d a, __m128d b) +HADDPD xmm, xmm/m128 - - __m128 _mm_hadd_ps (__m128 a, __m128 b) - HADDPS xmm, xmm/m128 - + __m128 _mm_hadd_ps (__m128 a, __m128 b) +HADDPS xmm, xmm/m128 - - __m128d _mm_hsub_pd (__m128d a, __m128d b) - HSUBPD xmm, xmm/m128 - + __m128d _mm_hsub_pd (__m128d a, __m128d b) +HSUBPD xmm, xmm/m128 - - __m128 _mm_hsub_ps (__m128 a, __m128 b) - HSUBPS xmm, xmm/m128 - + __m128 _mm_hsub_ps (__m128 a, __m128 b) +HSUBPS xmm, xmm/m128 + - - __m128d _mm_loaddup_pd (double const* mem_addr) - MOVDDUP xmm, m64 - + __m128d _mm_loaddup_pd (double const* mem_addr) +MOVDDUP xmm, m64 @@ -30040,10 +8120,8 @@ - - __m128i _mm_lddqu_si128 (__m128i const* mem_addr) - LDDQU xmm, m128 - + __m128i _mm_lddqu_si128 (__m128i const* mem_addr) +LDDQU xmm, m128 @@ -30056,215 +8134,162 @@ - - __m128d _mm_movedup_pd (__m128d a) - MOVDDUP xmm, xmm/m64 - + __m128d _mm_movedup_pd (__m128d a) +MOVDDUP xmm, xmm/m64 - - __m128 _mm_movehdup_ps (__m128 a) - MOVSHDUP xmm, xmm/m128 - + __m128 _mm_movehdup_ps (__m128 a) +MOVSHDUP xmm, xmm/m128 - - __m128 _mm_moveldup_ps (__m128 a) - MOVSLDUP xmm, xmm/m128 - + __m128 _mm_moveldup_ps (__m128 a) +MOVSLDUP xmm, xmm/m128 - - - - This class provides access to Intel SSE4.1 hardware instructions via intrinsics. + This class provides access to Intel SSE4.1 hardware instructions via intrinsics - - __m128d _mm_blend_pd (__m128d a, __m128d b, const int imm8) - BLENDPD xmm, xmm/m128, imm8 - + __m128d _mm_blend_pd (__m128d a, __m128d b, const int imm8) +BLENDPD xmm, xmm/m128, imm8 - - __m128i _mm_blend_epi16 (__m128i a, __m128i b, const int imm8) - PBLENDW xmm, xmm/m128 imm8 - + __m128i _mm_blend_epi16 (__m128i a, __m128i b, const int imm8) +PBLENDW xmm, xmm/m128 imm8 - - __m128 _mm_blend_ps (__m128 a, __m128 b, const int imm8) - BLENDPS xmm, xmm/m128, imm8 - + __m128 _mm_blend_ps (__m128 a, __m128 b, const int imm8) +BLENDPS xmm, xmm/m128, imm8 - - __m128i _mm_blend_epi16 (__m128i a, __m128i b, const int imm8) - PBLENDW xmm, xmm/m128 imm8 - + __m128i _mm_blend_epi16 (__m128i a, __m128i b, const int imm8) +PBLENDW xmm, xmm/m128 imm8 - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128d _mm_blendv_pd (__m128d a, __m128d b, __m128d mask) - BLENDVPD xmm, xmm/m128, xmm0 - + __m128d _mm_blendv_pd (__m128d a, __m128d b, __m128d mask) +BLENDVPD xmm, xmm/m128, xmm0 - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128 _mm_blendv_ps (__m128 a, __m128 b, __m128 mask) - BLENDVPS xmm, xmm/m128, xmm0 - + __m128 _mm_blendv_ps (__m128 a, __m128 b, __m128 mask) +BLENDVPS xmm, xmm/m128, xmm0 - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) - PBLENDVB xmm, xmm/m128, xmm - + __m128i _mm_blendv_epi8 (__m128i a, __m128i b, __m128i mask) +PBLENDVB xmm, xmm/m128, xmm - - __m128d _mm_ceil_pd (__m128d a) - ROUNDPD xmm, xmm/m128, imm8(10) - + __m128d _mm_ceil_pd (__m128d a) +ROUNDPD xmm, xmm/m128, imm8(10) - - __m128 _mm_ceil_ps (__m128 a) - ROUNDPS xmm, xmm/m128, imm8(10) - + __m128 _mm_ceil_ps (__m128 a) +ROUNDPS xmm, xmm/m128, imm8(10) - - __m128d _mm_ceil_sd (__m128d a) - ROUNDSD xmm, xmm/m128, imm8(10) - + __m128d _mm_ceil_sd (__m128d a) +ROUNDSD xmm, xmm/m128, imm8(10) - - __m128d _mm_ceil_sd (__m128d a, __m128d b) - ROUNDSD xmm, xmm/m128, imm8(10) - + __m128d _mm_ceil_sd (__m128d a, __m128d b) +ROUNDSD xmm, xmm/m128, imm8(10) - - __m128 _mm_ceil_ss (__m128 a) - ROUNDSD xmm, xmm/m128, imm8(10) - + __m128 _mm_ceil_ss (__m128 a) +ROUNDSD xmm, xmm/m128, imm8(10) - - __m128 _mm_ceil_ss (__m128 a, __m128 b) - ROUNDSS xmm, xmm/m128, imm8(10) - + __m128 _mm_ceil_ss (__m128 a, __m128 b) +ROUNDSS xmm, xmm/m128, imm8(10) - - __m128i _mm_cmpeq_epi64 (__m128i a, __m128i b) - PCMPEQQ xmm, xmm/m128 - + __m128i _mm_cmpeq_epi64 (__m128i a, __m128i b) +PCMPEQQ xmm, xmm/m128 - - __m128i _mm_cmpeq_epi64 (__m128i a, __m128i b) - PCMPEQQ xmm, xmm/m128 - + __m128i _mm_cmpeq_epi64 (__m128i a, __m128i b) +PCMPEQQ xmm, xmm/m128 @@ -30273,17 +8298,13 @@ - - __m128i _mm_cvtepu8_epi16 (__m128i a) - PMOVZXBW xmm, xmm/m64 - + __m128i _mm_cvtepu8_epi16 (__m128i a) +PMOVZXBW xmm, xmm/m64 - - __m128i _mm_cvtepi8_epi16 (__m128i a) - PMOVSXBW xmm, xmm/m64 - + __m128i _mm_cvtepi8_epi16 (__m128i a) +PMOVSXBW xmm, xmm/m64 @@ -30299,31 +8320,23 @@ - - __m128i _mm_cvtepu8_epi32 (__m128i a) - PMOVZXBD xmm, xmm/m32 - + __m128i _mm_cvtepu8_epi32 (__m128i a) +PMOVZXBD xmm, xmm/m32 - - __m128i _mm_cvtepi16_epi32 (__m128i a) - PMOVSXWD xmm, xmm/m64 - + __m128i _mm_cvtepi16_epi32 (__m128i a) +PMOVSXWD xmm, xmm/m64 - - __m128i _mm_cvtepi8_epi32 (__m128i a) - PMOVSXBD xmm, xmm/m32 - + __m128i _mm_cvtepi8_epi32 (__m128i a) +PMOVSXBD xmm, xmm/m32 - - __m128i _mm_cvtepu16_epi32 (__m128i a) - PMOVZXWD xmm, xmm/m64 - + __m128i _mm_cvtepu16_epi32 (__m128i a) +PMOVZXWD xmm, xmm/m64 @@ -30347,45 +8360,33 @@ - - __m128i _mm_cvtepu8_epi64 (__m128i a) - PMOVZXBQ xmm, xmm/m16 - + __m128i _mm_cvtepu8_epi64 (__m128i a) +PMOVZXBQ xmm, xmm/m16 - - __m128i _mm_cvtepi16_epi64 (__m128i a) - PMOVSXWQ xmm, xmm/m32 - + __m128i _mm_cvtepi16_epi64 (__m128i a) +PMOVSXWQ xmm, xmm/m32 - - __m128i _mm_cvtepi32_epi64 (__m128i a) - PMOVSXDQ xmm, xmm/m64 - + __m128i _mm_cvtepi32_epi64 (__m128i a) +PMOVSXDQ xmm, xmm/m64 - - __m128i _mm_cvtepi8_epi64 (__m128i a) - PMOVSXBQ xmm, xmm/m16 - + __m128i _mm_cvtepi8_epi64 (__m128i a) +PMOVSXBQ xmm, xmm/m16 - - __m128i _mm_cvtepu16_epi64 (__m128i a) - PMOVZXWQ xmm, xmm/m32 - + __m128i _mm_cvtepu16_epi64 (__m128i a) +PMOVZXWQ xmm, xmm/m32 - - __m128i _mm_cvtepu32_epi64 (__m128i a) - PMOVZXDQ xmm, xmm/m64 - + __m128i _mm_cvtepu32_epi64 (__m128i a) +PMOVZXDQ xmm, xmm/m64 @@ -30401,531 +8402,386 @@ - - __m128d _mm_dp_pd (__m128d a, __m128d b, const int imm8) - DPPD xmm, xmm/m128, imm8 - + __m128d _mm_dp_pd (__m128d a, __m128d b, const int imm8) +DPPD xmm, xmm/m128, imm8 - - __m128 _mm_dp_ps (__m128 a, __m128 b, const int imm8) - DPPS xmm, xmm/m128, imm8 - + __m128 _mm_dp_ps (__m128 a, __m128 b, const int imm8) +DPPS xmm, xmm/m128, imm8 - - int _mm_extract_epi8 (__m128i a, const int imm8) - PEXTRB reg/m8, xmm, imm8 - + int _mm_extract_epi8 (__m128i a, const int imm8) +PEXTRB reg/m8, xmm, imm8 - - int _mm_extract_epi32 (__m128i a, const int imm8) - PEXTRD reg/m32, xmm, imm8 - + int _mm_extract_epi32 (__m128i a, const int imm8) +PEXTRD reg/m32, xmm, imm8 - - int _mm_extract_ps (__m128 a, const int imm8) - EXTRACTPS xmm, xmm/m32, imm8 - + int _mm_extract_ps (__m128 a, const int imm8) +EXTRACTPS xmm, xmm/m32, imm8 - - int _mm_extract_epi32 (__m128i a, const int imm8) - PEXTRD reg/m32, xmm, imm8 - + int _mm_extract_epi32 (__m128i a, const int imm8) +PEXTRD reg/m32, xmm, imm8 - - __m128d _mm_floor_pd (__m128d a) - ROUNDPD xmm, xmm/m128, imm8(9) - + __m128d _mm_floor_pd (__m128d a) +ROUNDPD xmm, xmm/m128, imm8(9) - - __m128 _mm_floor_ps (__m128 a) - ROUNDPS xmm, xmm/m128, imm8(9) - + __m128 _mm_floor_ps (__m128 a) +ROUNDPS xmm, xmm/m128, imm8(9) - - __m128d _mm_floor_sd (__m128d a) - ROUNDSD xmm, xmm/m128, imm8(9) - + __m128d _mm_floor_sd (__m128d a) +ROUNDSD xmm, xmm/m128, imm8(9) - - __m128d _mm_floor_sd (__m128d a, __m128d b) - ROUNDSD xmm, xmm/m128, imm8(9) - + __m128d _mm_floor_sd (__m128d a, __m128d b) +ROUNDSD xmm, xmm/m128, imm8(9) - - __m128 _mm_floor_ss (__m128 a) - ROUNDSS xmm, xmm/m128, imm8(9) - + __m128 _mm_floor_ss (__m128 a) +ROUNDSS xmm, xmm/m128, imm8(9) - - __m128 _mm_floor_ss (__m128 a, __m128 b) - ROUNDSS xmm, xmm/m128, imm8(9) - + __m128 _mm_floor_ss (__m128 a, __m128 b) +ROUNDSS xmm, xmm/m128, imm8(9) - - __m128i _mm_insert_epi8 (__m128i a, int i, const int imm8) - PINSRB xmm, reg/m8, imm8 - + __m128i _mm_insert_epi8 (__m128i a, int i, const int imm8) +PINSRB xmm, reg/m8, imm8 - - __m128i _mm_insert_epi32 (__m128i a, int i, const int imm8) - PINSRD xmm, reg/m32, imm8 - + __m128i _mm_insert_epi32 (__m128i a, int i, const int imm8) +PINSRD xmm, reg/m32, imm8 - - __m128i _mm_insert_epi8 (__m128i a, int i, const int imm8) - PINSRB xmm, reg/m8, imm8 - + __m128i _mm_insert_epi8 (__m128i a, int i, const int imm8) +PINSRB xmm, reg/m8, imm8 - - __m128 _mm_insert_ps (__m128 a, __m128 b, const int imm8) - INSERTPS xmm, xmm/m32, imm8 - + __m128 _mm_insert_ps (__m128 a, __m128 b, const int imm8) +INSERTPS xmm, xmm/m32, imm8 - - __m128i _mm_insert_epi32 (__m128i a, int i, const int imm8) - PINSRD xmm, reg/m32, imm8 - + __m128i _mm_insert_epi32 (__m128i a, int i, const int imm8) +PINSRD xmm, reg/m32, imm8 + - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_stream_load_si128 (const __m128i* mem_addr) - MOVNTDQA xmm, m128 - + __m128i _mm_stream_load_si128 (const __m128i* mem_addr) +MOVNTDQA xmm, m128 - - __m128i _mm_max_epi32 (__m128i a, __m128i b) - PMAXSD xmm, xmm/m128 - + __m128i _mm_max_epi32 (__m128i a, __m128i b) +PMAXSD xmm, xmm/m128 - - __m128i _mm_max_epi8 (__m128i a, __m128i b) - PMAXSB xmm, xmm/m128 - + __m128i _mm_max_epi8 (__m128i a, __m128i b) +PMAXSB xmm, xmm/m128 - - __m128i _mm_max_epu16 (__m128i a, __m128i b) - PMAXUW xmm, xmm/m128 - + __m128i _mm_max_epu16 (__m128i a, __m128i b) +PMAXUW xmm, xmm/m128 - - __m128i _mm_max_epu32 (__m128i a, __m128i b) - PMAXUD xmm, xmm/m128 - + __m128i _mm_max_epu32 (__m128i a, __m128i b) +PMAXUD xmm, xmm/m128 - - __m128i _mm_min_epi32 (__m128i a, __m128i b) - PMINSD xmm, xmm/m128 - + __m128i _mm_min_epi32 (__m128i a, __m128i b) +PMINSD xmm, xmm/m128 - - __m128i _mm_min_epi8 (__m128i a, __m128i b) - PMINSB xmm, xmm/m128 - + __m128i _mm_min_epi8 (__m128i a, __m128i b) +PMINSB xmm, xmm/m128 - - __m128i _mm_min_epu16 (__m128i a, __m128i b) - PMINUW xmm, xmm/m128 - + __m128i _mm_min_epu16 (__m128i a, __m128i b) +PMINUW xmm, xmm/m128 - - __m128i _mm_min_epu32 (__m128i a, __m128i b) - PMINUD xmm, xmm/m128 - + __m128i _mm_min_epu32 (__m128i a, __m128i b) +PMINUD xmm, xmm/m128 - - __m128i _mm_minpos_epu16 (__m128i a) - PHMINPOSUW xmm, xmm/m128 - + __m128i _mm_minpos_epu16 (__m128i a) +PHMINPOSUW xmm, xmm/m128 - - __m128i _mm_mpsadbw_epu8 (__m128i a, __m128i b, const int imm8) - MPSADBW xmm, xmm/m128, imm8 - + __m128i _mm_mpsadbw_epu8 (__m128i a, __m128i b, const int imm8) +MPSADBW xmm, xmm/m128, imm8 - - __m128i _mm_mul_epi32 (__m128i a, __m128i b) - PMULDQ xmm, xmm/m128 - + __m128i _mm_mul_epi32 (__m128i a, __m128i b) +PMULDQ xmm, xmm/m128 - - __m128i _mm_mullo_epi32 (__m128i a, __m128i b) - PMULLD xmm, xmm/m128 - + __m128i _mm_mullo_epi32 (__m128i a, __m128i b) +PMULLD xmm, xmm/m128 - - __m128i _mm_mullo_epi32 (__m128i a, __m128i b) - PMULLD xmm, xmm/m128 - + __m128i _mm_mullo_epi32 (__m128i a, __m128i b) +PMULLD xmm, xmm/m128 - - __m128i _mm_packus_epi32 (__m128i a, __m128i b) - PACKUSDW xmm, xmm/m128 - + __m128i _mm_packus_epi32 (__m128i a, __m128i b) +PACKUSDW xmm, xmm/m128 - - _m128d _mm_round_pd (__m128d a, _MM_FROUND_CUR_DIRECTION) - ROUNDPD xmm, xmm/m128, imm8(4) - + _MM_FROUND_CUR_DIRECTION; ROUNDPD xmm, xmm/m128, imm8(4) - - __m128 _mm_round_ps (__m128 a, _MM_FROUND_CUR_DIRECTION) - ROUNDPS xmm, xmm/m128, imm8(4) - + _MM_FROUND_CUR_DIRECTION; ROUNDPS xmm, xmm/m128, imm8(4) - - __m128d _mm_round_sd (__m128d a, _MM_FROUND_CUR_DIRECTION) - ROUNDSD xmm, xmm/m128, imm8(4) - + __m128d _mm_round_sd (__m128d a, _MM_FROUND_CUR_DIRECTION) +ROUNDSD xmm, xmm/m128, imm8(4) - - __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_CUR_DIRECTION) - ROUNDSD xmm, xmm/m128, imm8(4) - + __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_CUR_DIRECTION) +ROUNDSD xmm, xmm/m128, imm8(4) - - __m128 _mm_round_ss (__m128 a, _MM_FROUND_CUR_DIRECTION) - ROUNDSS xmm, xmm/m128, imm8(4) - + __m128 _mm_round_ss (__m128 a, _MM_FROUND_CUR_DIRECTION) +ROUNDSS xmm, xmm/m128, imm8(4) - - __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_CUR_DIRECTION) - ROUNDSS xmm, xmm/m128, imm8(4) - + __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_CUR_DIRECTION) +ROUNDSS xmm, xmm/m128, imm8(4) - - __m128d _mm_round_pd (__m128d a, int rounding) - ROUNDPD xmm, xmm/m128, imm8(8) - _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC - + __m128d _mm_round_pd (__m128d a, int rounding) +ROUNDPD xmm, xmm/m128, imm8(8) + _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC - - __m128 _mm_round_ps (__m128 a, int rounding) - ROUNDPS xmm, xmm/m128, imm8(8) - _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC - + __m128 _mm_round_ps (__m128 a, int rounding) +ROUNDPS xmm, xmm/m128, imm8(8) + _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC - - __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(8) - + __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(8) - - __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(8) - + __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_NEAREST_INT |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(8) - - __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(8) - + __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(8) - - __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(8) - + __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(8) - - __m128d _mm_round_pd (__m128d a, _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC) - ROUNDPD xmm, xmm/m128, imm8(9) - + _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC; ROUNDPD xmm, xmm/m128, imm8(9) - - __m128 _mm_round_ps (__m128 a, _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC) - ROUNDPS xmm, xmm/m128, imm8(9) - + _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC; ROUNDPS xmm, xmm/m128, imm8(9) - - __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(9) - + __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(9) - - __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(9) - + __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_NEG_INF |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(9) - - __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(9) - + __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(9) - - __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(9) - + __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(9) - - __m128d _mm_round_pd (__m128d a, _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC) - ROUNDPD xmm, xmm/m128, imm8(10) - + _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC; ROUNDPD xmm, xmm/m128, imm8(10) - - __m128 _mm_round_ps (__m128 a, _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC) - ROUNDPS xmm, xmm/m128, imm8(10) - + _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC; ROUNDPS xmm, xmm/m128, imm8(10) - - __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(10) - + __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(10) - - __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(10) - + __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_POS_INF |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(10) - - __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(10) - + __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(10) - - __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(10) - + __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(10) - - __m128d _mm_round_pd (__m128d a, _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC) - ROUNDPD xmm, xmm/m128, imm8(11) - + _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC; ROUNDPD xmm, xmm/m128, imm8(11) - - __m128 _mm_round_ps (__m128 a, _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC) - ROUNDPS xmm, xmm/m128, imm8(11) - + _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC; ROUNDPS xmm, xmm/m128, imm8(11) - - __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(11) - + __m128d _mm_round_sd (__m128d a, _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(11) - - __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC) - ROUNDSD xmm, xmm/m128, imm8(11) - + __m128d _mm_round_sd (__m128d a, __m128d b, _MM_FROUND_TO_ZERO |_MM_FROUND_NO_EXC) +ROUNDSD xmm, xmm/m128, imm8(11) - - __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(11) - + __m128 _mm_round_ss (__m128 a, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(11) - - __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) - ROUNDSS xmm, xmm/m128, imm8(11) - + __m128 _mm_round_ss (__m128 a, __m128 b, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC) +ROUNDSS xmm, xmm/m128, imm8(11) @@ -30946,10 +8802,8 @@ - - int _mm_testc_si128 (__m128i a, __m128i b) - PTEST xmm, xmm/m128 - + int _mm_testc_si128 (__m128i a, __m128i b) +PTEST xmm, xmm/m128 @@ -30982,10 +8836,8 @@ - - int _mm_testnzc_si128 (__m128i a, __m128i b) - PTEST xmm, xmm/m128 - + int _mm_testnzc_si128 (__m128i a, __m128i b) +PTEST xmm, xmm/m128 @@ -31018,10 +8870,8 @@ - - int _mm_testz_si128 (__m128i a, __m128i b) - PTEST xmm, xmm/m128 - + int _mm_testz_si128 (__m128i a, __m128i b) +PTEST xmm, xmm/m128 @@ -31037,38 +8887,29 @@ - - - __int64 _mm_extract_epi64 (__m128i a, const int imm8) - PEXTRQ reg/m64, xmm, imm8 - + __int64 _mm_extract_epi64 (__m128i a, const int imm8) +PEXTRQ reg/m64, xmm, imm8 - - __int64 _mm_extract_epi64 (__m128i a, const int imm8) - PEXTRQ reg/m64, xmm, imm8 - + __int64 _mm_extract_epi64 (__m128i a, const int imm8) +PEXTRQ reg/m64, xmm, imm8 - - __m128i _mm_insert_epi64 (__m128i a, __int64 i, const int imm8) - PINSRQ xmm, reg/m64, imm8 - + __m128i _mm_insert_epi64 (__m128i a, __int64 i, const int imm8) +PINSRQ xmm, reg/m64, imm8 - - __m128i _mm_insert_epi64 (__m128i a, __int64 i, const int imm8) - PINSRQ xmm, reg/m64, imm8 - + __m128i _mm_insert_epi64 (__m128i a, __int64 i, const int imm8) +PINSRQ xmm, reg/m64, imm8 @@ -31078,44 +8919,34 @@ This class provides access to Intel SSE4.2 hardware instructions via intrinsics. - - __m128i _mm_cmpgt_epi64 (__m128i a, __m128i b) - PCMPGTQ xmm, xmm/m128 - + __m128i _mm_cmpgt_epi64 (__m128i a, __m128i b) +PCMPGTQ xmm, xmm/m128 - - unsigned int _mm_crc32_u8 (unsigned int crc, unsigned char v) - CRC32 reg, reg/m8 - + unsigned int _mm_crc32_u8 (unsigned int crc, unsigned char v) +CRC32 reg, reg/m8 - - unsigned int _mm_crc32_u16 (unsigned int crc, unsigned short v) - CRC32 reg, reg/m16 - + unsigned int _mm_crc32_u16 (unsigned int crc, unsigned short v) +CRC32 reg, reg/m16 - - unsigned int _mm_crc32_u32 (unsigned int crc, unsigned int v) - CRC32 reg, reg/m32 - + unsigned int _mm_crc32_u32 (unsigned int crc, unsigned int v) +CRC32 reg, reg/m32 - - unsigned __int64 _mm_crc32_u64 (unsigned __int64 crc, unsigned __int64 v) - CRC32 reg, reg/m64 - + unsigned __int64 _mm_crc32_u64 (unsigned __int64 crc, unsigned __int64 v) +CRC32 reg, reg/m64 @@ -31124,215 +8955,154 @@ This class provides access to Intel SSSE3 hardware instructions via intrinsics. - - __m128i _mm_abs_epi16 (__m128i a) - PABSW xmm, xmm/m128 - + __m128i _mm_abs_epi16 (__m128i a) +PABSW xmm, xmm/m128 - - __m128i _mm_abs_epi32 (__m128i a) - PABSD xmm, xmm/m128 - + __m128i _mm_abs_epi32 (__m128i a) +PABSD xmm, xmm/m128 - - __m128i _mm_abs_epi8 (__m128i a) - PABSB xmm, xmm/m128 - + __m128i _mm_abs_epi8 (__m128i a) +PABSB xmm, xmm/m128 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) - PALIGNR xmm, xmm/m128, imm8 - + __m128i _mm_alignr_epi8 (__m128i a, __m128i b, int count) +PALIGNR xmm, xmm/m128, imm8 - - __m128i _mm_hadd_epi16 (__m128i a, __m128i b) - PHADDW xmm, xmm/m128 - + __m128i _mm_hadd_epi16 (__m128i a, __m128i b) +PHADDW xmm, xmm/m128 - - __m128i _mm_hadd_epi32 (__m128i a, __m128i b) - PHADDD xmm, xmm/m128 - + __m128i _mm_hadd_epi32 (__m128i a, __m128i b) +PHADDD xmm, xmm/m128 - - __m128i _mm_hadds_epi16 (__m128i a, __m128i b) - PHADDSW xmm, xmm/m128 - + __m128i _mm_hadds_epi16 (__m128i a, __m128i b) +PHADDSW xmm, xmm/m128 - - __m128i _mm_hsub_epi16 (__m128i a, __m128i b) - PHSUBW xmm, xmm/m128 - + __m128i _mm_hsub_epi16 (__m128i a, __m128i b) +PHSUBW xmm, xmm/m128 - - __m128i _mm_hsub_epi32 (__m128i a, __m128i b) - PHSUBD xmm, xmm/m128 - + __m128i _mm_hsub_epi32 (__m128i a, __m128i b) +PHSUBD xmm, xmm/m128 - - __m128i _mm_hsubs_epi16 (__m128i a, __m128i b) - PHSUBSW xmm, xmm/m128 - + __m128i _mm_hsubs_epi16 (__m128i a, __m128i b) +PHSUBSW xmm, xmm/m128 + - - __m128i _mm_maddubs_epi16 (__m128i a, __m128i b) - PMADDUBSW xmm, xmm/m128 - + __m128i _mm_maddubs_epi16 (__m128i a, __m128i b) +PMADDUBSW xmm, xmm/m128 - - __m128i _mm_mulhrs_epi16 (__m128i a, __m128i b) - PMULHRSW xmm, xmm/m128 - + __m128i _mm_mulhrs_epi16 (__m128i a, __m128i b) +PMULHRSW xmm, xmm/m128 - - __m128i _mm_shuffle_epi8 (__m128i a, __m128i b) - PSHUFB xmm, xmm/m128 - + __m128i _mm_shuffle_epi8 (__m128i a, __m128i b) +PSHUFB xmm, xmm/m128 - - __m128i _mm_shuffle_epi8 (__m128i a, __m128i b) - PSHUFB xmm, xmm/m128 - + __m128i _mm_shuffle_epi8 (__m128i a, __m128i b) +PSHUFB xmm, xmm/m128 - - __m128i _mm_sign_epi16 (__m128i a, __m128i b) - PSIGNW xmm, xmm/m128 - + __m128i _mm_sign_epi16 (__m128i a, __m128i b) +PSIGNW xmm, xmm/m128 - - __m128i _mm_sign_epi32 (__m128i a, __m128i b) - PSIGND xmm, xmm/m128 - + __m128i _mm_sign_epi32 (__m128i a, __m128i b) +PSIGND xmm, xmm/m128 - - __m128i _mm_sign_epi8 (__m128i a, __m128i b) - PSIGNB xmm, xmm/m128 - + __m128i _mm_sign_epi8 (__m128i a, __m128i b) +PSIGNB xmm, xmm/m128 - - - - - Provides access to the x86 base hardware instructions via intrinsics. - - - void __cpuidex(int cpuInfo[4], int function_id, int subfunction_id); CPUID - - - - - - \ No newline at end of file