X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=opcodes%2Ffr30-ibld.c;h=d41332582d64ec93ec2056e93cc6b68c1bc72f9f;hb=13f2298f13f2b1e57d177898c49ee8f4f3216fab;hp=48dad67d0088b14cb2243c661154090d581afda9;hpb=47b0e7ad8c60ea4b45b22ad5cb376f068991bc88;p=platform%2Fupstream%2Fbinutils.git diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c index 48dad67..d413325 100644 --- a/opcodes/fr30-ibld.c +++ b/opcodes/fr30-ibld.c @@ -3,20 +3,19 @@ THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. - the resultant file is machine generated, cgen-ibld.in isn't - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005 - Free Software Foundation, Inc. + Copyright (C) 1996-2014 Free Software Foundation, Inc. - This file is part of the GNU Binutils and GDB, the GNU debugger. + This file is part of libopcodes. - This program is free software; you can redistribute it and/or modify + This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., @@ -33,6 +32,7 @@ #include "symcat.h" #include "fr30-desc.h" #include "fr30-opc.h" +#include "cgen/basic-modes.h" #include "opintl.h" #include "safe-ctype.h" @@ -137,7 +137,7 @@ insert_normal (CGEN_CPU_DESC cd, if (length == 0) return NULL; - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); /* For architectures with insns smaller than the base-insn-bitsize, @@ -168,13 +168,21 @@ insert_normal (CGEN_CPU_DESC cd, else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) { unsigned long maxval = mask; - - if ((unsigned long) value > maxval) + unsigned long val = (unsigned long) value; + + /* For hosts with a word size > 32 check to see if value has been sign + extended beyond 32 bits. If so then ignore these higher sign bits + as the user is attempting to store a 32-bit signed value into an + unsigned 32-bit field which is allowed. */ + if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) + val &= 0xFFFFFFFF; + + if (val > maxval) { /* xgettext:c-format */ sprintf (errbuf, - _("operand out of range (%lu not between 0 and %lu)"), - value, maxval); + _("operand out of range (0x%lx not between 0 and 0x%lx)"), + val, maxval); return errbuf; } } @@ -433,16 +441,15 @@ extract_normal (CGEN_CPU_DESC cd, return 1; } - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); /* For architectures with insns smaller than the insn-base-bitsize, word_length may be too big. */ if (cd->min_insn_bitsize < cd->base_insn_bitsize) { - if (word_offset == 0 - && word_length > total_length) - word_length = total_length; + if (word_offset + word_length > total_length) + word_length = total_length - word_offset; } /* Does the value reside in INSN_VALUE, and at the right alignment? */ @@ -461,7 +468,7 @@ extract_normal (CGEN_CPU_DESC cd, { unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; - if (word_length > 32) + if (word_length > 8 * sizeof (CGEN_INSN_INT)) abort (); if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) @@ -597,7 +604,7 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd, case FR30_OPERAND_DIR10 : { long value = fields->f_dir10; - value = ((unsigned int) (value) >> (2)); + value = ((USI) (value) >> (2)); errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer); } break; @@ -607,14 +614,14 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd, case FR30_OPERAND_DIR9 : { long value = fields->f_dir9; - value = ((unsigned int) (value) >> (1)); + value = ((USI) (value) >> (1)); errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer); } break; case FR30_OPERAND_DISP10 : { long value = fields->f_disp10; - value = ((int) (value) >> (2)); + value = ((SI) (value) >> (2)); errmsg = insert_normal (cd, value, 0|(1<f_disp9; - value = ((int) (value) >> (1)); + value = ((SI) (value) >> (1)); errmsg = insert_normal (cd, value, 0|(1<> (16)); + FLD (f_i20_4) = ((UINT) (FLD (f_i20)) >> (16)); FLD (f_i20_16) = ((FLD (f_i20)) & (65535)); } errmsg = insert_normal (cd, fields->f_i20_4, 0, 0, 8, 4, 16, total_length, buffer); @@ -651,14 +658,14 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd, case FR30_OPERAND_LABEL12 : { long value = fields->f_rel12; - value = ((int) (((value) - (((pc) + (2))))) >> (1)); + value = ((SI) (((value) - (((pc) + (2))))) >> (1)); errmsg = insert_normal (cd, value, 0|(1<f_rel9; - value = ((int) (((value) - (((pc) + (2))))) >> (1)); + value = ((SI) (((value) - (((pc) + (2))))) >> (1)); errmsg = insert_normal (cd, value, 0|(1<f_s10; - value = ((int) (value) >> (2)); + value = ((SI) (value) >> (2)); errmsg = insert_normal (cd, value, 0|(1<f_u10; - value = ((unsigned int) (value) >> (2)); + value = ((USI) (value) >> (2)); errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer); } break; @@ -709,7 +716,7 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd, case FR30_OPERAND_UDISP6 : { long value = fields->f_udisp6; - value = ((unsigned int) (value) >> (2)); + value = ((USI) (value) >> (2)); errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer); } break;