X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=opcodes%2Fcr16-opc.c;h=8c5b47e74155e75cff624257b48f143d41561367;hb=8527d542c07f6bea86fe5baf3b31568c7fba1398;hp=fed2ea13b23e7553cd6a283cbb144ff41fb8c3ae;hpb=796d53134aa59d7dcf70d0f82913974b04648c6a;p=platform%2Fupstream%2Fbinutils.git

diff --git a/opcodes/cr16-opc.c b/opcodes/cr16-opc.c
index fed2ea1..8c5b47e 100644
--- a/opcodes/cr16-opc.c
+++ b/opcodes/cr16-opc.c
@@ -1,5 +1,5 @@
 /* cr16-opc.c -- Table of opcodes for the CR16 processor.
-   Copyright 2007, 2008 Free Software Foundation, Inc.
+   Copyright (C) 2007-2014 Free Software Foundation, Inc.
    Contributed by M R Swami Reddy (MR.Swami.Reddy@nsc.com)
 
    This file is part of the GNU opcodes library.
@@ -34,7 +34,7 @@ const inst cr16_instruction[] =
   /* opc8 r r */                                                     \
   {NAME, 1, OPC+0x1, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
 
-/* for Logincal operations, allow unsinged imm16 also */
+/* For Logical operations, allow unsigned imm16 also.  */
 #define  ARITH1_BYTE_INST(NAME, OPC, OP1)                            \
   /* opc8 imm16 r */                                                 \
   {NAME, 2, (OPC<<4)+0xB, 20, ARITH_BYTE_INS, {{OP1,0}, {regr,16}}}
@@ -459,8 +459,11 @@ const unsigned int cr16_num_opcodes = ARRAY_SIZE (cr16_instruction);
    For example :
       REG(u4, 0x84, CR16_U_REGTYPE)
    is interpreted as :
-      {"u4",  u4, 0x84, CR16_U_REGTYPE}  */
-#define REG(NAME, N, TYPE)    {STRINGX(NAME), {NAME}, N, TYPE}
+      {"u4",  u4, 0x84, CR16_U_REGTYPE}
+   The union initializer (second member) always refers to the first
+   member of the union, so cast NAME to that type to avoid possible
+   compiler warnings when used for CR16_P_REGTYPE cases.  */
+#define REG(NAME, N, TYPE)    {STRINGX(NAME), {(reg) NAME}, N, TYPE}
 
 #define REGP(NAME, BNAME, N, TYPE)    {STRINGX(NAME), {BNAME}, N, TYPE}