X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=lib%2Ffdtdec.c;h=91503b8cb922010829e0679544929f66a937213b;hb=235c5b8315c6a9eb566fd3d99a098cc6db869fc5;hp=4defb902b87297d03f891ea18b26647bd19fccc9;hpb=9a6535e05f17acf03e891266a650cb6029124743;p=platform%2Fkernel%2Fu-boot.git diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 4defb90..91503b8 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -12,6 +12,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -66,6 +67,14 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), + COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), + COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), + COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), + COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"), + COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"), + COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"), + COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"), + COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), }; const char *fdtdec_get_compatible(enum fdt_compat_id id) @@ -112,7 +121,7 @@ fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, return FDT_ADDR_T_NONE; } -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_OF_LIBFDT) +#if CONFIG_IS_ENABLED(OF_TRANSLATE) if (translate) addr = fdt_translate_address(blob, node, prop_addr); else @@ -836,7 +845,7 @@ int fdtdec_get_child_count(const void *blob, int node) int subnode; int num = 0; - fdt_for_each_subnode(blob, subnode, node) + fdt_for_each_subnode(subnode, blob, node) num++; return num; @@ -932,38 +941,6 @@ int fdtdec_decode_region(const void *blob, int node, const char *prop_name, return 0; } -/** - * Read a flash entry from the fdt - * - * @param blob FDT blob - * @param node Offset of node to read - * @param name Name of node being read - * @param entry Place to put offset and size of this node - * @return 0 if ok, -ve on error - */ -int fdtdec_read_fmap_entry(const void *blob, int node, const char *name, - struct fmap_entry *entry) -{ - const char *prop; - u32 reg[2]; - - if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) { - debug("Node '%s' has bad/missing 'reg' property\n", name); - return -FDT_ERR_NOTFOUND; - } - entry->offset = reg[0]; - entry->length = reg[1]; - entry->used = fdtdec_get_int(blob, node, "used", entry->length); - prop = fdt_getprop(blob, node, "compress", NULL); - entry->compress_algo = prop && !strcmp(prop, "lzo") ? - FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE; - prop = fdt_getprop(blob, node, "hash", &entry->hash_size); - entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE; - entry->hash = (uint8_t *)prop; - - return 0; -} - u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) { u64 number = 0; @@ -1014,7 +991,7 @@ int fdt_get_named_resource(const void *fdt, int node, const char *property, { int index; - index = fdt_find_string(fdt, node, prop_names, name); + index = fdt_stringlist_search(fdt, node, prop_names, name); if (index < 0) return index; @@ -1174,6 +1151,63 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index, return ret; } +int fdtdec_setup_memory_size(void) +{ + int ret, mem; + struct fdt_resource res; + + mem = fdt_path_offset(gd->fdt_blob, "/memory"); + if (mem < 0) { + debug("%s: Missing /memory node\n", __func__); + return -EINVAL; + } + + ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); + if (ret != 0) { + debug("%s: Unable to decode first memory bank\n", __func__); + return -EINVAL; + } + + gd->ram_size = (phys_size_t)(res.end - res.start + 1); + debug("%s: Initial DRAM size %llx\n", __func__, + (unsigned long long)gd->ram_size); + + return 0; +} + +#if defined(CONFIG_NR_DRAM_BANKS) +int fdtdec_setup_memory_banksize(void) +{ + int bank, ret, mem; + struct fdt_resource res; + + mem = fdt_path_offset(gd->fdt_blob, "/memory"); + if (mem < 0) { + debug("%s: Missing /memory node\n", __func__); + return -EINVAL; + } + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res); + if (ret == -FDT_ERR_NOTFOUND) + break; + if (ret != 0) + return -EINVAL; + + gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; + gd->bd->bi_dram[bank].size = + (phys_size_t)(res.end - res.start + 1); + + debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", + __func__, bank, + (unsigned long long)gd->bd->bi_dram[bank].start, + (unsigned long long)gd->bd->bi_dram[bank].size); + } + + return 0; +} +#endif + int fdtdec_setup(void) { #if CONFIG_IS_ENABLED(OF_CONTROL) @@ -1191,6 +1225,9 @@ int fdtdec_setup(void) /* FDT is at end of image */ gd->fdt_blob = (ulong *)&_end; # endif +# elif defined(CONFIG_OF_BOARD) + /* Allow the board to override the fdt address. */ + gd->fdt_blob = board_fdt_blob_setup(); # elif defined(CONFIG_OF_HOSTFILE) if (sandbox_read_fdt_from_file()) { puts("Failed to read control FDT\n");