X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fzynqmppl.h;h=5214db99fba769b2ae8dbeba111cefacc7f2cced;hb=b4ee6daad7a2604ca9466b2ba48de86cc27d381f;hp=4c8c2f88f04c5b587a85115315363e9edacf4133;hpb=926870478d1fd5e8cf6a38716c9cf1ae845435e1;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 4c8c2f8..5214db9 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
  * (C) Copyright 2015 Xilinx, Inc,
  * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef _ZYNQMPPL_H_
@@ -12,10 +11,14 @@
 
 #define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID		0xC2000018
 #define ZYNQMP_SIP_SVC_PM_FPGA_LOAD		0xC2000016
+#define ZYNQMP_SIP_SVC_PM_FPGA_STATUS		0xC2000017
 #define ZYNQMP_FPGA_OP_INIT			(1 << 0)
 #define ZYNQMP_FPGA_OP_LOAD			(1 << 1)
 #define ZYNQMP_FPGA_OP_DONE			(1 << 2)
 
+#define ZYNQMP_FPGA_FLAG_AUTHENTICATED		BIT(2)
+#define ZYNQMP_FPGA_FLAG_ENCRYPTED		BIT(3)
+
 #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT	15
 #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK	(0xf << \
 					ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)