X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fxilinx.h;h=e4e297979882bbf150b6d0a9322b8e2f927e5b01;hb=46b5c8ed017958fc387ab86c71ae6c90abb6793c;hp=aebcb3bfdf29d7f87e4701fd01387bfe8f95b34a;hpb=1a897668ac33c57ca76f47cb940ec32b405e90dd;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/xilinx.h b/include/xilinx.h
index aebcb3b..e4e2979 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <fpga.h>
@@ -21,6 +20,8 @@ typedef enum {			/* typedef xilinx_iface */
 	master_selectmap,	/* master SelectMap (virtex2)           */
 	slave_selectmap,	/* slave SelectMap (virtex2)            */
 	devcfg,			/* devcfg interface (zynq) */
+	csu_dma,		/* csu_dma interface (zynqmp) */
+	cfi,			/* CFI interface(versal) */
 	max_xilinx_iface_type	/* insert all new types before this */
 } xilinx_iface;			/* end, typedef xilinx_iface */
 
@@ -31,9 +32,16 @@ typedef enum {			/* typedef xilinx_family */
 	xilinx_virtex2,		/* Virtex2 Family */
 	xilinx_spartan3,	/* Spartan-III Family */
 	xilinx_zynq,		/* Zynq Family */
+	xilinx_zynqmp,		/* ZynqMP Family */
+	xilinx_versal,		/* Versal Family */
 	max_xilinx_type		/* insert all new types before this */
 } xilinx_family;		/* end, typedef xilinx_family */
 
+/* FPGA bitstream supported types */
+#define FPGA_LEGACY			BIT(0)
+#define FPGA_XILINX_ZYNQMP_DDRAUTH	BIT(1)
+#define FPGA_XILINX_ZYNQMP_ENC		BIT(2)
+
 typedef struct {		/* typedef xilinx_desc */
 	xilinx_family family;	/* part type */
 	xilinx_iface iface;	/* interface type */
@@ -42,23 +50,33 @@ typedef struct {		/* typedef xilinx_desc */
 	int cookie;		/* implementation specific cookie */
 	struct xilinx_fpga_op *operations; /* operations */
 	char *name;		/* device name in bitstream */
+	int flags;		/* compatible flags */
 } xilinx_desc;			/* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
-	int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);
-	int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *);
-	int (*dump)(xilinx_desc *, const void *, size_t);
-	int (*info)(xilinx_desc *);
+	int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
+		    bitstream_type bstype, int flags);
+	int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
+		      fpga_fs_info *fpga_fsinfo);
+	int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
+		     struct fpga_secure_info *fpga_sec_info);
+	int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
+	int (*info)(xilinx_desc *desc);
+#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
+	int (*str2flag)(xilinx_desc *desc, const char *string);
+#endif
 };
 
 /* Generic Xilinx Functions
  *********************************************************************/
 int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
-		bitstream_type bstype);
+		bitstream_type bstype, int flags);
 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 int xilinx_info(xilinx_desc *desc);
 int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
 		  fpga_fs_info *fpga_fsinfo);
+int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
+		 struct fpga_secure_info *fpga_sec_info);
 
 /* Board specific implementation specific function types
  *********************************************************************/