X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Ftsec.h;h=153337837a921b8abac144a9d6410b2cfce54fe5;hb=6786ce1ce14feb4d02854a0c04bc0cce505be46e;hp=e99a7fa8782f9db5826f44d5d884167fcd1e0f0b;hpb=a6d4cd4778bcc30f451f2d5d92ec4722ff5b71cc;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/tsec.h b/include/tsec.h
index e99a7fa..1533378 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  *  tsec.h
  *
@@ -7,8 +8,6 @@
  * (C) Copyright 2003, Motorola, Inc.
  * maintained by Xianghua Xiao (x.xiao@motorola.com)
  * author Andy Fleming
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __TSEC_H
@@ -18,55 +17,7 @@
 #include <config.h>
 #include <phy.h>
 
-#ifndef CONFIG_DM_ETH
-
-#ifdef CONFIG_ARCH_LS1021A
-#define TSEC_SIZE		0x40000
-#define TSEC_MDIO_OFFSET	0x40000
-#else
-#define TSEC_SIZE 		0x01000
-#define TSEC_MDIO_OFFSET	0x01000
-#endif
-
-#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + 0x520)
-
-#define TSEC_GET_REGS(num, offset) \
-	(struct tsec __iomem *)\
-	(TSEC_BASE_ADDR + (((num) - 1) * (offset)))
-
-#define TSEC_GET_REGS_BASE(num) \
-	TSEC_GET_REGS((num), TSEC_SIZE)
-
-#define TSEC_GET_MDIO_REGS(num, offset) \
-	(struct tsec_mii_mng __iomem *)\
-	(CONFIG_SYS_MDIO_BASE_ADDR  + ((num) - 1) * (offset))
-
-#define TSEC_GET_MDIO_REGS_BASE(num) \
-	TSEC_GET_MDIO_REGS((num), TSEC_MDIO_OFFSET)
-
-#define DEFAULT_MII_NAME "FSL_MDIO"
-
-#define STD_TSEC_INFO(num) \
-{			\
-	.regs = TSEC_GET_REGS_BASE(num), \
-	.miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num), \
-	.devname = CONFIG_TSEC##num##_NAME, \
-	.phyaddr = TSEC##num##_PHY_ADDR, \
-	.flags = TSEC##num##_FLAGS, \
-	.mii_devname = DEFAULT_MII_NAME \
-}
-
-#define SET_STD_TSEC_INFO(x, num) \
-{			\
-	x.regs = TSEC_GET_REGS_BASE(num); \
-	x.miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num); \
-	x.devname = CONFIG_TSEC##num##_NAME; \
-	x.phyaddr = TSEC##num##_PHY_ADDR; \
-	x.flags = TSEC##num##_FLAGS;\
-	x.mii_devname = DEFAULT_MII_NAME;\
-}
-
-#endif /* CONFIG_DM_ETH */
+#define TSEC_MDIO_REGS_OFFSET	0x520
 
 #define MAC_ADDR_LEN		6
 
@@ -121,8 +72,10 @@
 #define ECNTRL_REDUCED_MII_MODE	0x00000004
 #define ECNTRL_SGMII_MODE	0x00000002
 
-#ifndef CONFIG_SYS_TBIPA_VALUE
-# define CONFIG_SYS_TBIPA_VALUE	0x1f
+#define RCTRL_PROM		0x00000008
+
+#ifndef CFG_SYS_TBIPA_VALUE
+# define CFG_SYS_TBIPA_VALUE	0x1f
 #endif
 
 #define MRBLR_INIT_SETTINGS	PKTSIZE_ALIGN
@@ -393,6 +346,10 @@ struct tsec {
 
 #define TX_BUF_CNT	2
 
+struct tsec_data {
+	u32 mdio_regs_off;
+};
+
 struct tsec_private {
 	struct txbd8 __iomem txbd[TX_BUF_CNT];
 	struct rxbd8 __iomem rxbd[PKTBUFSRX];
@@ -407,11 +364,7 @@ struct tsec_private {
 	u32 flags;
 	uint rx_idx;	/* index of the current RX buffer */
 	uint tx_idx;	/* index of the current TX buffer */
-#ifndef CONFIG_DM_ETH
-	struct eth_device *dev;
-#else
 	struct udevice *dev;
-#endif
 };
 
 struct tsec_info_struct {
@@ -424,9 +377,4 @@ struct tsec_info_struct {
 	u32 flags;
 };
 
-#ifndef CONFIG_DM_ETH
-int tsec_standard_init(bd_t *bis);
-int tsec_eth_init(bd_t *bis, struct tsec_info_struct *tsec_info, int num);
-#endif
-
 #endif /* __TSEC_H */