X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fspi.h;h=ef8c1f6692e23ae930faa5c17d97ffc248785a46;hb=f9a48654ee70fbad29f487d074fd36a1548b4209;hp=92427e5f32953f37c67b0369cf6bb3b35cfa521c;hpb=9450ab2ba8d720bd9f73bccc0af2e2b5a2c2aaf1;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/spi.h b/include/spi.h index 92427e5..ef8c1f6 100644 --- a/include/spi.h +++ b/include/spi.h @@ -10,10 +10,11 @@ #define _SPI_H_ #include +#include /* SPI mode flags */ -#define SPI_CPHA BIT(0) /* clock phase */ -#define SPI_CPOL BIT(1) /* clock polarity */ +#define SPI_CPHA BIT(0) /* clock phase (1 = SPI_CLOCK_PHASE_SECOND) */ +#define SPI_CPOL BIT(1) /* clock polarity (1 = SPI_POLARITY_HIGH) */ #define SPI_MODE_0 (0|0) /* (original MicroWire) */ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) @@ -30,13 +31,14 @@ #define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ #define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ #define SPI_RX_QUAD BIT(13) /* receive with 4 wires */ +#define SPI_TX_OCTAL BIT(14) /* transmit with 8 wires */ +#define SPI_RX_OCTAL BIT(15) /* receive with 8 wires */ /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec #define SPI_DEFAULT_WORDLEN 8 -#ifdef CONFIG_DM_SPI /* TODO(sjg@chromium.org): Remove this and use max_hz from struct spi_slave */ struct dm_spi_bus { uint max_hz; @@ -62,7 +64,38 @@ struct dm_spi_slave_platdata { uint mode; }; -#endif /* CONFIG_DM_SPI */ +/** + * enum spi_clock_phase - indicates the clock phase to use for SPI (CPHA) + * + * @SPI_CLOCK_PHASE_FIRST: Data sampled on the first phase + * @SPI_CLOCK_PHASE_SECOND: Data sampled on the second phase + */ +enum spi_clock_phase { + SPI_CLOCK_PHASE_FIRST, + SPI_CLOCK_PHASE_SECOND, +}; + +/** + * enum spi_wire_mode - indicates the number of wires used for SPI + * + * @SPI_4_WIRE_MODE: Normal bidirectional mode with MOSI and MISO + * @SPI_3_WIRE_MODE: Unidirectional version with a single data line SISO + */ +enum spi_wire_mode { + SPI_4_WIRE_MODE, + SPI_3_WIRE_MODE, +}; + +/** + * enum spi_polarity - indicates the polarity of the SPI bus (CPOL) + * + * @SPI_POLARITY_LOW: Clock is low in idle state + * @SPI_POLARITY_HIGH: Clock is high in idle state + */ +enum spi_polarity { + SPI_POLARITY_LOW, + SPI_POLARITY_HIGH, +}; /** * struct spi_slave - Representation of a SPI slave @@ -95,7 +128,7 @@ struct dm_spi_slave_platdata { * @flags: Indication of SPI flags. */ struct spi_slave { -#ifdef CONFIG_DM_SPI +#if CONFIG_IS_ENABLED(DM_SPI) struct udevice *dev; /* struct spi_slave is dev->parentdata */ uint max_hz; uint speed; @@ -113,8 +146,6 @@ struct spi_slave { #define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ #define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ -#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ }; /** @@ -224,7 +255,7 @@ void spi_release_bus(struct spi_slave *slave); int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); /** - * SPI transfer + * SPI transfer (optional if mem_ops is used) * * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks * "bitlen" bits in the SPI MISO port. That's just the way SPI works. @@ -248,6 +279,26 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags); +/** + * spi_write_then_read - SPI synchronous write followed by read + * + * This performs a half duplex transaction in which the first transaction + * is to send the opcode and if the length of buf is non-zero then it start + * the second transaction as tx or rx based on the need from respective slave. + * + * @slave: The SPI slave device with which opcode/data will be exchanged + * @opcode: opcode used for specific transfer + * @n_opcode: size of opcode, in bytes + * @txbuf: buffer into which data to be written + * @rxbuf: buffer into which data will be read + * @n_buf: size of buf (whether it's [tx|rx]buf), in bytes + * + * Returns: 0 on success, not 0 on failure + */ +int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, + size_t n_opcode, const u8 *txbuf, u8 *rxbuf, + size_t n_buf); + /* Copy memory mapped data */ void spi_flash_copy_mmap(void *data, void *offset, size_t len); @@ -261,7 +312,12 @@ void spi_flash_copy_mmap(void *data, void *offset, size_t len); */ int spi_cs_is_valid(unsigned int bus, unsigned int cs); -#ifndef CONFIG_DM_SPI +/* + * These names are used in several drivers and these declarations will be + * removed soon as part of the SPI DM migration. Drop them if driver model is + * enabled for SPI. + */ +#if !CONFIG_IS_ENABLED(DM_SPI) /** * Activate a SPI chipselect. * This function is provided by the board code when using a driver @@ -279,6 +335,7 @@ void spi_cs_activate(struct spi_slave *slave); * select to the device identified by "slave". */ void spi_cs_deactivate(struct spi_slave *slave); +#endif /** * Set transfer speed. @@ -287,7 +344,6 @@ void spi_cs_deactivate(struct spi_slave *slave); * @hz: The transfer speed */ void spi_set_speed(struct spi_slave *slave, uint hz); -#endif /** * Write 8 bits, then read 8 bits. @@ -311,8 +367,6 @@ static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte) return ret < 0 ? ret : din[1]; } -#ifdef CONFIG_DM_SPI - /** * struct spi_cs_info - Information about a bus chip select * @@ -438,10 +492,23 @@ struct dm_spi_ops { * @cs: The chip select (0..n-1) * @info: Returns information about the chip select, if valid. * On entry info->dev is NULL - * @return 0 if OK (and @info is set up), -ENODEV if the chip select + * @return 0 if OK (and @info is set up), -EINVAL if the chip select * is invalid, other -ve value on error */ int (*cs_info)(struct udevice *bus, uint cs, struct spi_cs_info *info); + + /** + * get_mmap() - Get memory-mapped SPI + * + * @dev: The SPI flash slave device + * @map_basep: Returns base memory address for mapped SPI + * @map_sizep: Returns size of mapped SPI + * @offsetp: Returns start offset of SPI flash where the map works + * correctly (offsets before this are not visible) + * @return 0 if OK, -EFAULT if memory mapping is not available + */ + int (*get_mmap)(struct udevice *dev, ulong *map_basep, + uint *map_sizep, uint *offsetp); }; struct dm_spi_emul_ops { @@ -496,14 +563,15 @@ int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, * device and slave device. * * If no such slave exists, and drv_name is not NULL, then a new slave device - * is automatically bound on this chip select. + * is automatically bound on this chip select with requested speed and mode. * - * Ths new slave device is probed ready for use with the given speed and mode. + * Ths new slave device is probed ready for use with the speed and mode + * from platdata when available or the requested values. * * @busnum: SPI bus number * @cs: Chip select to look for - * @speed: SPI speed to use for this slave - * @mode: SPI mode to use for this slave + * @speed: SPI speed to use for this slave when not available in platdata + * @mode: SPI mode to use for this slave when not available in platdata * @drv_name: Name of driver to attach to this chip select * @dev_name: Name of the new device thus created * @busp: Returns bus device @@ -527,7 +595,8 @@ int spi_chip_select(struct udevice *slave); * @bus: SPI bus to search * @cs: Chip select to look for * @devp: Returns the slave device if found - * @return 0 if found, -ENODEV on error + * @return 0 if found, -EINVAL if cs is invalid, -ENODEV if no device attached, + * other -ve value on error */ int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp); @@ -629,9 +698,22 @@ void dm_spi_release_bus(struct udevice *dev); int dm_spi_xfer(struct udevice *dev, unsigned int bitlen, const void *dout, void *din, unsigned long flags); +/** + * spi_get_mmap() - Get memory-mapped SPI + * + * @dev: SPI slave device to check + * @map_basep: Returns base memory address for mapped SPI + * @map_sizep: Returns size of mapped SPI + * @offsetp: Returns start offset of SPI flash where the map works + * correctly (offsets before this are not visible) + * @return 0 if OK, -ENOSYS if no operation, -EFAULT if memory mapping is not + * available + */ +int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep, + uint *offsetp); + /* Access the operations for a SPI device */ #define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) #define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops) -#endif /* CONFIG_DM_SPI */ #endif /* _SPI_H_ */