X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fspi.h;h=4b88d3986e78cea0e3bf117a5b6351f88c011146;hb=312a6c016a2d81aa3fbc605f5c0c315b6a4e3464;hp=fd095020b29af1e8867f2e1f711baf2a87bbabfb;hpb=e5961f07068443bf55a8a71ef04e7364583e495a;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/spi.h b/include/spi.h
index fd09502..4b88d39 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -11,34 +11,27 @@
 #define _SPI_H_
 
 /* SPI mode flags */
-#define	SPI_CPHA	0x01			/* clock phase */
-#define	SPI_CPOL	0x02			/* clock polarity */
-#define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
-#define	SPI_MODE_1	(0|SPI_CPHA)
-#define	SPI_MODE_2	(SPI_CPOL|0)
-#define	SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
-#define	SPI_CS_HIGH	0x04			/* CS active high */
-#define	SPI_LSB_FIRST	0x08			/* per-word bits-on-wire */
-#define	SPI_3WIRE	0x10			/* SI/SO signals shared */
-#define	SPI_LOOP	0x20			/* loopback mode */
-#define	SPI_SLAVE	0x40			/* slave mode */
-#define	SPI_PREAMBLE	0x80			/* Skip preamble bytes */
-#define SPI_TX_BYTE	0x100			/* transmit with 1 wire byte */
-#define SPI_TX_QUAD	0x200			/* transmit with 4 wires */
-
-/* SPI transfer flags */
-#define SPI_XFER_BEGIN		0x01	/* Assert CS before transfer */
-#define SPI_XFER_END		0x02	/* Deassert CS after transfer */
-#define SPI_XFER_MMAP		0x08	/* Memory Mapped start */
-#define SPI_XFER_MMAP_END	0x10	/* Memory Mapped End */
-#define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
-#define SPI_XFER_U_PAGE	(1 << 5)
-
-/* SPI RX operation modes */
-#define SPI_RX_SLOW		(1 << 0)
-#define SPI_RX_FAST		(1 << 1)
-#define SPI_RX_DUAL		(1 << 2)
-#define SPI_RX_QUAD		(1 << 4)
+#define SPI_CPHA	BIT(0)			/* clock phase */
+#define SPI_CPOL	BIT(1)			/* clock polarity */
+#define SPI_MODE_0	(0|0)			/* (original MicroWire) */
+#define SPI_MODE_1	(0|SPI_CPHA)
+#define SPI_MODE_2	(SPI_CPOL|0)
+#define SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
+#define SPI_CS_HIGH	BIT(2)			/* CS active high */
+#define SPI_LSB_FIRST	BIT(3)			/* per-word bits-on-wire */
+#define SPI_3WIRE	BIT(4)			/* SI/SO signals shared */
+#define SPI_LOOP	BIT(5)			/* loopback mode */
+#define SPI_SLAVE	BIT(6)			/* slave mode */
+#define SPI_PREAMBLE	BIT(7)			/* Skip preamble bytes */
+#define SPI_TX_BYTE	BIT(8)			/* transmit with 1 wire byte */
+#define SPI_TX_DUAL	BIT(9)			/* transmit with 2 wires */
+#define SPI_TX_QUAD	BIT(10)			/* transmit with 4 wires */
+
+/* SPI mode_rx flags */
+#define SPI_RX_SLOW	BIT(0)			/* receive with 1 wire slow */
+#define SPI_RX_FAST	BIT(1)			/* receive with 1 wire fast */
+#define SPI_RX_DUAL	BIT(2)			/* receive with 2 wires */
+#define SPI_RX_QUAD	BIT(3)			/* receive with 4 wires */
 
 /* SPI bus connection options - see enum spi_dual_flash */
 #define SPI_CONN_DUAL_SHARED		(1 << 0)
@@ -68,11 +61,13 @@ struct dm_spi_bus {
  * @cs:		Chip select number (0..n-1)
  * @max_hz:	Maximum bus speed that this slave can tolerate
  * @mode:	SPI mode to use for this device (see SPI mode flags)
+ * @mode_rx:	SPI RX mode to use for this slave (see SPI mode_rx flags)
  */
 struct dm_spi_slave_platdata {
 	unsigned int cs;
 	uint max_hz;
 	uint mode;
+	u8 mode_rx;
 };
 
 #endif /* CONFIG_DM_SPI */
@@ -99,7 +94,7 @@ struct dm_spi_slave_platdata {
  *			bus (bus->seq) so does not need to be stored
  * @cs:			ID of the chip select connected to the slave.
  * @mode:		SPI mode to use for this slave (see SPI mode flags)
- * @op_mode_rx:		SPI RX operation mode.
+ * @mode_rx:		SPI RX mode to use for this slave (see SPI mode_rx flags)
  * @wordlen:		Size of SPI word in number of bits
  * @max_write_size:	If non-zero, the maximum number of bytes which can
  *			be written at once, excluding command bytes.
@@ -117,12 +112,19 @@ struct spi_slave {
 	unsigned int cs;
 #endif
 	uint mode;
-	u8 op_mode_rx;
+	u8 mode_rx;
 	unsigned int wordlen;
 	unsigned int max_write_size;
 	void *memory_map;
 	u8 option;
+
 	u8 flags;
+#define SPI_XFER_BEGIN		BIT(0)	/* Assert CS before transfer */
+#define SPI_XFER_END		BIT(1)	/* Deassert CS after transfer */
+#define SPI_XFER_ONCE		(SPI_XFER_BEGIN | SPI_XFER_END)
+#define SPI_XFER_MMAP		BIT(2)	/* Memory Mapped start */
+#define SPI_XFER_MMAP_END	BIT(3)	/* Memory Mapped End */
+#define SPI_XFER_U_PAGE		BIT(4)
 };
 
 /**