X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fppc_asm.tmpl;h=db7b1668d99a60ecd3992f0e090b37a7f0c23e00;hb=d789a8259e3b3b77e3eb2b090373ab2cbc225629;hp=379c493919bf27f42b4835a6f9b2961ac1ab7da3;hpb=7e8f270292ebacb25f366181f2022c819e5c7586;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl index 379c493..db7b166 100644 --- a/include/ppc_asm.tmpl +++ b/include/ppc_asm.tmpl @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2000-2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -81,8 +80,7 @@ #define r30 30 #define r31 31 - -#if defined(CONFIG_8xx) +#if defined(CONFIG_MPC8xx) /* Some special registers */ @@ -94,21 +92,10 @@ #define LCTRL2 157 /* Load/Store Support (37-41) */ #define ICTRL 158 -#endif /* CONFIG_8xx */ - +#endif /* CONFIG_MPC8xx */ -#if defined(CONFIG_5xx) -/* Some special purpose registers */ -#define DER 149 /* Debug Enable Register */ -#define COUNTA 150 /* Breakpoint Counter */ -#define COUNTB 151 /* Breakpoint Counter */ -#define LCTRL1 156 /* Load/Store Support */ -#define LCTRL2 157 /* Load/Store Support */ -#define ICTRL 158 /* I-Bus Support Control Register */ -#define EID 81 -#endif /* CONFIG_5xx */ -#if defined(CONFIG_8xx) +#if defined(CONFIG_MPC8xx) /* Registers in the processor's internal memory map that we use. */ @@ -137,35 +124,6 @@ #define PLPRCR 0x00000284 -#elif defined(CONFIG_MPC8260) - -#define HID2 1011 - -#define HID0_IFEM (1<<7) - -#define HID0_ICE_BITPOS 16 -#define HID0_DCE_BITPOS 17 - -#define IM_REGBASE 0x10000 -#define IM_SYPCR (IM_REGBASE+0x0004) -#define IM_SWSR (IM_REGBASE+0x000e) -#define IM_BR0 (IM_REGBASE+0x0100) -#define IM_OR0 (IM_REGBASE+0x0104) -#define IM_BR1 (IM_REGBASE+0x0108) -#define IM_OR1 (IM_REGBASE+0x010c) -#define IM_BR2 (IM_REGBASE+0x0110) -#define IM_OR2 (IM_REGBASE+0x0114) -#define IM_MPTPR (IM_REGBASE+0x0184) -#define IM_PSDMR (IM_REGBASE+0x0190) -#define IM_PSRT (IM_REGBASE+0x019c) -#define IM_IMMR (IM_REGBASE+0x01a8) -#define IM_SCCR (IM_REGBASE+0x0c80) - -#elif defined(CONFIG_MPC5xxx) - -#define HID0_ICE_BITPOS 16 -#define HID0_DCE_BITPOS 17 - #endif #define curptr r2