X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fppc_asm.tmpl;h=db7b1668d99a60ecd3992f0e090b37a7f0c23e00;hb=6864fc8704661878294d1f0f981f47e864ef470f;hp=ce71ee9bc9260b48519dc8c96c135f101a63110c;hpb=064b55cfcb25c0f7692ecf6d4a38f12cd82739f7;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl
index ce71ee9..db7b166 100644
--- a/include/ppc_asm.tmpl
+++ b/include/ppc_asm.tmpl
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2000-2002
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -81,6 +80,52 @@
 #define	r30	30
 #define	r31	31
 
+#if defined(CONFIG_MPC8xx)
+
+/* Some special registers */
+
+#define ICR	148	/* Interrupt Cause Register (37-44) */
+#define DER	149
+#define COUNTA	150	/* Breakpoint Counter	    (37-44) */
+#define COUNTB	151	/* Breakpoint Counter	    (37-44) */
+#define LCTRL1	156	/* Load/Store Support	    (37-40) */
+#define LCTRL2	157	/* Load/Store Support	    (37-41) */
+#define ICTRL	158
+
+#endif	/* CONFIG_MPC8xx */
+
+
+#if defined(CONFIG_MPC8xx)
+
+/* Registers in the processor's internal memory map that we use.
+*/
+#define SYPCR	0x00000004
+#define BR0	0x00000100
+#define OR0	0x00000104
+#define BR1	0x00000108
+#define OR1	0x0000010c
+#define BR2	0x00000110
+#define OR2	0x00000114
+#define BR3	0x00000118
+#define OR3	0x0000011c
+#define BR4	0x00000120
+#define OR4	0x00000124
+
+#define MAR	0x00000164
+#define MCR	0x00000168
+#define MAMR	0x00000170
+#define MBMR	0x00000174
+#define MSTAT	0x00000178
+#define MPTPR	0x0000017a
+#define MDR	0x0000017c
+
+#define TBSCR	0x00000200
+#define TBREFF0	0x00000204
+
+#define PLPRCR	0x00000284
+
+#endif
+
 #define curptr r2
 
 #define SYNC \