X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fppc4xx_enet.h;h=b74c6fcafde7255fac2f8cfa9d1169bd0637283a;hb=becbbc7b2a1be44d38779c80ce94fb20e5e13f12;hp=02084546b2f14d2a1840d50936d4e163fa70e534;hpb=27f33e9f45ef7f9685cbdc65066a1828e85dde4f;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/ppc4xx_enet.h b/include/ppc4xx_enet.h
index 0208454..b74c6fc 100644
--- a/include/ppc4xx_enet.h
+++ b/include/ppc4xx_enet.h
@@ -153,6 +153,20 @@ typedef struct emac_4xx_hw_st {
 #define SDR0_PFC1_EM_1000	(0x00200000)
 #endif
 
+/*
+ * XMII bridge configurations for those systems (e.g. 405EX(r)) that do
+ * not have a pin function control (PFC) register to otherwise determine
+ * the bridge configuration.
+ */
+#define EMAC_PHY_MODE_NONE		0
+#define EMAC_PHY_MODE_NONE_RGMII	1
+#define EMAC_PHY_MODE_RGMII_NONE	2
+#define EMAC_PHY_MODE_RGMII_RGMII	3
+#define EMAC_PHY_MODE_NONE_GMII		4
+#define EMAC_PHY_MODE_GMII_NONE		5
+#define EMAC_PHY_MODE_NONE_MII		6
+#define EMAC_PHY_MODE_MII_NONE		7
+
 /* ZMII Bridge Register addresses */
 #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
     defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
@@ -213,13 +227,17 @@ typedef struct emac_4xx_hw_st {
 #define RGMII_FER		(RGMII_BASE + 0x00)
 #define RGMII_SSR		(RGMII_BASE + 0x04)
 
+#if defined(CONFIG_460GT)
+#define RGMII1_BASE_OFFSET	0x100
+#endif
+
 /* RGMII Function Enable (FER) Register Bit Definitions */
-/* Note: for EMAC 2 and 3 only, 440GX only */
 #define RGMII_FER_DIS		(0x00)
 #define RGMII_FER_RTBI		(0x04)
 #define RGMII_FER_RGMII		(0x05)
 #define RGMII_FER_TBI		(0x06)
 #define RGMII_FER_GMII		(0x07)
+#define RGMII_FER_MII		(RGMII_FER_GMII)
 
 #define RGMII_FER_V(__x)	((__x - 2) * 4)
 
@@ -314,9 +332,9 @@ typedef struct emac_4xx_hw_st {
 #endif
 #else
 #if defined(CONFIG_405EZ) || defined(CONFIG_405EX)
-#define EMAC_BASE 		0xEF600900
+#define EMAC_BASE		0xEF600900
 #else
-#define EMAC_BASE 		0xEF600800
+#define EMAC_BASE		0xEF600800
 #endif
 #endif