X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fphy_interface.h;h=f075abe9c9c0cd7a13cbdb9bf4ed8e4cb5cf8c1d;hb=355d1e24f6143c4839be3c015c191421c4e9449c;hp=0760d65de518f1a900b3002b15fb8fb88348ffb6;hpb=406fd7e207d3593f150079514a371dccdc651ce7;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/phy_interface.h b/include/phy_interface.h
index 0760d65..f075abe 100644
--- a/include/phy_interface.h
+++ b/include/phy_interface.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  *	Andy Fleming <afleming@gmail.com>
  *
  * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
@@ -9,6 +10,8 @@
 #ifndef _PHY_INTERFACE_H
 #define _PHY_INTERFACE_H
 
+#include <string.h>
+
 typedef enum {
 	PHY_INTERFACE_MODE_MII,
 	PHY_INTERFACE_MODE_GMII,
@@ -22,11 +25,20 @@ typedef enum {
 	PHY_INTERFACE_MODE_RGMII_RXID,
 	PHY_INTERFACE_MODE_RGMII_TXID,
 	PHY_INTERFACE_MODE_RTBI,
+	PHY_INTERFACE_MODE_1000BASEX,
+	PHY_INTERFACE_MODE_2500BASEX,
 	PHY_INTERFACE_MODE_XGMII,
 	PHY_INTERFACE_MODE_XAUI,
 	PHY_INTERFACE_MODE_RXAUI,
 	PHY_INTERFACE_MODE_SFI,
 	PHY_INTERFACE_MODE_INTERNAL,
+	PHY_INTERFACE_MODE_25G_AUI,
+	PHY_INTERFACE_MODE_XLAUI,
+	PHY_INTERFACE_MODE_CAUI2,
+	PHY_INTERFACE_MODE_CAUI4,
+	PHY_INTERFACE_MODE_NCSI,
+	PHY_INTERFACE_MODE_10GBASER,
+	PHY_INTERFACE_MODE_USXGMII,
 	PHY_INTERFACE_MODE_NONE,	/* Must be last */
 
 	PHY_INTERFACE_MODE_COUNT,
@@ -45,14 +57,32 @@ static const char * const phy_interface_strings[] = {
 	[PHY_INTERFACE_MODE_RGMII_RXID]		= "rgmii-rxid",
 	[PHY_INTERFACE_MODE_RGMII_TXID]		= "rgmii-txid",
 	[PHY_INTERFACE_MODE_RTBI]		= "rtbi",
+	[PHY_INTERFACE_MODE_1000BASEX]		= "1000base-x",
+	[PHY_INTERFACE_MODE_2500BASEX]		= "2500base-x",
 	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
 	[PHY_INTERFACE_MODE_XAUI]		= "xaui",
 	[PHY_INTERFACE_MODE_RXAUI]		= "rxaui",
 	[PHY_INTERFACE_MODE_SFI]		= "sfi",
 	[PHY_INTERFACE_MODE_INTERNAL]		= "internal",
+	[PHY_INTERFACE_MODE_25G_AUI]		= "25g-aui",
+	[PHY_INTERFACE_MODE_XLAUI]		= "xlaui4",
+	[PHY_INTERFACE_MODE_CAUI2]		= "caui2",
+	[PHY_INTERFACE_MODE_CAUI4]		= "caui4",
+	[PHY_INTERFACE_MODE_NCSI]		= "NC-SI",
+	[PHY_INTERFACE_MODE_10GBASER]		= "10gbase-r",
+	[PHY_INTERFACE_MODE_USXGMII]		= "usxgmii",
 	[PHY_INTERFACE_MODE_NONE]		= "",
 };
 
+/* Backplane modes:
+ * are considered a sub-type of phy_interface_t: XGMII
+ * and are specified in "phy-connection-type" with one of the following strings
+ */
+static const char * const backplane_mode_strings[] = {
+	"10gbase-kr",
+	"40gbase-kr4",
+};
+
 static inline const char *phy_string_for_interface(phy_interface_t i)
 {
 	/* Default to unknown */
@@ -62,4 +92,17 @@ static inline const char *phy_string_for_interface(phy_interface_t i)
 	return phy_interface_strings[i];
 }
 
+static inline bool is_backplane_mode(const char *phyconn)
+{
+	int i;
+
+	if (!phyconn)
+		return false;
+	for (i = 0; i < ARRAY_SIZE(backplane_mode_strings); i++) {
+		if (!strcmp(phyconn, backplane_mode_strings[i]))
+			return true;
+	}
+	return false;
+}
+
 #endif /* _PHY_INTERFACE_H */