X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fopcode%2Fsparc.h;h=c41292364b1a162010e2a1911a4132144d01242f;hb=5934e39b3dbf53624b900a5e8632c2e6ed6175b7;hp=4f159bd896f6a2e78174d4572717f373b6e1463e;hpb=dc9e099fc0eced486ae2b49455c9da113c11f4ff;p=external%2Fbinutils.git diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h index 4f159bd..c412923 100644 --- a/include/opcode/sparc.h +++ b/include/opcode/sparc.h @@ -1,5 +1,5 @@ /* Definitions for opcode table for the sparc. - Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 1997 + Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2002 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and @@ -20,7 +20,7 @@ along with GAS or GDB; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include +#include "ansidecl.h" /* The SPARC opcode table (and other related data) is defined in the opcodes library in sparc-opc.c. If you change anything here, make @@ -46,6 +46,7 @@ enum sparc_opcode_arch_val { /* v9 variants must appear last */ SPARC_OPCODE_ARCH_V9, SPARC_OPCODE_ARCH_V9A, /* v9 with ultrasparc additions */ + SPARC_OPCODE_ARCH_V9B, /* v9 with ultrasparc and cheetah additions */ SPARC_OPCODE_ARCH_BAD /* error return from sparc_opcode_lookup_arch */ }; @@ -141,6 +142,7 @@ Kinds of operands: h 22 high bits. X 5 bit unsigned immediate Y 6 bit unsigned immediate + 3 SIAM mode (3 bits). (v9b) K MEMBAR mask (7 bits). (v9) j 10 bit Immediate. (v9) I 11 bit Immediate. (v9) @@ -187,7 +189,7 @@ Kinds of operands: / Ancillary state register in rs1 (v9a) The following chars are unused: (note: ,[] are used as punctuation) -[345] +[45] */