X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fns16550.h;h=0ee5c4d6de75d886f2a692ad8f5172783d8d8f5b;hb=6786ce1ce14feb4d02854a0c04bc0cce505be46e;hp=0607379537d7ccf1038a0d322fdf29d95fbc0df4;hpb=84a6df09c78bc9e9cbc6265d99c9097f5f1079f2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/ns16550.h b/include/ns16550.h
index 0607379..0ee5c4d 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -21,9 +21,12 @@
  * will not allocate storage for arrays of size 0
  */
 
+#ifndef __ns16550_h
+#define __ns16550_h
+
 #include <linux/types.h>
 
-#ifdef CONFIG_DM_SERIAL
+#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE)
 /*
  * For driver model we always use one byte per register, and sort out the
  * differences in the driver
@@ -31,9 +34,12 @@
 #define CONFIG_SYS_NS16550_REG_SIZE (-1)
 #endif
 
+#ifdef CONFIG_NS16550_DYNAMIC
+#define UART_REG(x)	unsigned char x
+#else
 #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0)
 #error "Please define NS16550 registers size."
-#elif defined(CONFIG_SYS_NS16550_MEM32)
+#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL)
 #define UART_REG(x) u32 x
 #elif (CONFIG_SYS_NS16550_REG_SIZE > 0)
 #define UART_REG(x)						   \
@@ -44,23 +50,42 @@
 	unsigned char x;						\
 	unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1];
 #endif
+#endif /* CONFIG_NS16550_DYNAMIC */
+
+enum ns16550_flags {
+	NS16550_FLAG_IO		= 1 << 0, /* Use I/O access (else mem-mapped) */
+	NS16550_FLAG_ENDIAN	= 1 << 1, /* Use out_le/be_32() */
+	NS16550_FLAG_BE		= 1 << 2, /* Big-endian access (else little) */
+};
 
 /**
- * struct ns16550_platdata - information about a NS16550 port
+ * struct ns16550_plat - information about a NS16550 port
  *
  * @base:		Base register address
+ * @reg_width:		IO accesses size of registers (in bytes, 1 or 4)
  * @reg_shift:		Shift size of registers (0=byte, 1=16bit, 2=32bit...)
+ * @reg_offset:		Offset to start of registers (normally 0)
  * @clock:		UART base clock speed in Hz
+ * @fcr:		Offset of FCR register (normally UART_FCR_DEFVAL)
+ * @flags:		A few flags (enum ns16550_flags)
+ * @bdf:		PCI slot/function (pci_dev_t)
  */
-struct ns16550_platdata {
+struct ns16550_plat {
 	unsigned long base;
+	int reg_width;
 	int reg_shift;
+	int reg_offset;
 	int clock;
+	u32 fcr;
+	int flags;
+#if defined(CONFIG_PCI) && defined(CONFIG_SPL)
+	int bdf;
+#endif
 };
 
 struct udevice;
 
-struct NS16550 {
+struct ns16550 {
 	UART_REG(rbr);		/* 0 */
 	UART_REG(ier);		/* 1 */
 	UART_REG(fcr);		/* 2 */
@@ -89,7 +114,7 @@ struct NS16550 {
 	UART_REG(ssr);		/* 11*/
 #endif
 #ifdef CONFIG_DM_SERIAL
-	struct ns16550_platdata *plat;
+	struct ns16550_plat *plat;
 #endif
 };
 
@@ -98,8 +123,6 @@ struct NS16550 {
 #define dll rbr
 #define dlm ier
 
-typedef struct NS16550 *NS16550_t;
-
 /*
  * These are the definitions for the FIFO Control Register
  */
@@ -116,6 +139,14 @@ typedef struct NS16550 *NS16550_t;
 #define UART_FCR_RXSR		0x02 /* Receiver soft reset */
 #define UART_FCR_TXSR		0x04 /* Transmitter soft reset */
 
+/* Ingenic JZ47xx specific UART-enable bit. */
+#define UART_FCR_UME		0x10
+
+/* Clear & enable FIFOs */
+#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | \
+			UART_FCR_RXSR |	\
+			UART_FCR_TXSR)
+
 /*
  * These are the definitions for the Modem Control Register
  */
@@ -191,11 +222,11 @@ typedef struct NS16550 *NS16550_t;
 /* useful defaults for LCR */
 #define UART_LCR_8N1	0x03
 
-void NS16550_init(NS16550_t com_port, int baud_divisor);
-void NS16550_putc(NS16550_t com_port, char c);
-char NS16550_getc(NS16550_t com_port);
-int NS16550_tstc(NS16550_t com_port);
-void NS16550_reinit(NS16550_t com_port, int baud_divisor);
+void ns16550_init(struct ns16550 *com_port, int baud_divisor);
+void ns16550_putc(struct ns16550 *com_port, char c);
+char ns16550_getc(struct ns16550 *com_port);
+int ns16550_tstc(struct ns16550 *com_port);
+void ns16550_reinit(struct ns16550 *com_port, int baud_divisor);
 
 /**
  * ns16550_calc_divisor() - calculate the divisor given clock and baud rate
@@ -206,12 +237,12 @@ void NS16550_reinit(NS16550_t com_port, int baud_divisor);
  * @port:	UART port
  * @clock:	UART input clock speed in Hz
  * @baudrate:	Required baud rate
- * @return baud rate divisor that should be used
+ * Return: baud rate divisor that should be used
  */
-int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate);
+int ns16550_calc_divisor(struct ns16550 *port, int clock, int baudrate);
 
 /**
- * ns16550_serial_ofdata_to_platdata() - convert DT to platform data
+ * ns16550_serial_of_to_plat() - convert DT to platform data
  *
  * Decode a device tree node for an ns16550 device. This includes the
  * register base address and register shift properties. The caller must set
@@ -220,13 +251,13 @@ int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate);
  * @dev:	dev to decode platform data for
  * @return:	0 if OK, -EINVAL on error
  */
-int ns16550_serial_ofdata_to_platdata(struct udevice *dev);
+int ns16550_serial_of_to_plat(struct udevice *dev);
 
 /**
  * ns16550_serial_probe() - probe a serial port
  *
  * This sets up the serial port ready for use, except for the baud rate
- * @return 0, or -ve on error
+ * Return: 0, or -ve on error
  */
 int ns16550_serial_probe(struct udevice *dev);
 
@@ -236,3 +267,5 @@ int ns16550_serial_probe(struct udevice *dev);
  * These should be used by the client driver for the driver's 'ops' member
  */
 extern const struct dm_serial_ops ns16550_serial_ops;
+
+#endif /* __ns16550_h */