X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fmxs_nand.h;h=66c909318d1fe114bb391b05cd3690d90f9bbe8c;hb=5fac11e6d5ab350429b8c8ddf47d3d3877ca89d1;hp=4bd65cded94a6cc44d293fabe54ad9c1ce147ca5;hpb=dcf722ece6aad0c1512a26cdefc2f74a192fa9d2;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/mxs_nand.h b/include/mxs_nand.h index 4bd65cd..66c9093 100644 --- a/include/mxs_nand.h +++ b/include/mxs_nand.h @@ -8,6 +8,7 @@ */ #include +#include #include #include #include @@ -16,22 +17,26 @@ * @gf_len: The length of Galois Field. (e.g., 13 or 14) * @ecc_strength: A number that describes the strength of the ECC * algorithm. - * @ecc_chunk_size: The size, in bytes, of a single ECC chunk. Note - * the first chunk in the page includes both data and - * metadata, so it's a bit larger than this value. + * @ecc_chunk0_size: The size, in bytes, of a first ECC chunk. + * @ecc_chunkn_size: The size, in bytes, of a single ECC chunk after + * the first chunk in the page. * @ecc_chunk_count: The number of ECC chunks in the page, * @block_mark_byte_offset: The byte offset in the ECC-based page view at * which the underlying physical block mark appears. * @block_mark_bit_offset: The bit offset into the ECC-based page view at * which the underlying physical block mark appears. + * @ecc_for_meta: The flag to indicate if there is a dedicate ecc + * for meta. */ struct bch_geometry { unsigned int gf_len; unsigned int ecc_strength; - unsigned int ecc_chunk_size; + unsigned int ecc_chunk0_size; + unsigned int ecc_chunkn_size; unsigned int ecc_chunk_count; unsigned int block_mark_byte_offset; unsigned int block_mark_bit_offset; + unsigned int ecc_for_meta; /* ECC for meta data */ }; struct mxs_nand_info { @@ -39,6 +44,8 @@ struct mxs_nand_info { struct udevice *dev; unsigned int max_ecc_strength_supported; bool use_minimum_ecc; + /* legacy bch geometry flag */ + bool legacy_bch_geometry; int cur_chip; uint32_t cmd_queue_len; @@ -66,8 +73,32 @@ struct mxs_nand_info { /* DMA descriptors */ struct mxs_dma_desc **desc; uint32_t desc_index; + + /* Hardware BCH interface and randomizer */ + u32 en_randomizer; + u32 writesize; + u32 oobsize; + u32 bch_flash0layout0; + u32 bch_flash0layout1; +}; + +struct mxs_nand_layout { + u32 nblocks; + u32 meta_size; + u32 data0_size; + u32 ecc0; + u32 datan_size; + u32 eccn; + u32 gf_len; }; int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info); int mxs_nand_init_spl(struct nand_chip *nand); int mxs_nand_setup_ecc(struct mtd_info *mtd); + +void mxs_nand_mode_fcb_62bit(struct mtd_info *mtd); +void mxs_nand_mode_fcb_40bit(struct mtd_info *mtd); +void mxs_nand_mode_normal(struct mtd_info *mtd); +u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd); +u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd); +void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l);