X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Ffsl_esdhc.h;h=850a304bd7dfc11cf0ebc681ee66f7cd40cbfa8f;hb=5a1a8a63be8f7262a300eddafb18020926b12fb6;hp=7f8f8edc621fb02686873a38cd24365d2b961577;hpb=6b7937821dfdd53a7a733b3f723de1d84500247d;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 7f8f8ed..850a304 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -74,8 +74,10 @@
 #define IRQSTATEN_TC		(0x00000002)
 #define IRQSTATEN_CC		(0x00000001)
 
+/* eSDHC control register */
 #define ESDHCCTL		0x0002e40c
 #define ESDHCCTL_PCS		(0x00080000)
+#define ESDHCCTL_FAF		(0x00040000)
 
 #define PRSSTAT			0x0002e024
 #define PRSSTAT_DAT0		(0x01000000)
@@ -95,6 +97,10 @@
 #define PROCTL_DTW_4		0x00000002
 #define PROCTL_DTW_8		0x00000004
 #define PROCTL_D3CD		0x00000008
+#define PROCTL_DMAS_MASK	0x00000300
+#define PROCTL_DMAS_SDMA	0x00000000
+#define PROCTL_DMAS_ADMA1	0x00000100
+#define PROCTL_DMAS_ADMA2	0x00000300
 #define PROCTL_VOLT_SEL		0x00000400
 
 #define CMDARG			0x0002e008
@@ -154,6 +160,12 @@
 #define BLKATTR_SIZE(x)	(x & 0x1fff)
 #define MAX_BLK_CNT	0x7fff	/* so malloc will have enough room with 32M */
 
+/* Auto CMD error status register / system control 2 register */
+#define EXECUTE_TUNING		0x00400000
+#define SMPCLKSEL		0x00800000
+#define UHSM_MASK		0x00070000
+#define UHSM_SDR104_HS200	0x00030000
+
 /* Host controller capabilities register */
 #define HOSTCAPBLT_VS18		0x04000000
 #define HOSTCAPBLT_VS30		0x02000000
@@ -162,6 +174,37 @@
 #define HOSTCAPBLT_DMAS		0x00400000
 #define HOSTCAPBLT_HSS		0x00200000
 
+/* Tuning block control register */
+#define TBCTL_TB_EN		0x00000004
+#define HS400_MODE		0x00000010
+#define HS400_WNDW_ADJUST	0x00000040
+
+/* SD clock control register */
+#define CMD_CLK_CTL		0x00008000
+
+/* SD timing control register */
+#define FLW_CTL_BG		0x00008000
+
+/* DLL config 0 register */
+#define DLL_ENABLE		0x80000000
+#define DLL_RESET		0x40000000
+#define DLL_FREQ_SEL		0x08000000
+
+/* DLL status 0 register */
+#define DLL_STS_SLV_LOCK	0x08000000
+
+#define MAX_TUNING_LOOP		40
+
+#define HOSTVER_VENDOR(x)	(((x) >> 8) & 0xff)
+#define VENDOR_V_10		0x00
+#define VENDOR_V_20		0x10
+#define VENDOR_V_21		0x11
+#define VENDOR_V_22		0x12
+#define VENDOR_V_23		0x13
+#define VENDOR_V_30		0x20
+#define VENDOR_V_31		0x21
+#define VENDOR_V_32		0x22
+
 struct fsl_esdhc_cfg {
 	phys_addr_t esdhc_base;
 	u32	sdhc_clk;
@@ -203,10 +246,6 @@ struct fsl_esdhc_cfg {
 int fsl_esdhc_mmc_init(struct bd_info *bis);
 int fsl_esdhc_initialize(struct bd_info *bis, struct fsl_esdhc_cfg *cfg);
 void fdt_fixup_esdhc(void *blob, struct bd_info *bd);
-#ifdef MMC_SUPPORTS_TUNING
-static inline int fsl_esdhc_execute_tuning(struct udevice *dev,
-					   uint32_t opcode) {return 0; }
-#endif
 #else
 static inline int fsl_esdhc_mmc_init(struct bd_info *bis) { return -ENOSYS; }
 static inline void fdt_fixup_esdhc(void *blob, struct bd_info *bd) {}