X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Ffsl_ddr_sdram.h;h=095b33e29ee75086217c443c9f40fef18191dc8e;hb=b9cb64825b5e6efeb715abd8b48d9b12f98973e9;hp=d03901fe7c46346da45d7ee61c6747fda0a19429;hpb=1d71efbb0345ff3a8ac45e62bef36813abe1703e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index d03901f..095b33e 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -51,7 +51,6 @@ typedef ddr2_spd_eeprom_t generic_spd_eeprom_t; #define CONFIG_FSL_SDRAM_TYPE SDRAM_TYPE_DDR2 #endif #elif defined(CONFIG_SYS_FSL_DDR3) -#define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR (3) /* FIXME */ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t; #ifndef CONFIG_FSL_SDRAM_TYPE #define CONFIG_FSL_SDRAM_TYPE SDRAM_TYPE_DDR3 @@ -115,6 +114,7 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t; #define SDRAM_CFG_2T_EN 0x00008000 #define SDRAM_CFG_BI 0x00000001 +#define SDRAM_CFG2_FRC_SR 0x80000000 #define SDRAM_CFG2_D_INIT 0x00000010 #define SDRAM_CFG2_ODT_CFG_MASK 0x00600000 #define SDRAM_CFG2_ODT_NEVER 0 @@ -164,6 +164,7 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t; #define DDR_CDR1_ODT(x) ((x & DDR_CDR1_ODT_MASK) << DDR_CDR1_ODT_SHIFT) #define DDR_CDR2_ODT(x) (x & DDR_CDR2_ODT_MASK) #define DDR_CDR2_VREF_OVRD(x) (0x00008080 | ((((x) - 37) & 0x3F) << 8)) +#define DDR_CDR2_VREF_TRAIN_EN 0x00000080 #if (defined(CONFIG_SYS_FSL_DDR_VER) && \ (CONFIG_SYS_FSL_DDR_VER >= FSL_DDR_VER_4_7)) @@ -203,6 +204,8 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t; #define DDR_CDR_ODT_120ohm 0x6 #endif +#define DDR_INIT_ADDR_EXT_UIA (1 << 31) + /* Record of register values computed */ typedef struct fsl_ddr_cfg_regs_s { struct { @@ -352,7 +355,6 @@ typedef struct memctl_options_s { unsigned int twot_en; unsigned int threet_en; unsigned int bstopre; - unsigned int tcke_clock_pulse_width_ps; /* tCKE */ unsigned int tfaw_window_four_activates_ps; /* tFAW -- FOUR_ACT */ /* Rtt impedance */ @@ -416,9 +418,11 @@ static int __board_need_mem_reset(void) int board_need_mem_reset(void) __attribute__((weak, alias("__board_need_mem_reset"))); -void __weak board_mem_sleep_setup(void) -{ -} +#if defined(CONFIG_DEEP_SLEEP) +void board_mem_sleep_setup(void); +bool is_warm_boot(void); +int fsl_dp_resume(void); +#endif /* * The 85xx boards have a common prototype for fixed_sdram so put the