X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Ffpga.h;h=a4e16401da7232c6c0ec15805ac65c9be1c91cd4;hb=a29491ade0adf3dbb9dc51be8b45530edde1f1df;hp=49efd375f7473b0675a3e83e7b20b1b0c6deec66;hpb=67193864bce78b38fda2c73b9918403d1c572fcc;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/fpga.h b/include/fpga.h index 49efd37..a4e1640 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2002 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. - * - * SPDX-License-Identifier: GPL-2.0+ */ #include /* for ulong typedef */ @@ -16,11 +15,15 @@ /* fpga_xxxx function return value definitions */ #define FPGA_SUCCESS 0 -#define FPGA_FAIL -1 +#define FPGA_FAIL 1 /* device numbers must be non-negative */ #define FPGA_INVALID_DEVICE -1 +#define FPGA_ENC_DEV_KEY 0 +#define FPGA_ENC_USR_KEY 1 +#define FPGA_NO_ENC_OR_NO_AUTH 2 + /* root data type defintions */ typedef enum { /* typedef fpga_type */ fpga_min_type, /* range check value */ @@ -35,23 +38,44 @@ typedef struct { /* typedef fpga_desc */ void *devdesc; /* real device descriptor */ } fpga_desc; /* end, typedef fpga_desc */ +typedef struct { /* typedef fpga_desc */ + unsigned int blocksize; + char *interface; + char *dev_part; + const char *filename; + int fstype; +} fpga_fs_info; + +struct fpga_secure_info { + u8 *userkey_addr; + u8 authflag; + u8 encflag; +}; typedef enum { BIT_FULL = 0, BIT_PARTIAL, + BIT_NONE = 0xFF, } bitstream_type; /* root function definitions */ -extern void fpga_init(void); -extern int fpga_add(fpga_type devtype, void *desc); -extern int fpga_count(void); -extern int fpga_load(int devnum, const void *buf, size_t bsize, - bitstream_type bstype); -extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, - bitstream_type bstype); -extern int fpga_dump(int devnum, const void *buf, size_t bsize); -extern int fpga_info(int devnum); -extern const fpga_desc *const fpga_validate(int devnum, const void *buf, - size_t bsize, char *fn); +void fpga_init(void); +int fpga_add(fpga_type devtype, void *desc); +int fpga_count(void); +const fpga_desc *const fpga_get_desc(int devnum); +int fpga_is_partial_data(int devnum, size_t img_len); +int fpga_load(int devnum, const void *buf, size_t bsize, + bitstream_type bstype, int flags); +int fpga_fsload(int devnum, const void *buf, size_t size, + fpga_fs_info *fpga_fsinfo); +int fpga_loads(int devnum, const void *buf, size_t size, + struct fpga_secure_info *fpga_sec_info); +int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, + bitstream_type bstype); +int fpga_dump(int devnum, const void *buf, size_t bsize); +int fpga_info(int devnum); +const fpga_desc *const fpga_validate(int devnum, const void *buf, + size_t bsize, char *fn); +int fpga_compatible2flag(int devnum, const char *compatible); #endif /* _FPGA_H_ */