X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fdwmmc.h;h=5fc8ed8395f5b9cf0b2f579299b93915aede72a5;hb=92832045c54586e9dffa082ff8cd8c2ef6040757;hp=5b9602cd05c4a627c16513c3721c8bb492dea731;hpb=c98b171e1098f94b2ff7720c45a25a602882f876;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/dwmmc.h b/include/dwmmc.h index 5b9602c..5fc8ed8 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -1,15 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2012 SAMSUNG Electronics * Jaehoon Chung - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __DWMMC_HW_H #define __DWMMC_HW_H +#include #include #include +#include #define DWMCI_CTRL 0x000 #define DWMCI_PWREN 0x004 @@ -57,6 +58,7 @@ #define DWMCI_INTMSK_DTO (1 << 3) #define DWMCI_INTMSK_TXDR (1 << 4) #define DWMCI_INTMSK_RXDR (1 << 5) +#define DWMCI_INTMSK_RCRC (1 << 6) #define DWMCI_INTMSK_DCRC (1 << 7) #define DWMCI_INTMSK_RTO (1 << 8) #define DWMCI_INTMSK_DRTO (1 << 9) @@ -104,6 +106,8 @@ #define DWMCI_CTYPE_8BIT (1 << 16) /* Status Register */ +#define DWMCI_FIFO_EMPTY (1 << 2) +#define DWMCI_FIFO_FULL (1 << 3) #define DWMCI_BUSY (1 << 9) #define DWMCI_FIFO_MASK 0x1fff #define DWMCI_FIFO_SHIFT 17 @@ -128,6 +132,13 @@ /* UHS register */ #define DWMCI_DDR_MODE (1 << 16) +/* Internal IDMAC interrupt defines */ +#define DWMCI_IDINTEN_RI BIT(1) +#define DWMCI_IDINTEN_TI BIT(0) + +#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | \ + DWMCI_IDINTEN_RI) + /* quirks */ #define DWMCI_QUIRK_DISABLE_SMU (1 << 0) @@ -163,7 +174,7 @@ struct dwmci_host { struct mmc *mmc; void *priv; - void (*clksel)(struct dwmci_host *host); + int (*clksel)(struct dwmci_host *host); void (*board_init)(struct dwmci_host *host); /** @@ -245,22 +256,20 @@ static inline u8 dwmci_readb(struct dwmci_host *host, int reg) * ... * * Inside U_BOOT_DRIVER(): - * .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat), + * .plat_auto = sizeof(struct rockchip_mmc_plat), * * To access platform data: - * struct rockchip_mmc_plat *plat = dev_get_platdata(dev); + * struct rockchip_mmc_plat *plat = dev_get_plat(dev); * * See rockchip_dw_mmc.c for an example. * * @cfg: Configuration structure to fill in (generally &plat->mmc) - * @name: Device name (normally dev->name) - * @buswidth: Bus width (in bits, such as 4 or 8) - * @caps: Host capabilities (MMC_MODE_...) + * @host: DWMMC host * @max_clk: Maximum supported clock speed in HZ (e.g. 150000000) * @min_clk: Minimum supported clock speed in HZ (e.g. 400000) */ -void dwmci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, - uint caps, u32 max_clk, u32 min_clk); +void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, + u32 max_clk, u32 min_clk); /** * dwmci_bind() - Set up a new MMC block device @@ -293,7 +302,7 @@ int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk); #endif /* !CONFIG_BLK */ -#ifdef CONFIG_DM_MMC_OPS +#ifdef CONFIG_DM_MMC /* Export the operations to drivers */ int dwmci_probe(struct udevice *dev); extern const struct dm_mmc_ops dm_dwmci_ops;